commit 8963f7d40be4961e8ae6dca4185e4e682ba2fdb9
author Angel Pons <th3fanbus@gmail.com> Sat Oct 24 12:20:28 2020 +0200
committer Michael Niewöhner <foss@mniewoehner.de> Sat Oct 31 10:08:35 2020 +0000
tree 02f2ce901e111c264ecd4744dad18c0883251ca5
parent 2d35cf8689998b9dc0626083c3a3d867f82a35e0

sb/intel/lynxpoint: Drop unnecessary `UL` suffix

With BUILD_TIMELESS=1, Asrock B85M Pro4 and Google Wolf do not change.

Change-Id: I9ba4097cd82c4ff68315a40e1e955e4ed9a43862
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46719
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/intel/lynxpoint/azalia.c

diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index cf360ff..68958f0 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -33,7 +33,7 @@
 	u16 reg16;
 	u32 reg32;
 
-	if (RCBA32(0x2030) & (1UL << 31)) {
+	if (RCBA32(0x2030) & (1 << 31)) {
 		reg32 = pci_read_config32(dev, 0x120);
 		reg32 &= 0xf8ffff01;
 		reg32 |= (1 << 25);
@@ -54,9 +54,9 @@
 	if (pci_read_config32(dev, 0x120) & ((1 << 24) | (1 << 25) | (1 << 26))) {
 		reg32 = pci_read_config32(dev, 0x120);
 		if (pch_is_lp())
-			reg32 &= ~(1UL << 31);
+			reg32 &= ~(1 << 31);
 		else
-			reg32 |= (1UL << 31);
+			reg32 |= (1 << 31);
 		pci_write_config32(dev, 0x120, reg32);
 	}
 
@@ -79,7 +79,7 @@
 	pci_write_config32(dev, 0xc4, reg32);
 
 	if (!pch_is_lp())
-		pci_and_config32(dev, 0xd0, ~(1UL << 31));
+		pci_and_config32(dev, 0xd0, ~(1 << 31));
 
 	// Select Azalia mode
 	pci_or_config8(dev, 0x40, 1); // Audio Control