Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2008-2009 coresystems GmbH |
| 6 | * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 20 | */ |
| 21 | |
| 22 | #include <console/console.h> |
| 23 | #include <device/device.h> |
| 24 | #include <device/pci.h> |
| 25 | #include <device/pci_ids.h> |
| 26 | #include <device/pci_ops.h> |
| 27 | #include <arch/io.h> |
| 28 | #include <delay.h> |
| 29 | #include "pch.h" |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 30 | #include "hda_verb.h" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 31 | |
| 32 | const u32 * cim_verb_data = NULL; |
| 33 | u32 cim_verb_data_size = 0; |
| 34 | const u32 * pc_beep_verbs = NULL; |
| 35 | u32 pc_beep_verbs_size = 0; |
| 36 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 37 | static void codecs_init(u32 base, u32 codec_mask) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 38 | { |
| 39 | int i; |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 40 | |
| 41 | /* Can support up to 4 codecs */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 42 | for (i = 3; i >= 0; i--) { |
| 43 | if (codec_mask & (1 << i)) |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 44 | hda_codec_init(base, i, |
| 45 | cim_verb_data_size, |
| 46 | cim_verb_data); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 47 | } |
| 48 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 49 | if (pc_beep_verbs_size && pc_beep_verbs) |
| 50 | hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 51 | } |
| 52 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 53 | static void azalia_pch_init(struct device *dev, u32 base) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 54 | { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 55 | u8 reg8; |
| 56 | u16 reg16; |
| 57 | u32 reg32; |
| 58 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 59 | if (RCBA32(0x2030) & (1 << 31)) { |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 60 | reg32 = pci_read_config32(dev, 0x120); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 61 | reg32 &= 0xf8ffff01; |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 62 | reg32 |= (1 << 25); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 63 | reg32 |= RCBA32(0x2030) & 0xfe; |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 64 | pci_write_config32(dev, 0x120, reg32); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 65 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 66 | if (!pch_is_lp()) { |
| 67 | reg16 = pci_read_config16(dev, 0x78); |
| 68 | reg16 &= ~(1 << 11); |
| 69 | pci_write_config16(dev, 0x78, reg16); |
| 70 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 71 | } else |
| 72 | printk(BIOS_DEBUG, "Azalia: V1CTL disabled.\n"); |
| 73 | |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 74 | reg32 = pci_read_config32(dev, 0x114); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 75 | reg32 &= ~0xfe; |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 76 | pci_write_config32(dev, 0x114, reg32); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 77 | |
| 78 | // Set VCi enable bit |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 79 | if (pci_read_config32(dev, 0x120) & ((1 << 24) | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 80 | (1 << 25) | (1 << 26))) { |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 81 | reg32 = pci_read_config32(dev, 0x120); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 82 | if (pch_is_lp()) |
| 83 | reg32 &= ~(1 << 31); |
| 84 | else |
| 85 | reg32 |= (1 << 31); |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 86 | pci_write_config32(dev, 0x120, reg32); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 87 | } |
| 88 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 89 | reg8 = pci_read_config8(dev, 0x43); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 90 | if (pch_is_lp()) |
| 91 | reg8 &= ~(1 << 6); |
| 92 | else |
| 93 | reg8 |= (1 << 4); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 94 | pci_write_config8(dev, 0x43, reg8); |
| 95 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 96 | if (!pch_is_lp()) { |
| 97 | reg32 = pci_read_config32(dev, 0xc0); |
| 98 | reg32 |= (1 << 17); |
| 99 | pci_write_config32(dev, 0xc0, reg32); |
| 100 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 101 | |
| 102 | /* Additional programming steps */ |
| 103 | reg32 = pci_read_config32(dev, 0xc4); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 104 | if (pch_is_lp()) |
| 105 | reg32 |= (1 << 24); |
| 106 | else |
| 107 | reg32 |= (1 << 14); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 108 | pci_write_config32(dev, 0xc4, reg32); |
| 109 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 110 | if (!pch_is_lp()) { |
| 111 | reg32 = pci_read_config32(dev, 0xd0); |
| 112 | reg32 &= ~(1 << 31); |
| 113 | pci_write_config32(dev, 0xd0, reg32); |
| 114 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 115 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 116 | reg8 = pci_read_config8(dev, 0x40); // Audio Control |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 117 | reg8 |= 1; // Select Azalia mode |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 118 | pci_write_config8(dev, 0x40, reg8); |
| 119 | |
| 120 | reg8 = pci_read_config8(dev, 0x4d); // Docking Status |
| 121 | reg8 &= ~(1 << 7); // Docking not supported |
| 122 | pci_write_config8(dev, 0x4d, reg8); |
| 123 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 124 | if (pch_is_lp()) { |
| 125 | reg16 = read32(base + 0x0012); |
| 126 | reg16 |= (1 << 0); |
| 127 | write32(base + 0x0012, reg16); |
| 128 | |
| 129 | /* disable Auto Voltage Detector */ |
| 130 | reg8 = pci_read_config8(dev, 0x42); |
| 131 | reg8 |= (1 << 2); |
| 132 | pci_write_config8(dev, 0x42, reg8); |
| 133 | } |
| 134 | } |
| 135 | |
| 136 | static void azalia_init(struct device *dev) |
| 137 | { |
| 138 | u32 base; |
| 139 | struct resource *res; |
| 140 | u32 codec_mask; |
| 141 | u32 reg32; |
| 142 | |
| 143 | /* Find base address */ |
| 144 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 145 | if (!res) |
| 146 | return; |
| 147 | |
| 148 | base = (u32)res->base; |
| 149 | printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base); |
| 150 | |
| 151 | /* Set Bus Master */ |
| 152 | reg32 = pci_read_config32(dev, PCI_COMMAND); |
| 153 | pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER); |
| 154 | |
| 155 | azalia_pch_init(dev, base); |
| 156 | |
| 157 | codec_mask = hda_codec_detect(base); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 158 | |
| 159 | if (codec_mask) { |
| 160 | printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame^] | 161 | codecs_init(base, codec_mask); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 162 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 163 | } |
| 164 | |
| 165 | static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
| 166 | { |
| 167 | if (!vendor || !device) { |
| 168 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 169 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 170 | } else { |
| 171 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 172 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 173 | } |
| 174 | } |
| 175 | |
| 176 | static struct pci_operations azalia_pci_ops = { |
| 177 | .set_subsystem = azalia_set_subsystem, |
| 178 | }; |
| 179 | |
| 180 | static struct device_operations azalia_ops = { |
| 181 | .read_resources = pci_dev_read_resources, |
| 182 | .set_resources = pci_dev_set_resources, |
| 183 | .enable_resources = pci_dev_enable_resources, |
| 184 | .init = azalia_init, |
| 185 | .scan_bus = 0, |
| 186 | .ops_pci = &azalia_pci_ops, |
| 187 | }; |
| 188 | |
Aaron Durbin | ed095ca | 2013-05-20 15:57:16 -0500 | [diff] [blame] | 189 | static const unsigned short pci_device_ids[] = { 0x8c20, 0x9c20, 0 }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 190 | |
| 191 | static const struct pci_driver pch_azalia __pci_driver = { |
| 192 | .ops = &azalia_ops, |
| 193 | .vendor = PCI_VENDOR_ID_INTEL, |
| 194 | .devices = pci_device_ids, |
| 195 | }; |
| 196 | |