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Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +01001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010015 */
16
Elyes HAOUAS6d19a202018-11-22 11:15:29 +010017#include <arch/acpi.h>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010018DefinitionBlock(
19 "dsdt.aml",
20 "DSDT",
Elyes HAOUAS0cca6e22018-11-13 14:23:29 +010021 0x02, /* DSDT revision: ACPI v2.0 and up */
Elyes HAOUAS6d19a202018-11-22 11:15:29 +010022 OEM_ID,
23 ACPI_TABLE_CREATOR,
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010024 0x20140108 /* OEM revision */
25)
26{
Arthur Heymans6c13b042019-11-02 17:19:26 +010027 #include <southbridge/intel/common/acpi/platform.asl>
Vladimir Serbinenkod2aa4732015-05-17 00:20:52 +020028
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010029 /* Some generic macros */
30 #include "acpi/platform.asl"
31
32 /* global NVS and variables */
33 #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
34
35 /* General Purpose Events */
36 #include "acpi/gpe.asl"
37
Arthur Heymansaaced4a2018-11-28 13:53:15 +010038 #include <cpu/intel/common/acpi/cpu.asl>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010039
40 Scope (\_SB) {
41 Device (PCI0)
42 {
43 #include <northbridge/intel/nehalem/acpi/nehalem.asl>
44 #include <southbridge/intel/bd82x6x/acpi/pch.asl>
Nico Huber954a55b2015-08-27 13:31:46 +020045
46 #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010047 }
48 Device (UNCR)
49 {
50 Name (_BBN, 0xFF)
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010051 Name (RID, 0x00)
52 Name (_HID, EisaId ("PNP0A03"))
53 Name (_CRS, ResourceTemplate ()
54 {
55 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
56 0x0000, /* Granularity */
57 0x00FF, /* Range Minimum */
58 0x00FF, /* Range Maximum */
59 0x0000, /* Translation Offset */
60 0x0001, /* Length */
61 ,, )
62 })
63 Device (SAD)
64 {
65 Name (_ADR, 0x01)
66 Name (RID, 0x00)
67 OperationRegion (SADC, PCI_Config, 0x00, 0x0100)
68 Field (SADC, DWordAcc, NoLock, Preserve)
69 {
70 Offset (0x40),
71 PAM0, 8,
72 PAM1, 8,
73 PAM2, 8,
74 PAM3, 8,
75 PAM4, 8,
76 PAM5, 8,
77 PAM6, 8
78 }
79 }
80 }
81 }
82
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010083 /* Chipset specific sleep states */
Subrata Banik2715cdb2019-10-30 16:48:19 +053084 #include <southbridge/intel/common/acpi/sleepstates.asl>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010085}