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Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +01001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +010018 * Foundation, Inc.
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010019 */
20
21DefinitionBlock(
22 "dsdt.aml",
23 "DSDT",
24 0x03, /* DSDT revision: ACPI v3.0 */
25 "COREv4", /* OEM id */
26 "COREBOOT", /* OEM table id */
27 0x20140108 /* OEM revision */
28)
29{
30 /* Some generic macros */
31 #include "acpi/platform.asl"
32
33 /* global NVS and variables */
34 #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
35
36 /* General Purpose Events */
37 #include "acpi/gpe.asl"
38
39 #include <cpu/intel/model_206ax/acpi/cpu.asl>
40
41 Scope (\_SB) {
42 Device (PCI0)
43 {
44 #include <northbridge/intel/nehalem/acpi/nehalem.asl>
45 #include <southbridge/intel/bd82x6x/acpi/pch.asl>
Kyösti Mälkkia4823222015-06-06 11:03:12 +030046 #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
Nico Huber954a55b2015-08-27 13:31:46 +020047
48 #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010049 }
50 Device (UNCR)
51 {
52 Name (_BBN, 0xFF)
53 Name (_ADR, 0x00)
54 Name (RID, 0x00)
55 Name (_HID, EisaId ("PNP0A03"))
56 Name (_CRS, ResourceTemplate ()
57 {
58 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
59 0x0000, /* Granularity */
60 0x00FF, /* Range Minimum */
61 0x00FF, /* Range Maximum */
62 0x0000, /* Translation Offset */
63 0x0001, /* Length */
64 ,, )
65 })
66 Device (SAD)
67 {
68 Name (_ADR, 0x01)
69 Name (RID, 0x00)
70 OperationRegion (SADC, PCI_Config, 0x00, 0x0100)
71 Field (SADC, DWordAcc, NoLock, Preserve)
72 {
73 Offset (0x40),
74 PAM0, 8,
75 PAM1, 8,
76 PAM2, 8,
77 PAM3, 8,
78 PAM4, 8,
79 PAM5, 8,
80 PAM6, 8
81 }
82 }
83 }
84 }
85
Vladimir Serbinenkob1ccccc2014-02-19 22:20:14 +010086 /* Chipset specific sleep states */
87 #include <southbridge/intel/i82801gx/acpi/sleepstates.asl>
88}