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Martin Rothc7acf162020-05-28 00:44:50 -06001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include "psp_verstage.h"
4
Felix Held26935d12020-12-08 00:40:04 +01005#include <amdblocks/acpimmio.h>
Martin Rothc7acf162020-05-28 00:44:50 -06006#include <bl_uapp/bl_syscall_public.h>
7#include <boot_device.h>
Martin Rothe21698b2020-06-26 08:55:15 -06008#include <cbfs.h>
Martin Rothc7acf162020-05-28 00:44:50 -06009#include <console/console.h>
Martin Rothe21698b2020-06-26 08:55:15 -060010#include <fmap.h>
Martin Roth50cca762020-08-13 11:06:18 -060011#include <pc80/mc146818rtc.h>
Martin Roth0c12abe2020-06-26 08:40:56 -060012#include <soc/psp_transfer.h>
Martin Roth50cca762020-08-13 11:06:18 -060013#include <security/vboot/vbnv.h>
Martin Rothc7acf162020-05-28 00:44:50 -060014#include <security/vboot/misc.h>
15#include <security/vboot/symbols.h>
16#include <security/vboot/vboot_common.h>
17#include <arch/stages.h>
18#include <stdarg.h>
19#include <stdio.h>
Kangheui Won4e2f5fd2020-09-17 16:37:13 +100020#include <timestamp.h>
Martin Rothc7acf162020-05-28 00:44:50 -060021
Martin Rothc7acf162020-05-28 00:44:50 -060022extern char _bss_start, _bss_end;
23static struct mem_region_device boot_dev =
24 MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE);
25
26void __weak verstage_mainboard_early_init(void) {}
27void __weak verstage_mainboard_init(void) {}
Kangheui Won695732b2021-04-25 12:11:17 +100028uint32_t __weak get_max_workbuf_size(uint32_t *size)
29{
30 /* This svc only exists in picasso and deprecated for later platforms.
31 * Provide sane default function here for those platforms.
32 */
33 *size = (uint32_t)((uintptr_t)_etransfer_buffer - (uintptr_t)_transfer_buffer);
34 return 0;
35}
Martin Rothc7acf162020-05-28 00:44:50 -060036
37static void reboot_into_recovery(struct vb2_context *ctx, uint32_t subcode)
38{
39 subcode += PSP_VBOOT_ERROR_SUBCODE;
40 svc_write_postcode(subcode);
41
Martin Rothc9689e02020-08-20 17:25:37 -060042 /*
43 * If there's an error but the PSP_verstage is already booting to RO,
44 * don't reset the system. It may be that the error is fatal, but if
45 * the system is stuck, don't intentionally force it into a reboot loop.
46 */
47 if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
48 printk(BIOS_ERR, "Already in recovery mode. Staying in RO.\n");
49 return;
50 }
51
Martin Rothc7acf162020-05-28 00:44:50 -060052 vb2api_fail(ctx, VB2_RECOVERY_RO_UNSPECIFIED, (int)subcode);
53 vboot_save_data(ctx);
54
55 svc_debug_print("Rebooting into recovery\n");
56 vboot_reboot();
57}
58
Martin Roth50cca762020-08-13 11:06:18 -060059static uint32_t check_cmos_recovery(void)
60{
61 /* Only reset if cmos is valid */
62 if (vbnv_cmos_failed())
63 return 0;
64
65 /* If the byte is set, clear it, then return error to reboot */
66 if (cmos_read(CMOS_RECOVERY_BYTE) == CMOS_RECOVERY_MAGIC_VAL) {
67 cmos_write(0x00, CMOS_RECOVERY_BYTE);
68 printk(BIOS_DEBUG, "Reboot into recovery requested by coreboot\n");
69 return POSTCODE_CMOS_RECOVERY;
70 }
71
72 return 0;
73}
74
Martin Rothc7acf162020-05-28 00:44:50 -060075/*
76 * Tell the PSP where to load the rest of the firmware from
77 */
78static uint32_t update_boot_region(struct vb2_context *ctx)
79{
80 struct psp_ef_table *ef_table;
81 uint32_t psp_dir_addr, bios_dir_addr;
82 uint32_t *psp_dir_in_spi, *bios_dir_in_spi;
Kangheui Wonac7ec272021-01-15 15:04:25 +110083 const char *fname;
84 void *amdfw_location;
Martin Rothc7acf162020-05-28 00:44:50 -060085
86 /* Continue booting from RO */
87 if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
88 printk(BIOS_ERR, "In recovery mode. Staying in RO.\n");
89 return 0;
90 }
91
92 if (vboot_is_firmware_slot_a(ctx)) {
Martin Rothe21698b2020-06-26 08:55:15 -060093 fname = "apu/amdfw_a";
Martin Rothc7acf162020-05-28 00:44:50 -060094 } else {
Martin Rothe21698b2020-06-26 08:55:15 -060095 fname = "apu/amdfw_b";
Martin Rothc7acf162020-05-28 00:44:50 -060096 }
97
Kangheui Wonac7ec272021-01-15 15:04:25 +110098 amdfw_location = cbfs_map(fname, NULL);
Martin Rothe21698b2020-06-26 08:55:15 -060099 if (!amdfw_location) {
100 printk(BIOS_ERR, "Error: AMD Firmware table not found.\n");
101 return POSTCODE_AMD_FW_MISSING;
102 }
103 ef_table = (struct psp_ef_table *)amdfw_location;
Martin Rothc7acf162020-05-28 00:44:50 -0600104 if (ef_table->signature != EMBEDDED_FW_SIGNATURE) {
105 printk(BIOS_ERR, "Error: ROMSIG address is not correct.\n");
106 return POSTCODE_ROMSIG_MISMATCH_ERROR;
107 }
108
109 psp_dir_addr = ef_table->psp_table;
110 bios_dir_addr = ef_table->bios1_entry;
111 psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) +
112 (uint32_t)boot_dev.base);
113 bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) +
114 (uint32_t)boot_dev.base);
115 if (*psp_dir_in_spi != PSP_COOKIE) {
116 printk(BIOS_ERR, "Error: PSP Directory address is not correct.\n");
117 return POSTCODE_PSP_COOKIE_MISMATCH_ERROR;
118 }
119 if (*bios_dir_in_spi != BDT1_COOKIE) {
120 printk(BIOS_ERR, "Error: BIOS Directory address is not correct.\n");
121 return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR;
122 }
123
Kangheui Wona767eb42021-04-14 09:35:28 +1000124 if (update_psp_bios_dir((void *)&psp_dir_addr, (void *)&bios_dir_addr)) {
Martin Rothc7acf162020-05-28 00:44:50 -0600125 printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n");
126 return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR;
127 }
128
129 return 0;
130}
131
132/*
133 * Save workbuf (and soon memory console and timestamps) to the bootloader to pass
134 * back to coreboot.
135 */
136static uint32_t save_buffers(struct vb2_context **ctx)
137{
138 uint32_t retval;
Martin Roth0c12abe2020-06-26 08:40:56 -0600139 uint32_t buffer_size = MIN_TRANSFER_BUFFER_SIZE;
Martin Rothc7acf162020-05-28 00:44:50 -0600140 uint32_t max_buffer_size;
Martin Roth0c12abe2020-06-26 08:40:56 -0600141 struct transfer_info_struct buffer_info = {0};
Martin Rothc7acf162020-05-28 00:44:50 -0600142
143 /*
Kangheui Won695732b2021-04-25 12:11:17 +1000144 * This should never fail on picasso, but if it does, we should still
145 * try to save the buffer. If that fails, then we should go to
146 * recovery mode.
Martin Rothc7acf162020-05-28 00:44:50 -0600147 */
Kangheui Won695732b2021-04-25 12:11:17 +1000148 if (get_max_workbuf_size(&max_buffer_size)) {
Martin Rothc7acf162020-05-28 00:44:50 -0600149 post_code(POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE);
150 printk(BIOS_NOTICE, "Notice: using default transfer buffer size.\n");
Martin Roth0c12abe2020-06-26 08:40:56 -0600151 max_buffer_size = MIN_TRANSFER_BUFFER_SIZE;
Martin Rothc7acf162020-05-28 00:44:50 -0600152 }
153 printk(BIOS_DEBUG, "\nMaximum buffer size: %d bytes\n", max_buffer_size);
154
Martin Roth0c12abe2020-06-26 08:40:56 -0600155 /* Shrink workbuf if MP2 is in use and cannot be used to save buffer */
156 if (max_buffer_size < VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) {
157 retval = vb2api_relocate(_vboot2_work, _vboot2_work, MIN_WORKBUF_TRANSFER_SIZE,
158 ctx);
159 if (retval != VB2_SUCCESS) {
160 printk(BIOS_ERR, "Error shrinking workbuf. Error code %#x\n", retval);
161 buffer_size = VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE;
162 post_code(POSTCODE_WORKBUF_RESIZE_WARNING);
163 }
164 } else {
165 buffer_size =
166 (uint32_t)((uintptr_t)_etransfer_buffer - (uintptr_t)_transfer_buffer);
167
168 buffer_info.console_offset = (uint32_t)((uintptr_t)_preram_cbmem_console -
169 (uintptr_t)_transfer_buffer);
170 buffer_info.timestamp_offset = (uint32_t)((uintptr_t)_timestamp -
171 (uintptr_t)_transfer_buffer);
172 buffer_info.fmap_offset = (uint32_t)((uintptr_t)_fmap_cache -
173 (uintptr_t)_transfer_buffer);
Martin Rothc7acf162020-05-28 00:44:50 -0600174 }
175
176 if (buffer_size > max_buffer_size) {
Martin Roth0c12abe2020-06-26 08:40:56 -0600177 printk(BIOS_ERR, "Error: Buffer is larger than max buffer size.\n");
Martin Rothc7acf162020-05-28 00:44:50 -0600178 post_code(POSTCODE_WORKBUF_BUFFER_SIZE_ERROR);
179 return POSTCODE_WORKBUF_BUFFER_SIZE_ERROR;
180 }
181
Martin Roth0c12abe2020-06-26 08:40:56 -0600182 buffer_info.magic_val = TRANSFER_MAGIC_VAL;
183 buffer_info.struct_bytes = sizeof(buffer_info);
184 buffer_info.buffer_size = buffer_size;
185 buffer_info.workbuf_offset = (uint32_t)((uintptr_t)_fmap_cache -
186 (uintptr_t)_vboot2_work);
187
Kangheui Won5f027fa2020-08-25 18:12:19 +1000188 memcpy(_transfer_buffer, &buffer_info, sizeof(buffer_info));
189
Kangheui Wona767eb42021-04-14 09:35:28 +1000190 retval = save_uapp_data((void *)_transfer_buffer, buffer_size);
Martin Rothc7acf162020-05-28 00:44:50 -0600191 if (retval) {
Martin Roth0c12abe2020-06-26 08:40:56 -0600192 printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n", retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600193 return POSTCODE_WORKBUF_SAVE_ERROR;
194 }
195
196 return 0;
197}
198
199void Main(void)
200{
201 uint32_t retval;
202 struct vb2_context *ctx = NULL;
203
204 /*
205 * Do not use printk() before console_init()
206 * Do not use post_code() before verstage_mainboard_init()
207 */
Kangheui Won4e2f5fd2020-09-17 16:37:13 +1000208 timestamp_init(timestamp_get());
Martin Rothc7acf162020-05-28 00:44:50 -0600209 svc_write_postcode(POSTCODE_ENTERED_PSP_VERSTAGE);
210 svc_debug_print("Entering verstage on PSP\n");
211 memset(&_bss_start, '\0', &_bss_end - &_bss_start);
212
213 svc_write_postcode(POSTCODE_CONSOLE_INIT);
214 console_init();
215
216 svc_write_postcode(POSTCODE_EARLY_INIT);
217 retval = verstage_soc_early_init();
218 if (retval) {
219 svc_debug_print("verstage_soc_early_init failed\n");
220 reboot_into_recovery(NULL, retval);
221 }
222 svc_debug_print("calling verstage_mainboard_early_init\n");
223
224 verstage_mainboard_early_init();
225
226 svc_write_postcode(POSTCODE_LATE_INIT);
Felix Held26935d12020-12-08 00:40:04 +0100227 fch_io_enable_legacy_io();
Martin Rothc7acf162020-05-28 00:44:50 -0600228 verstage_soc_init();
229 verstage_mainboard_init();
230
231 post_code(POSTCODE_VERSTAGE_MAIN);
232
Kangheui Wonac7ec272021-01-15 15:04:25 +1100233 vboot_run_logic();
Martin Rothc7acf162020-05-28 00:44:50 -0600234
Martin Rothc9689e02020-08-20 17:25:37 -0600235 ctx = vboot_get_context();
Martin Roth50cca762020-08-13 11:06:18 -0600236 retval = check_cmos_recovery();
237 if (retval)
Martin Rothc9689e02020-08-20 17:25:37 -0600238 reboot_into_recovery(ctx, retval);
Martin Roth0c12abe2020-06-26 08:40:56 -0600239
Kangheui Wonac7ec272021-01-15 15:04:25 +1100240 post_code(POSTCODE_UPDATE_BOOT_REGION);
241 retval = update_boot_region(ctx);
242 if (retval)
243 reboot_into_recovery(ctx, retval);
244
Martin Rothc7acf162020-05-28 00:44:50 -0600245 post_code(POSTCODE_SAVE_BUFFERS);
246 retval = save_buffers(&ctx);
247 if (retval)
Martin Rothc9689e02020-08-20 17:25:37 -0600248 reboot_into_recovery(ctx, retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600249
Martin Rothc7acf162020-05-28 00:44:50 -0600250
251 post_code(POSTCODE_UNMAP_SPI_ROM);
252 if (boot_dev.base) {
253 if (svc_unmap_spi_rom((void *)boot_dev.base))
254 printk(BIOS_ERR, "Error unmapping SPI rom\n");
255 }
256
257 post_code(POSTCODE_UNMAP_FCH_DEVICES);
258 unmap_fch_devices();
259
260 post_code(POSTCODE_LEAVING_VERSTAGE);
261
262 printk(BIOS_DEBUG, "Leaving verstage on PSP\n");
263 svc_exit(retval);
Martin Rothc7acf162020-05-28 00:44:50 -0600264}
265
266const struct region_device *boot_device_ro(void)
267{
268 uintptr_t *addr;
269
270 addr = map_spi_rom();
271 mem_region_device_ro_init(&boot_dev, (void *)addr, CONFIG_ROM_SIZE);
272
273 return &boot_dev.rdev;
274}
275
276/*
277 * The stage_entry function is not used directly, but stage_entry() is marked as an entry
278 * point in arm/arch/header.h, so if stage_entry() isn't present and calling Main(), all
279 * the verstage code gets dropped by the linker. Slightly hacky, but mostly harmless.
280 */
281void stage_entry(uintptr_t stage_arg)
282{
283 Main();
284}