Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; version 2 of the License. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 12 | */ |
| 13 | |
Duncan Laurie | 59be624 | 2016-03-07 13:21:56 -0800 | [diff] [blame] | 14 | #include <bootmode.h> |
Aaron Durbin | 39bdb0b | 2015-08-04 23:59:43 -0500 | [diff] [blame] | 15 | #include <arch/acpi.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 16 | #include <console/console.h> |
Kyösti Mälkki | b2a5f0b | 2019-08-04 19:54:32 +0300 | [diff] [blame] | 17 | #include <cpu/x86/smm.h> |
Lee Leahy | 94b856e | 2015-10-15 12:07:03 -0700 | [diff] [blame] | 18 | #include <fsp/ramstage.h> |
Aaron Durbin | 789f2b6 | 2015-09-09 17:05:06 -0500 | [diff] [blame] | 19 | #include <fsp/util.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 20 | #include <lib.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 21 | #include <stage_cache.h> |
Aaron Durbin | 39bdb0b | 2015-08-04 23:59:43 -0500 | [diff] [blame] | 22 | #include <string.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 23 | #include <timestamp.h> |
Frans Hendriks | 50b999f | 2019-11-08 13:55:45 +0100 | [diff] [blame] | 24 | #include <cbmem.h> |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 25 | |
| 26 | /* SOC initialization after FSP silicon init */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 27 | __weak void soc_after_silicon_init(void) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 28 | { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 29 | } |
| 30 | |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 31 | static void display_hob_info(FSP_INFO_HEADER *fsp_info_header) |
| 32 | { |
| 33 | const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID; |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 34 | void *hob_list_ptr = get_hob_list(); |
| 35 | |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 36 | /* Verify the HOBs */ |
| 37 | if (hob_list_ptr == NULL) { |
Frans Hendriks | 509f469 | 2019-06-28 14:11:41 +0200 | [diff] [blame] | 38 | printk(BIOS_ERR, "ERROR - HOB pointer is NULL!\n"); |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 39 | return; |
| 40 | } |
| 41 | |
Frans Hendriks | 509f469 | 2019-06-28 14:11:41 +0200 | [diff] [blame] | 42 | if (CONFIG(DISPLAY_HOBS)) |
| 43 | print_hob_type_structure(0, hob_list_ptr); |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 44 | |
| 45 | /* |
| 46 | * Verify that FSP is generating the required HOBs: |
| 47 | * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0 |
| 48 | * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified by raminit |
| 49 | * 7.3: FSP_NON_VOLATILE_STORAGE_HOB verified by raminit |
| 50 | * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified by raminit |
| 51 | * 7.5: EFI_PEI_GRAPHICS_INFO_HOB verified below, |
| 52 | * if the ImageAttribute bit is set |
| 53 | * FSP_SMBIOS_MEMORY_INFO HOB verified by raminit |
| 54 | */ |
| 55 | if ((fsp_info_header->ImageAttribute & GRAPHICS_SUPPORT_BIT) && |
Frans Hendriks | 509f469 | 2019-06-28 14:11:41 +0200 | [diff] [blame] | 56 | !get_next_guid_hob(&graphics_info_guid, hob_list_ptr) && |
| 57 | CONFIG(DISPLAY_HOBS)) { |
| 58 | printk(BIOS_ERR, "7.5: EFI_PEI_GRAPHICS_INFO_HOB missing!\n"); |
| 59 | printk(BIOS_ERR, |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 60 | "ERROR - Missing one or more required FSP HOBs!\n"); |
Frans Hendriks | 509f469 | 2019-06-28 14:11:41 +0200 | [diff] [blame] | 61 | } |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 62 | } |
| 63 | |
Lee Leahy | cff5f09 | 2016-02-08 08:37:53 -0800 | [diff] [blame] | 64 | void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 65 | { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 66 | FSP_SILICON_INIT fsp_silicon_init; |
| 67 | SILICON_INIT_UPD *original_params; |
| 68 | SILICON_INIT_UPD silicon_init_params; |
| 69 | EFI_STATUS status; |
| 70 | UPD_DATA_REGION *upd_ptr; |
| 71 | VPD_DATA_REGION *vpd_ptr; |
Wim Vervoorn | 67117c3 | 2019-12-16 14:21:09 +0100 | [diff] [blame^] | 72 | const struct cbmem_entry *logo_entry = NULL; |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 73 | |
Lee Leahy | cff5f09 | 2016-02-08 08:37:53 -0800 | [diff] [blame] | 74 | /* Display the FSP header */ |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 75 | if (fsp_info_header == NULL) { |
| 76 | printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n"); |
| 77 | return; |
| 78 | } |
| 79 | print_fsp_info(fsp_info_header); |
| 80 | |
| 81 | /* Initialize the UPD values */ |
| 82 | vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset + |
| 83 | fsp_info_header->ImageBase); |
Julius Werner | 540a980 | 2019-12-09 13:03:29 -0800 | [diff] [blame] | 84 | printk(BIOS_DEBUG, "%p: VPD Data\n", vpd_ptr); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 85 | upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset + |
| 86 | fsp_info_header->ImageBase); |
Julius Werner | 540a980 | 2019-12-09 13:03:29 -0800 | [diff] [blame] | 87 | printk(BIOS_DEBUG, "%p: UPD Data\n", upd_ptr); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 88 | original_params = (void *)((u8 *)upd_ptr + |
| 89 | upd_ptr->SiliconInitUpdOffset); |
| 90 | memcpy(&silicon_init_params, original_params, |
| 91 | sizeof(silicon_init_params)); |
| 92 | soc_silicon_init_params(&silicon_init_params); |
| 93 | |
| 94 | /* Locate VBT and pass to FSP GOP */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 95 | if (CONFIG(RUN_FSP_GOP)) |
Aaron Durbin | 39bdb0b | 2015-08-04 23:59:43 -0500 | [diff] [blame] | 96 | load_vbt(is_s3_wakeup, &silicon_init_params); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 97 | mainboard_silicon_init_params(&silicon_init_params); |
| 98 | |
Wim Vervoorn | 67117c3 | 2019-12-16 14:21:09 +0100 | [diff] [blame^] | 99 | if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) |
| 100 | logo_entry = soc_load_logo(&silicon_init_params); |
Frans Hendriks | 50b999f | 2019-11-08 13:55:45 +0100 | [diff] [blame] | 101 | |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 102 | /* Display the UPD data */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 103 | if (CONFIG(DISPLAY_UPD_DATA)) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 104 | soc_display_silicon_init_params(original_params, |
| 105 | &silicon_init_params); |
| 106 | |
| 107 | /* Perform silicon initialization after RAM is configured */ |
| 108 | printk(BIOS_DEBUG, "Calling FspSiliconInit\n"); |
| 109 | fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase |
| 110 | + fsp_info_header->FspSiliconInitEntryOffset); |
| 111 | timestamp_add_now(TS_FSP_SILICON_INIT_START); |
Julius Werner | 540a980 | 2019-12-09 13:03:29 -0800 | [diff] [blame] | 112 | printk(BIOS_DEBUG, "Calling FspSiliconInit(%p) at %p\n", |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 113 | &silicon_init_params, fsp_silicon_init); |
Duncan Laurie | fb50983 | 2015-11-22 14:53:57 -0800 | [diff] [blame] | 114 | post_code(POST_FSP_SILICON_INIT); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 115 | status = fsp_silicon_init(&silicon_init_params); |
| 116 | timestamp_add_now(TS_FSP_SILICON_INIT_END); |
| 117 | printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); |
| 118 | |
Frans Hendriks | 50b999f | 2019-11-08 13:55:45 +0100 | [diff] [blame] | 119 | /* The logo_entry can be freed up now as it is not required any longer */ |
Wim Vervoorn | 67117c3 | 2019-12-16 14:21:09 +0100 | [diff] [blame^] | 120 | if (logo_entry && !is_s3_wakeup) |
Frans Hendriks | 50b999f | 2019-11-08 13:55:45 +0100 | [diff] [blame] | 121 | cbmem_entry_remove(logo_entry); |
| 122 | |
Duncan Laurie | 59be624 | 2016-03-07 13:21:56 -0800 | [diff] [blame] | 123 | /* Mark graphics init done after SiliconInit if VBT was provided */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 124 | #if CONFIG(RUN_FSP_GOP) |
Duncan Laurie | 59be624 | 2016-03-07 13:21:56 -0800 | [diff] [blame] | 125 | /* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs |
Elyes HAOUAS | 2e4d806 | 2016-08-25 20:50:50 +0200 | [diff] [blame] | 126 | * to be #if'd out instead of using if (). */ |
Duncan Laurie | 59be624 | 2016-03-07 13:21:56 -0800 | [diff] [blame] | 127 | if (silicon_init_params.GraphicsConfigPtr) |
| 128 | gfx_set_init_done(1); |
| 129 | #endif |
| 130 | |
Alexandru Gagniuc | 41c003c | 2015-08-28 19:07:35 -0400 | [diff] [blame] | 131 | display_hob_info(fsp_info_header); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 132 | soc_after_silicon_init(); |
| 133 | } |
| 134 | |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 135 | static void fsp_cache_save(struct prog *fsp) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 136 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 137 | if (CONFIG(NO_STAGE_CACHE)) |
Furquan Shaikh | 1e162bf | 2016-05-06 09:20:35 -0700 | [diff] [blame] | 138 | return; |
| 139 | |
| 140 | printk(BIOS_DEBUG, "FSP: Saving binary in cache\n"); |
| 141 | |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 142 | if (prog_entry(fsp) == NULL) { |
| 143 | printk(BIOS_ERR, "ERROR: No FSP to save in cache.\n"); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 144 | return; |
| 145 | } |
| 146 | |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 147 | stage_cache_add(STAGE_REFCODE, fsp); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 148 | } |
| 149 | |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 150 | static int fsp_find_and_relocate(struct prog *fsp) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 151 | { |
Aaron Durbin | 5d6f0f9 | 2015-10-08 15:06:28 -0500 | [diff] [blame] | 152 | if (prog_locate(fsp)) { |
| 153 | printk(BIOS_ERR, "ERROR: Couldn't find %s\n", prog_name(fsp)); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 154 | return -1; |
| 155 | } |
| 156 | |
Aaron Durbin | 5d6f0f9 | 2015-10-08 15:06:28 -0500 | [diff] [blame] | 157 | if (fsp_relocate(fsp, prog_rdev(fsp))) { |
Aaron Durbin | 22ea007 | 2015-08-05 10:17:33 -0500 | [diff] [blame] | 158 | printk(BIOS_ERR, "ERROR: FSP relocation failed.\n"); |
| 159 | return -1; |
| 160 | } |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 161 | |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 162 | return 0; |
| 163 | } |
| 164 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 165 | void fsp_load(void) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 166 | { |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 167 | static int load_done; |
Aaron Durbin | 7e7a4df | 2015-12-08 14:34:35 -0600 | [diff] [blame] | 168 | struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin"); |
Aaron Durbin | 39bdb0b | 2015-08-04 23:59:43 -0500 | [diff] [blame] | 169 | int is_s3_wakeup = acpi_is_wakeup_s3(); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 170 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 171 | if (load_done) |
| 172 | return; |
| 173 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 174 | if (is_s3_wakeup && !CONFIG(NO_STAGE_CACHE)) { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 175 | printk(BIOS_DEBUG, "FSP: Loading binary from cache\n"); |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 176 | stage_cache_load_stage(STAGE_REFCODE, &fsp); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 177 | } else { |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 178 | fsp_find_and_relocate(&fsp); |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 179 | fsp_cache_save(&fsp); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 180 | } |
| 181 | |
Aaron Durbin | abf87a2 | 2015-08-05 12:26:56 -0500 | [diff] [blame] | 182 | /* FSP_INFO_HEADER is set as the program entry. */ |
| 183 | fsp_update_fih(prog_entry(&fsp)); |
| 184 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 185 | load_done = 1; |
| 186 | } |
| 187 | |
| 188 | void intel_silicon_init(void) |
| 189 | { |
| 190 | fsp_load(); |
| 191 | fsp_run_silicon_init(fsp_get_fih(), acpi_is_wakeup_s3()); |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | /* Initialize the UPD parameters for SiliconInit */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 195 | __weak void mainboard_silicon_init_params( |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 196 | SILICON_INIT_UPD *params) |
| 197 | { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 198 | }; |
| 199 | |
| 200 | /* Display the UPD parameters for SiliconInit */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 201 | __weak void soc_display_silicon_init_params( |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 202 | const SILICON_INIT_UPD *old, SILICON_INIT_UPD *new) |
| 203 | { |
| 204 | printk(BIOS_SPEW, "UPD values for SiliconInit:\n"); |
| 205 | hexdump32(BIOS_SPEW, new, sizeof(*new)); |
| 206 | } |
| 207 | |
| 208 | /* Initialize the UPD parameters for SiliconInit */ |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 209 | __weak void soc_silicon_init_params(SILICON_INIT_UPD *params) |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 210 | { |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 211 | } |
Wim Vervoorn | 67117c3 | 2019-12-16 14:21:09 +0100 | [diff] [blame^] | 212 | |
| 213 | /* Load bmp and set FSP parameters, fsp_load_logo can be used */ |
| 214 | __weak const struct cbmem_entry *soc_load_logo(SILICON_INIT_UPD *params) |
| 215 | { |
| 216 | return NULL; |
| 217 | } |