Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 18 | #include <device/pci_def.h> |
Jonathan A. Kollasch | 2596283 | 2012-07-10 10:14:17 -0500 | [diff] [blame] | 19 | #include <device/pci_ids.h> |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 20 | #include <device/device.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 21 | #include <device/pci_ops.h> |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 22 | #include <arch/io.h> |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 23 | #include <ec/acpi/ec.h> |
Sven Schnelle | 8099cbf | 2011-04-04 10:57:17 +0000 | [diff] [blame] | 24 | #include <northbridge/intel/i945/i945.h> |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 25 | #include <pc80/mc146818rtc.h> |
Sven Schnelle | 50270b8 | 2011-04-27 19:48:05 +0000 | [diff] [blame] | 26 | #include "dock.h" |
Vladimir Serbinenko | a2a906e | 2014-09-01 01:41:37 +0200 | [diff] [blame] | 27 | #include <drivers/intel/gma/int15.h> |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 28 | #include <drivers/lenovo/lenovo.h> |
| 29 | #include <arch/acpigen.h> |
Vladimir Serbinenko | a2a906e | 2014-09-01 01:41:37 +0200 | [diff] [blame] | 30 | |
Denis 'GNUtoo' Carikli | 4062f17 | 2013-05-21 03:13:46 +0200 | [diff] [blame] | 31 | #define PANEL INT15_5F35_CL_DISPLAY_DEFAULT |
Sven Schnelle | 6eb8bef | 2011-10-23 16:57:50 +0200 | [diff] [blame] | 32 | |
Arthur Heymans | e1f0ac4 | 2016-05-19 16:02:38 +0200 | [diff] [blame] | 33 | #define MWAIT_RES(state, sub_state) \ |
| 34 | { \ |
| 35 | .space_id = ACPI_ADDRESS_SPACE_FIXED, \ |
| 36 | .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \ |
| 37 | .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \ |
| 38 | { \ |
| 39 | .resv = 0, \ |
| 40 | }, \ |
| 41 | .addrl = (((state) << 4) | (sub_state)), \ |
| 42 | .addrh = 0, \ |
| 43 | } |
| 44 | |
Stefan Reinauer | 4cc8c70 | 2012-04-27 21:34:16 +0200 | [diff] [blame] | 45 | static acpi_cstate_t cst_entries[] = { |
Arthur Heymans | e1f0ac4 | 2016-05-19 16:02:38 +0200 | [diff] [blame] | 46 | { |
| 47 | .ctype = 1, |
| 48 | .latency = 1, |
| 49 | .power = 1000, |
| 50 | .resource = MWAIT_RES(0, 0), |
| 51 | }, |
| 52 | { |
| 53 | .ctype = 2, |
| 54 | .latency = 1, |
| 55 | .power = 500, |
| 56 | .resource = MWAIT_RES(1, 0), |
| 57 | }, |
| 58 | { |
| 59 | .ctype = 3, |
| 60 | .latency = 17, |
| 61 | .power = 250, |
| 62 | .resource = MWAIT_RES(2, 0), |
| 63 | }, |
Sven Schnelle | 6eb8bef | 2011-10-23 16:57:50 +0200 | [diff] [blame] | 64 | }; |
| 65 | |
Stefan Reinauer | 4cc8c70 | 2012-04-27 21:34:16 +0200 | [diff] [blame] | 66 | int get_cst_entries(acpi_cstate_t **entries) |
Sven Schnelle | 6eb8bef | 2011-10-23 16:57:50 +0200 | [diff] [blame] | 67 | { |
| 68 | *entries = cst_entries; |
| 69 | return ARRAY_SIZE(cst_entries); |
| 70 | } |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 71 | |
Elyes HAOUAS | 64b759e | 2018-05-05 09:11:32 +0200 | [diff] [blame^] | 72 | static void mainboard_init(struct device *dev) |
Sven Schnelle | b31eb3e | 2011-04-05 13:00:14 +0000 | [diff] [blame] | 73 | { |
Elyes HAOUAS | 64b759e | 2018-05-05 09:11:32 +0200 | [diff] [blame^] | 74 | struct device *idedev, *sdhci_dev; |
Sven Schnelle | b31eb3e | 2011-04-05 13:00:14 +0000 | [diff] [blame] | 75 | |
Sven Schnelle | 8d0b86c | 2011-07-11 18:36:16 +0200 | [diff] [blame] | 76 | ec_clr_bit(0x03, 2); |
| 77 | |
| 78 | if (inb(0x164c) & 0x08) { |
| 79 | ec_set_bit(0x03, 2); |
| 80 | ec_write(0x0c, 0x88); |
| 81 | } |
Denis 'GNUtoo' Carikli | 4062f17 | 2013-05-21 03:13:46 +0200 | [diff] [blame] | 82 | |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 83 | install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, |
| 84 | GMA_INT15_PANEL_FIT_DEFAULT, |
| 85 | PANEL, 3); |
Denis 'GNUtoo' Carikli | 4062f17 | 2013-05-21 03:13:46 +0200 | [diff] [blame] | 86 | |
Sven Schnelle | 8099cbf | 2011-04-04 10:57:17 +0000 | [diff] [blame] | 87 | /* If we're resuming from suspend, blink suspend LED */ |
Kyösti Mälkki | 8183025 | 2016-06-25 11:40:00 +0300 | [diff] [blame] | 88 | if (acpi_is_wakeup_s3()) |
Sven Schnelle | 8099cbf | 2011-04-04 10:57:17 +0000 | [diff] [blame] | 89 | ec_write(0x0c, 0xc7); |
Sven Schnelle | 50270b8 | 2011-04-27 19:48:05 +0000 | [diff] [blame] | 90 | |
| 91 | idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1)); |
| 92 | if (idedev && idedev->chip_info && dock_ultrabay_device_present()) { |
| 93 | struct southbridge_intel_i82801gx_config *config = idedev->chip_info; |
| 94 | config->ide_enable_primary = 1; |
| 95 | /* enable Ultrabay power */ |
| 96 | outb(inb(0x1628) | 0x01, 0x1628); |
| 97 | ec_write(0x0c, 0x84); |
| 98 | } else { |
| 99 | /* disable Ultrabay power */ |
| 100 | outb(inb(0x1628) & ~0x01, 0x1628); |
| 101 | ec_write(0x0c, 0x04); |
| 102 | } |
Sven Schnelle | d40d4f77 | 2011-06-12 15:08:58 +0200 | [diff] [blame] | 103 | |
Jonathan A. Kollasch | 2596283 | 2012-07-10 10:14:17 -0500 | [diff] [blame] | 104 | /* Set SDHCI write protect polarity "SDWPPol" */ |
| 105 | sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0); |
| 106 | if (sdhci_dev) { |
| 107 | if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) { |
| 108 | /* unlock */ |
| 109 | pci_write_config8(sdhci_dev, 0xf9, 0xfc); |
| 110 | /* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */ |
| 111 | pci_write_config8(sdhci_dev, 0xfa, 0x20); |
| 112 | /* restore lock */ |
| 113 | pci_write_config8(sdhci_dev, 0xf9, 0x00); |
| 114 | } |
| 115 | } |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 116 | } |
| 117 | |
Elyes HAOUAS | 64b759e | 2018-05-05 09:11:32 +0200 | [diff] [blame^] | 118 | static void fill_ssdt(struct device *device) |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 119 | { |
| 120 | drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 1); |
| 121 | } |
| 122 | |
Elyes HAOUAS | 64b759e | 2018-05-05 09:11:32 +0200 | [diff] [blame^] | 123 | static void mainboard_enable(struct device *dev) |
Peter Stuge | eac9916 | 2013-07-06 20:05:13 +0200 | [diff] [blame] | 124 | { |
| 125 | dev->ops->init = mainboard_init; |
Vladimir Serbinenko | 0e64617 | 2014-08-31 00:27:05 +0200 | [diff] [blame] | 126 | dev->ops->acpi_fill_ssdt_generator = fill_ssdt; |
Peter Stuge | eac9916 | 2013-07-06 20:05:13 +0200 | [diff] [blame] | 127 | } |
| 128 | |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 129 | struct chip_operations mainboard_ops = { |
Sven Schnelle | e2ca71e | 2011-02-14 20:02:47 +0000 | [diff] [blame] | 130 | .enable_dev = mainboard_enable, |
| 131 | }; |