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Aaron Durbinf6933a62012-10-30 09:09:39 -05001chip northbridge/intel/haswell
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Aaron Durbinf6933a62012-10-30 09:09:39 -05004
5 # Enable DisplayPort 1 Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable DisplayPort 0 Hotplug with 6ms pulse
9 register "gpu_dp_c_hotplug" = "0x06"
10
11 # Enable DVI Hotplug with 6ms pulse
12 register "gpu_dp_b_hotplug" = "0x06"
13
14 device cpu_cluster 0 on
Arthur Heymans600fa262022-11-07 08:04:59 +010015 ops haswell_cpu_bus_ops
Aaron Durbinf6933a62012-10-30 09:09:39 -050016 chip cpu/intel/haswell
Matt DeVillier31769d92015-04-30 01:19:16 -050017 device lapic 0 on end
Aaron Durbinf6933a62012-10-30 09:09:39 -050018 # Magic APIC ID to locate this chip
19 device lapic 0xACAC off end
Aaron Durbinf6933a62012-10-30 09:09:39 -050020 end
21 end
22
23 device domain 0 on
Arthur Heymans600fa262022-11-07 08:04:59 +010024 ops haswell_pci_domain_ops
Aaron Durbinf6933a62012-10-30 09:09:39 -050025 device pci 00.0 on end # host bridge
26 device pci 02.0 on end # vga controller
27
28 chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
Aaron Durbinf6933a62012-10-30 09:09:39 -050029 # GPI routing
30 # 0 No effect (default)
31 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
32 # 2 SCI (if corresponding GPIO_EN bit is also set)
33 register "gpi1_routing" = "1"
34 register "gpi14_routing" = "2"
Aaron Durbinef8f4c72012-12-12 12:32:43 -060035 register "alt_gp_smi_en" = "0x0000"
Duncan Laurie467f31d2013-03-08 17:00:37 -080036 register "gpe0_en_1" = "0x4000"
Aaron Durbinf6933a62012-10-30 09:09:39 -050037
Aaron Durbinf6933a62012-10-30 09:09:39 -050038 register "sata_port_map" = "0x3f"
39
40 # SuperIO range is 0x700-0x73f
41 register "gen2_dec" = "0x003c0701"
42
43 device pci 16.0 on end # Management Engine Interface 1
44 device pci 16.1 off end # Management Engine Interface 2
45 device pci 16.2 off end # Management Engine IDE-R
46 device pci 16.3 off end # Management Engine KT
47 device pci 19.0 off end # Intel Gigabit Ethernet
48 device pci 1a.0 on end # USB2 EHCI #2
49 device pci 1b.0 on end # High Definition Audio
50 device pci 1c.0 on end # PCIe Port #1 (WLAN)
51 device pci 1c.1 off end # PCIe Port #2
52 device pci 1c.2 on end # PCIe Port #3 (Debug)
53 device pci 1c.3 on end # PCIe Port #4 (LAN)
54 device pci 1c.4 off end # PCIe Port #5
55 device pci 1c.5 off end # PCIe Port #6
56 device pci 1c.6 off end # PCIe Port #7
57 device pci 1c.7 off end # PCIe Port #8
58 device pci 1d.0 on end # USB2 EHCI #1
59 device pci 1e.0 off end # PCI bridge
60 device pci 1f.0 on end # LPC bridge
61 device pci 1f.2 on end # SATA Controller 1
62 device pci 1f.3 on end # SMBus
63 device pci 1f.5 off end # SATA Controller 2
64 device pci 1f.6 on end # Thermal
65 end
66 end
67end