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Aaron Durbinf6933a62012-10-30 09:09:39 -05001chip northbridge/intel/haswell
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Aaron Durbinf6933a62012-10-30 09:09:39 -05004
5 # Enable DisplayPort 1 Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable DisplayPort 0 Hotplug with 6ms pulse
9 register "gpu_dp_c_hotplug" = "0x06"
10
11 # Enable DVI Hotplug with 6ms pulse
12 register "gpu_dp_b_hotplug" = "0x06"
13
14 device cpu_cluster 0 on
Aaron Durbinf6933a62012-10-30 09:09:39 -050015 chip cpu/intel/haswell
Matt DeVillier31769d92015-04-30 01:19:16 -050016 device lapic 0 on end
Aaron Durbinf6933a62012-10-30 09:09:39 -050017 # Magic APIC ID to locate this chip
18 device lapic 0xACAC off end
19
Aaron Durbin7c351312013-04-10 14:46:25 -050020 register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E)
21 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
22 register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S)
Aaron Durbinf6933a62012-10-30 09:09:39 -050023
Aaron Durbin7c351312013-04-10 14:46:25 -050024 register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E)
25 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
26 register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S)
Aaron Durbinf6933a62012-10-30 09:09:39 -050027 end
28 end
29
30 device domain 0 on
31 device pci 00.0 on end # host bridge
32 device pci 02.0 on end # vga controller
33
34 chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
35 register "pirqa_routing" = "0x8b"
36 register "pirqb_routing" = "0x8a"
37 register "pirqc_routing" = "0x8b"
38 register "pirqd_routing" = "0x8b"
39 register "pirqe_routing" = "0x80"
40 register "pirqf_routing" = "0x80"
41 register "pirqg_routing" = "0x80"
42 register "pirqh_routing" = "0x80"
43
44 # GPI routing
45 # 0 No effect (default)
46 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
47 # 2 SCI (if corresponding GPIO_EN bit is also set)
48 register "gpi1_routing" = "1"
49 register "gpi14_routing" = "2"
Aaron Durbinef8f4c72012-12-12 12:32:43 -060050 register "alt_gp_smi_en" = "0x0000"
Duncan Laurie467f31d2013-03-08 17:00:37 -080051 register "gpe0_en_1" = "0x4000"
Aaron Durbinf6933a62012-10-30 09:09:39 -050052
53 register "ide_legacy_combined" = "0x0"
54 register "sata_ahci" = "0x1"
55 register "sata_port_map" = "0x3f"
56
57 # SuperIO range is 0x700-0x73f
58 register "gen2_dec" = "0x003c0701"
59
60 device pci 16.0 on end # Management Engine Interface 1
61 device pci 16.1 off end # Management Engine Interface 2
62 device pci 16.2 off end # Management Engine IDE-R
63 device pci 16.3 off end # Management Engine KT
64 device pci 19.0 off end # Intel Gigabit Ethernet
65 device pci 1a.0 on end # USB2 EHCI #2
66 device pci 1b.0 on end # High Definition Audio
67 device pci 1c.0 on end # PCIe Port #1 (WLAN)
68 device pci 1c.1 off end # PCIe Port #2
69 device pci 1c.2 on end # PCIe Port #3 (Debug)
70 device pci 1c.3 on end # PCIe Port #4 (LAN)
71 device pci 1c.4 off end # PCIe Port #5
72 device pci 1c.5 off end # PCIe Port #6
73 device pci 1c.6 off end # PCIe Port #7
74 device pci 1c.7 off end # PCIe Port #8
75 device pci 1d.0 on end # USB2 EHCI #1
76 device pci 1e.0 off end # PCI bridge
77 device pci 1f.0 on end # LPC bridge
78 device pci 1f.2 on end # SATA Controller 1
79 device pci 1f.3 on end # SMBus
80 device pci 1f.5 off end # SATA Controller 2
81 device pci 1f.6 on end # Thermal
82 end
83 end
84end