Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
Peter Marheine | 2c36b1b | 2021-08-17 11:06:01 +1000 | [diff] [blame] | 2 | |
| 3 | fw_config |
| 4 | field USB_DAUGHTERBOARD 0 3 end |
| 5 | end |
| 6 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 7 | chip soc/amd/picasso |
| 8 | |
| 9 | # Set FADT Configuration |
Raul E Rangel | 1c88b10 | 2021-02-11 10:35:32 -0700 | [diff] [blame] | 10 | register "common_config.fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042" |
Felix Held | 5ad4dcb | 2020-08-13 01:27:39 +0200 | [diff] [blame] | 11 | # See table 5-34 ACPI 6.3 spec |
Raul E Rangel | 1c88b10 | 2021-02-11 10:35:32 -0700 | [diff] [blame] | 12 | register "common_config.fadt_flags" = "ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_SEALED_CASE" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 13 | |
Karthikeyan Ramasubramanian | 4520aa2 | 2021-04-23 11:42:19 -0600 | [diff] [blame] | 14 | # ACP Configuration |
| 15 | register "common_config.acp_config" = "{ |
| 16 | .acp_pin_cfg = I2S_PINS_I2S_TDM, |
| 17 | .acp_i2s_wake_enable = 0, |
| 18 | .acp_pme_enable = 0, |
| 19 | }" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 20 | |
| 21 | # Start : OPN Performance Configuration |
| 22 | # (Configuratin that is common for all variants) |
| 23 | # For the below fields, 0 indicates use SOC default |
| 24 | |
| 25 | # PROCHOT_L de-assertion Ramp Time |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 26 | register "prochot_l_deassertion_ramp_time_ms" = "20" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 27 | |
| 28 | # Lower die temperature limit |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 29 | register "thermctl_limit_degreeC" = "100" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 30 | |
| 31 | # FP5 Processor Voltage Supply PSI Currents |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 32 | register "psi0_current_limit_mA" = "18000" |
| 33 | register "psi0_soc_current_limit_mA" = "12000" |
| 34 | register "vddcr_soc_voltage_margin_mV" = "0" |
| 35 | register "vddcr_vdd_voltage_margin_mV" = "0" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 36 | |
| 37 | # VRM Limits |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 38 | register "vrm_maximum_current_limit_mA" = "0" |
| 39 | register "vrm_soc_maximum_current_limit_mA" = "0" |
| 40 | register "vrm_current_limit_mA" = "0" |
| 41 | register "vrm_soc_current_limit_mA" = "0" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 42 | |
| 43 | # Misc SMU settings |
| 44 | register "sb_tsi_alert_comparator_mode_en" = "0" |
| 45 | register "core_dldo_bypass" = "1" |
| 46 | register "min_soc_vid_offset" = "0" |
| 47 | register "aclk_dpm0_freq_400MHz" = "0" |
| 48 | |
| 49 | # End : OPN Performance Configuration |
| 50 | |
Raul E Rangel | 7c79d83 | 2020-09-03 14:30:33 -0600 | [diff] [blame] | 51 | register "emmc_config" = "{ |
| 52 | .timing = SD_EMMC_EMMC_HS400, |
Raul E Rangel | 94be1f7 | 2020-09-03 15:46:56 -0600 | [diff] [blame] | 53 | .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, |
| 54 | /* |
| 55 | * The reference design was missing a pull-up on the CMD line. |
| 56 | * This means we can't run at the full 400 kHz. By setting this |
| 57 | * to 1 we run at the slowest frequency possible by the |
| 58 | * controller (~97 kHz). |
| 59 | * |
| 60 | * Boards that have the pull-up should correctly set this. |
| 61 | */ |
| 62 | .init_khz_preset = 1, |
Raul E Rangel | 7c79d83 | 2020-09-03 14:30:33 -0600 | [diff] [blame] | 63 | }" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 64 | |
Felix Held | 1d0154c | 2020-07-23 19:37:42 +0200 | [diff] [blame] | 65 | register "has_usb2_phy_tune_params" = "1" |
| 66 | |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 67 | # Controller0 Port0 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 68 | register "usb_2_port_tune_params[0]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 69 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 70 | .sq_rx_tune = 0x3, |
| 71 | .tx_fsls_tune = 0x3, |
| 72 | .tx_pre_emp_amp_tune = 0x03, |
| 73 | .tx_pre_emp_pulse_tune = 0x0, |
| 74 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 75 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 76 | .tx_hsxv_tune = 0x3, |
| 77 | .tx_res_tune = 0x01, |
| 78 | }" |
| 79 | |
| 80 | # Controller0 Port1 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 81 | register "usb_2_port_tune_params[1]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 82 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 83 | .sq_rx_tune = 0x3, |
| 84 | .tx_fsls_tune = 0x3, |
| 85 | .tx_pre_emp_amp_tune = 0x03, |
| 86 | .tx_pre_emp_pulse_tune = 0x0, |
| 87 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 88 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 89 | .tx_hsxv_tune = 0x3, |
| 90 | .tx_res_tune = 0x01, |
| 91 | }" |
| 92 | |
| 93 | # Controller0 Port2 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 94 | register "usb_2_port_tune_params[2]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 95 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 96 | .sq_rx_tune = 0x3, |
| 97 | .tx_fsls_tune = 0x3, |
| 98 | .tx_pre_emp_amp_tune = 0x03, |
| 99 | .tx_pre_emp_pulse_tune = 0x0, |
| 100 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 101 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 102 | .tx_hsxv_tune = 0x3, |
| 103 | .tx_res_tune = 0x01, |
| 104 | }" |
| 105 | |
| 106 | # Controller0 Port3 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 107 | register "usb_2_port_tune_params[3]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 108 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 109 | .sq_rx_tune = 0x3, |
| 110 | .tx_fsls_tune = 0x3, |
| 111 | .tx_pre_emp_amp_tune = 0x03, |
| 112 | .tx_pre_emp_pulse_tune = 0x0, |
| 113 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 114 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 115 | .tx_hsxv_tune = 0x3, |
| 116 | .tx_res_tune = 0x01, |
| 117 | }" |
| 118 | |
| 119 | # Controller1 Port0 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 120 | register "usb_2_port_tune_params[4]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 121 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 122 | .sq_rx_tune = 0x3, |
| 123 | .tx_fsls_tune = 0x3, |
| 124 | .tx_pre_emp_amp_tune = 0x02, |
| 125 | .tx_pre_emp_pulse_tune = 0x0, |
| 126 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 127 | .tx_vref_tune = 0x5, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 128 | .tx_hsxv_tune = 0x3, |
| 129 | .tx_res_tune = 0x01, |
| 130 | }" |
| 131 | |
| 132 | # Controller1 Port1 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 133 | register "usb_2_port_tune_params[5]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 134 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 135 | .sq_rx_tune = 0x3, |
| 136 | .tx_fsls_tune = 0x3, |
| 137 | .tx_pre_emp_amp_tune = 0x02, |
| 138 | .tx_pre_emp_pulse_tune = 0x0, |
| 139 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 140 | .tx_vref_tune = 0x5, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 141 | .tx_hsxv_tune = 0x3, |
| 142 | .tx_res_tune = 0x01, |
| 143 | }" |
| 144 | |
Chris Wang | 68d68f1 | 2021-02-03 04:32:06 +0800 | [diff] [blame] | 145 | # Start RV2 USB3 PHY Parameters |
| 146 | register "usb3_phy_override" = "0" |
| 147 | |
| 148 | # USB3 Port0 Default |
| 149 | register "usb3_phy_tune_params[0]" = "{ |
| 150 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 151 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 152 | }" |
| 153 | |
| 154 | # USB3 Port1 Default |
| 155 | register "usb3_phy_tune_params[1]" = "{ |
| 156 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 157 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 158 | }" |
| 159 | |
| 160 | # USB3 Port2 Default |
| 161 | register "usb3_phy_tune_params[2]" = "{ |
| 162 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 163 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 164 | }" |
| 165 | |
| 166 | # USB3 Port3 Default |
| 167 | register "usb3_phy_tune_params[3]" = "{ |
| 168 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 169 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 170 | }" |
| 171 | |
| 172 | # SUP_DIG_LVL_OVRD_IN Default |
| 173 | register "usb3_rx_vref_ctrl" = "0x10" |
| 174 | register "usb3_rx_vref_ctrl_en" = "0x00" |
| 175 | register "usb_3_tx_vboost_lvl" = "0x07" |
| 176 | register "usb_3_tx_vboost_lvl_en" = "0x00" |
| 177 | |
| 178 | # SUPX_DIG_LVL_OVRD_IN Default |
| 179 | register "usb_3_rx_vref_ctrl_x" = "0x10" |
| 180 | register "usb_3_rx_vref_ctrl_en_x" = "0x00" |
| 181 | register "usb_3_tx_vboost_lvl_x" = "0x07" |
| 182 | register "usb_3_tx_vboost_lvl_en_x" = "0x00" |
| 183 | |
| 184 | # End RV2 USB3 phy setting |
| 185 | |
Felix Held | 04394d6 | 2020-08-06 15:04:15 +0200 | [diff] [blame] | 186 | # USB OC pin mapping |
| 187 | register "usb_port_overcurrent_pin[0]" = "USB_OC_PIN_0" # USB C0 |
| 188 | register "usb_port_overcurrent_pin[1]" = "USB_OC_PIN_0" # USB A0 |
| 189 | register "usb_port_overcurrent_pin[2]" = "USB_OC_PIN_1" # USB A1 |
| 190 | register "usb_port_overcurrent_pin[3]" = "USB_OC_PIN_1" # USB C1 |
Felix Held | e237996 | 2020-07-29 01:02:38 +0200 | [diff] [blame] | 191 | register "usb_port_overcurrent_pin[4]" = "USB_OC_NONE" # Camera or internal hub |
| 192 | register "usb_port_overcurrent_pin[5]" = "USB_OC_NONE" # Bluetooth |
| 193 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 194 | # eSPI Configuration |
| 195 | register "common_config.espi_config" = "{ |
| 196 | .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN, |
| 197 | .generic_io_range[0] = { |
| 198 | .base = 0x62, |
| 199 | /* |
| 200 | * Only 0x62 and 0x66 are required. But, this is not supported by |
| 201 | * standard IO decodes and there are only 4 generic I/O windows |
| 202 | * available. Hence, open a window from 0x62-0x67. |
| 203 | */ |
| 204 | .size = 5, |
| 205 | }, |
| 206 | .generic_io_range[1] = { |
| 207 | .base = 0x800, /* EC_HOST_CMD_REGION0 */ |
| 208 | .size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */ |
| 209 | }, |
| 210 | .generic_io_range[2] = { |
| 211 | .base = 0x900, /* EC_LPC_ADDR_MEMMAP */ |
| 212 | .size = 255, /* EC_MEMMAP_SIZE */ |
| 213 | }, |
| 214 | .generic_io_range[3] = { |
| 215 | .base = 0x200, /* EC_LPC_ADDR_HOST_DATA */ |
| 216 | .size = 8, /* 0x200 - 0x207 */ |
| 217 | }, |
| 218 | |
| 219 | .io_mode = ESPI_IO_MODE_QUAD, |
| 220 | .op_freq_mhz = ESPI_OP_FREQ_33_MHZ, |
| 221 | .crc_check_enable = 1, |
Raul E Rangel | 8317e72 | 2021-05-05 13:38:27 -0600 | [diff] [blame] | 222 | .alert_pin = ESPI_ALERT_PIN_PUSH_PULL, |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 223 | .periph_ch_en = 1, |
| 224 | .vw_ch_en = 1, |
| 225 | .oob_ch_en = 0, |
| 226 | .flash_ch_en = 0, |
| 227 | |
Aaron Durbin | 76fcf829 | 2020-07-02 11:08:21 -0600 | [diff] [blame] | 228 | .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12), |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 229 | }" |
| 230 | |
| 231 | register "i2c_scl_reset" = "GPIO_I2C2_SCL | GPIO_I2C3_SCL" |
| 232 | |
Felix Held | 764b987 | 2020-08-28 02:12:06 +0200 | [diff] [blame] | 233 | # genral purpose PCIe clock output configuration |
| 234 | register "gpp_clk_config[0]" = "GPP_CLK_REQ" # WLAN |
| 235 | register "gpp_clk_config[1]" = "GPP_CLK_REQ" # SD Reader |
| 236 | register "gpp_clk_config[2]" = "GPP_CLK_OFF" |
| 237 | register "gpp_clk_config[3]" = "GPP_CLK_OFF" |
| 238 | register "gpp_clk_config[4]" = "GPP_CLK_REQ" # NVME SSD |
| 239 | register "gpp_clk_config[5]" = "GPP_CLK_OFF" |
| 240 | register "gpp_clk_config[6]" = "GPP_CLK_OFF" |
| 241 | |
Matt Papageorge | 5a2feed | 2021-07-20 15:09:46 -0500 | [diff] [blame] | 242 | register "pspp_policy" = "DXIO_PSPP_BALANCED" |
Felix Held | 0fec867 | 2021-05-25 21:07:23 +0200 | [diff] [blame] | 243 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 244 | # See AMD 55570-B1 Table 13: PCI Device ID Assignments. |
| 245 | device domain 0 on |
| 246 | subsystemid 0x1022 0x1510 inherit |
Felix Held | 4fbab54 | 2021-05-31 19:44:46 +0200 | [diff] [blame] | 247 | device ref iommu on end |
| 248 | device ref gpp_bridge_1 on # Wifi |
Rob Barnes | d1095c7 | 2020-09-25 14:16:46 -0600 | [diff] [blame] | 249 | chip drivers/wifi/generic |
| 250 | register "wake" = "GEVENT_8" |
| 251 | device pci 00.0 on end |
| 252 | end |
| 253 | end |
Felix Held | 4fbab54 | 2021-05-31 19:44:46 +0200 | [diff] [blame] | 254 | device ref gpp_bridge_2 on end # SD |
| 255 | device ref gpp_bridge_6 on end # NVME |
| 256 | device ref internal_bridge_a on |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 257 | device ref gfx on end # Internal GPU |
| 258 | device ref gfx_hda on end # Display HDA |
| 259 | device ref crypto on end # Crypto Coprocessor |
| 260 | device ref xhci_0 on # USB 3.1 |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 261 | chip drivers/usb/acpi |
| 262 | register "desc" = ""Root Hub"" |
| 263 | register "type" = "UPC_TYPE_HUB" |
| 264 | device usb 0.0 on |
| 265 | chip drivers/usb/acpi |
| 266 | register "desc" = ""Left Type-C Port"" |
| 267 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 268 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 269 | device usb 2.0 on end |
| 270 | end |
| 271 | chip drivers/usb/acpi |
| 272 | register "desc" = ""Left Type-A Port"" |
| 273 | register "type" = "UPC_TYPE_USB3_A" |
| 274 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 275 | device usb 2.1 on end |
| 276 | end |
| 277 | chip drivers/usb/acpi |
| 278 | register "desc" = ""Right Type-A Port"" |
| 279 | register "type" = "UPC_TYPE_USB3_A" |
| 280 | register "group" = "ACPI_PLD_GROUP(2, 1)" |
| 281 | device usb 2.2 on end |
| 282 | end |
| 283 | chip drivers/usb/acpi |
| 284 | register "desc" = ""Right Type-C Port"" |
| 285 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 286 | register "group" = "ACPI_PLD_GROUP(2, 2)" |
| 287 | device usb 2.3 on end |
| 288 | end |
| 289 | chip drivers/usb/acpi |
| 290 | register "desc" = ""Left Type-C Port"" |
| 291 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 292 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 293 | device usb 3.0 on end |
| 294 | end |
| 295 | chip drivers/usb/acpi |
| 296 | register "desc" = ""Left Type-A Port"" |
| 297 | register "type" = "UPC_TYPE_USB3_A" |
| 298 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 299 | device usb 3.1 on end |
| 300 | end |
| 301 | chip drivers/usb/acpi |
| 302 | register "desc" = ""Right Type-A Port"" |
| 303 | register "type" = "UPC_TYPE_USB3_A" |
| 304 | register "group" = "ACPI_PLD_GROUP(2, 1)" |
| 305 | device usb 3.2 on end |
| 306 | end |
| 307 | chip drivers/usb/acpi |
| 308 | register "desc" = ""Right Type-C Port"" |
| 309 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 310 | register "group" = "ACPI_PLD_GROUP(2, 2)" |
| 311 | device usb 3.3 on end |
| 312 | end |
| 313 | |
| 314 | # The following devices are only enabled on Dali SKUs |
| 315 | chip drivers/usb/acpi |
| 316 | register "desc" = ""User-Facing Camera"" |
| 317 | register "type" = "UPC_TYPE_INTERNAL" |
| 318 | device usb 2.4 on end |
| 319 | end |
| 320 | chip drivers/usb/acpi |
| 321 | register "desc" = ""Bluetooth"" |
| 322 | register "type" = "UPC_TYPE_INTERNAL" |
Rob Barnes | 56e889c | 2020-07-23 14:21:23 -0600 | [diff] [blame] | 323 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_14)" |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 324 | device usb 2.5 on end |
| 325 | end |
| 326 | end |
| 327 | end |
| 328 | end |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 329 | device ref xhci_1 on # USB 3.1 |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 330 | chip drivers/usb/acpi |
| 331 | # The following devices are only enabled on Picasso SKUs |
| 332 | register "desc" = ""Root Hub"" |
| 333 | register "type" = "UPC_TYPE_HUB" |
| 334 | device usb 0.0 on |
| 335 | chip drivers/usb/acpi |
| 336 | register "desc" = ""User-Facing Camera"" |
| 337 | register "type" = "UPC_TYPE_INTERNAL" |
| 338 | device usb 2.0 on end |
| 339 | end |
| 340 | chip drivers/usb/acpi |
| 341 | register "desc" = ""Bluetooth"" |
| 342 | register "type" = "UPC_TYPE_INTERNAL" |
Rob Barnes | 56e889c | 2020-07-23 14:21:23 -0600 | [diff] [blame] | 343 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_14)" |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 344 | device usb 2.1 on end |
| 345 | end |
| 346 | chip drivers/usb/acpi |
| 347 | register "desc" = ""World-Facing Camera"" |
| 348 | register "type" = "UPC_TYPE_INTERNAL" |
| 349 | device usb 3.0 on end |
| 350 | end |
| 351 | end |
| 352 | end |
| 353 | end |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 354 | device ref acp on |
Furquan Shaikh | 24ec79c | 2020-07-16 13:40:28 -0700 | [diff] [blame] | 355 | chip drivers/amd/i2s_machine_dev |
| 356 | register "hid" = ""AMDI5682"" |
| 357 | # DMIC select GPIO for ACP machine device |
| 358 | # This GPIO is used to select DMIC0 or DMIC1 by the |
| 359 | # kernel driver. It does not really have a polarity |
| 360 | # since low and high control the selection of DMIC and |
| 361 | # hence does not have an active polarity. |
| 362 | # Kernel driver does not use the polarity field and |
| 363 | # instead treats the GPIO selection as follows: |
| 364 | # Set low (0) = Select DMIC0 |
| 365 | # Set high (1) = Select DMIC1 |
| 366 | register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)" |
| 367 | device generic 0.0 on end |
| 368 | end |
| 369 | end # Audio |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 370 | device ref hda off end # HDA |
| 371 | device ref mp2 on end # non-Sensor Fusion Hub device |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 372 | end |
Felix Held | 4fbab54 | 2021-05-31 19:44:46 +0200 | [diff] [blame] | 373 | device ref lpc_bridge on |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 374 | chip ec/google/chromeec |
Peter Marheine | 5d91bdd | 2021-09-01 13:14:55 +1000 | [diff] [blame^] | 375 | device pnp 0c09.0 alias cros_ec on |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 376 | chip ec/google/chromeec/i2c_tunnel |
Raul E Rangel | f38dc8b | 2021-01-21 13:52:01 -0700 | [diff] [blame] | 377 | register "uid" = "0" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 378 | register "remote_bus" = "8" |
| 379 | device generic 0.0 on |
| 380 | chip drivers/i2c/generic |
| 381 | register "hid" = ""10EC5682"" |
| 382 | register "name" = ""RT58"" |
| 383 | register "uid" = "1" |
| 384 | register "desc" = ""Realtek RT5682"" |
Josie Nordrum | cc72e15 | 2020-08-03 11:39:41 -0600 | [diff] [blame] | 385 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_29)" |
Akshu Agrawal | c7d6d7a | 2020-07-06 19:39:51 +0530 | [diff] [blame] | 386 | register "property_count" = "2" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 387 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 388 | register "property_list[0].name" = ""realtek,jd-src"" |
| 389 | register "property_list[0].integer" = "1" |
Akshu Agrawal | c7d6d7a | 2020-07-06 19:39:51 +0530 | [diff] [blame] | 390 | register "property_list[1].type" = "ACPI_DP_TYPE_STRING" |
| 391 | register "property_list[1].name" = ""realtek,mclk-name"" |
| 392 | register "property_list[1].string" = ""oscout1"" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 393 | device i2c 1a on end |
| 394 | end |
| 395 | end |
| 396 | end |
| 397 | chip ec/google/chromeec/i2c_tunnel |
| 398 | register "name" = ""MSTH"" |
| 399 | register "uid" = "1" |
| 400 | register "remote_bus" = "9" |
Peter Marheine | 5d91bdd | 2021-09-01 13:14:55 +1000 | [diff] [blame^] | 401 | device generic 1.0 alias cros_ec_i2c_9 on |
Shiyu Sun | 000ee73 | 2020-12-02 16:23:46 +1100 | [diff] [blame] | 402 | chip drivers/i2c/generic |
| 403 | register "hid" = ""10EC2141"" |
| 404 | register "name" = ""MSTH"" |
| 405 | register "uid" = "1" |
| 406 | register "desc" = ""Realtek RTD2141B"" |
Peter Marheine | 2c36b1b | 2021-08-17 11:06:01 +1000 | [diff] [blame] | 407 | # Device presence is variant-specific |
| 408 | device i2c 4a alias db_mst off end |
Shiyu Sun | 000ee73 | 2020-12-02 16:23:46 +1100 | [diff] [blame] | 409 | end |
| 410 | end |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 411 | end |
Furquan Shaikh | e284bff | 2020-07-02 16:03:06 -0700 | [diff] [blame] | 412 | chip ec/google/chromeec/audio_codec |
| 413 | register "uid" = "1" |
| 414 | device generic 0 on end |
| 415 | end |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 416 | end |
| 417 | end |
| 418 | end |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 419 | end # domain |
| 420 | |
| 421 | chip drivers/generic/max98357a |
Raul E Rangel | 19704cd | 2020-06-02 10:43:20 -0600 | [diff] [blame] | 422 | register "hid" = ""MX98357A"" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 423 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_91)" |
| 424 | register "sdmode_delay" = "5" |
| 425 | device generic 0.1 on end |
| 426 | end |
| 427 | |
Felix Held | 97fc054 | 2021-06-15 20:02:27 +0200 | [diff] [blame] | 428 | device ref i2c_3 on |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 429 | chip drivers/i2c/tpm |
| 430 | register "hid" = ""GOOG0005"" |
| 431 | register "desc" = ""Cr50 TPM"" |
| 432 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_3)" |
| 433 | device i2c 50 on end |
| 434 | end |
| 435 | end |
| 436 | |
Felix Held | 361bb53 | 2021-06-15 20:57:04 +0200 | [diff] [blame] | 437 | device ref uart_0 on end # console |
Raul E Rangel | 5e29c0e | 2020-06-12 11:41:16 -0600 | [diff] [blame] | 438 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 439 | end # chip soc/amd/picasso |