| commit | 5e29c0ef8e310dd6e8dcfef6596c4268b9995169 | [log] [tgz] |
|---|---|---|
| author | Raul E Rangel <rrangel@chromium.org> | Fri Jun 12 11:41:16 2020 -0600 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Fri Jun 19 20:34:06 2020 +0000 |
| tree | 91dcc7796007b2f5c1d3cee2b1ba9b703640cc7d | |
| parent | 51e0fd91d5d73c168e572622f91d0197a8ec031b [diff] [blame] |
mb/google/zork: Disable UART 1, 2 and 3 We don't use these on zork, so lets save the power. BUG=b:153001807 TEST=Boot OS and make sure UART 1, 2 and 3 are not probed and remain powered off. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I2fadeba779b66ec2fb13951b9487118ef0737a94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree.cb b/src/mainboard/google/zork/variants/baseboard/devicetree.cb index 664e379..18c3783 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree.cb
@@ -187,4 +187,8 @@ end end + device mmio 0xfedca000 off end # UART1 + device mmio 0xfedce000 off end # UART2 + device mmio 0xfedcf000 off end # UART3 + end # chip soc/amd/picasso