Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | chip soc/amd/picasso |
| 3 | |
| 4 | # Set FADT Configuration |
Raul E Rangel | 1c88b10 | 2021-02-11 10:35:32 -0700 | [diff] [blame] | 5 | register "common_config.fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042" |
Felix Held | 5ad4dcb | 2020-08-13 01:27:39 +0200 | [diff] [blame] | 6 | # See table 5-34 ACPI 6.3 spec |
Raul E Rangel | 1c88b10 | 2021-02-11 10:35:32 -0700 | [diff] [blame] | 7 | register "common_config.fadt_flags" = "ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_SEALED_CASE" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 8 | |
Karthikeyan Ramasubramanian | 4520aa2 | 2021-04-23 11:42:19 -0600 | [diff] [blame] | 9 | # ACP Configuration |
| 10 | register "common_config.acp_config" = "{ |
| 11 | .acp_pin_cfg = I2S_PINS_I2S_TDM, |
| 12 | .acp_i2s_wake_enable = 0, |
| 13 | .acp_pme_enable = 0, |
| 14 | }" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 15 | |
| 16 | # Start : OPN Performance Configuration |
| 17 | # (Configuratin that is common for all variants) |
| 18 | # For the below fields, 0 indicates use SOC default |
| 19 | |
| 20 | # PROCHOT_L de-assertion Ramp Time |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 21 | register "prochot_l_deassertion_ramp_time_ms" = "20" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 22 | |
| 23 | # Lower die temperature limit |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 24 | register "thermctl_limit_degreeC" = "100" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 25 | |
| 26 | # FP5 Processor Voltage Supply PSI Currents |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 27 | register "psi0_current_limit_mA" = "18000" |
| 28 | register "psi0_soc_current_limit_mA" = "12000" |
| 29 | register "vddcr_soc_voltage_margin_mV" = "0" |
| 30 | register "vddcr_vdd_voltage_margin_mV" = "0" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 31 | |
| 32 | # VRM Limits |
Zheng Bao | 795d73c | 2020-10-27 15:36:55 +0800 | [diff] [blame] | 33 | register "vrm_maximum_current_limit_mA" = "0" |
| 34 | register "vrm_soc_maximum_current_limit_mA" = "0" |
| 35 | register "vrm_current_limit_mA" = "0" |
| 36 | register "vrm_soc_current_limit_mA" = "0" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 37 | |
| 38 | # Misc SMU settings |
| 39 | register "sb_tsi_alert_comparator_mode_en" = "0" |
| 40 | register "core_dldo_bypass" = "1" |
| 41 | register "min_soc_vid_offset" = "0" |
| 42 | register "aclk_dpm0_freq_400MHz" = "0" |
| 43 | |
| 44 | # End : OPN Performance Configuration |
| 45 | |
Raul E Rangel | 7c79d83 | 2020-09-03 14:30:33 -0600 | [diff] [blame] | 46 | register "emmc_config" = "{ |
| 47 | .timing = SD_EMMC_EMMC_HS400, |
Raul E Rangel | 94be1f7 | 2020-09-03 15:46:56 -0600 | [diff] [blame] | 48 | .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, |
| 49 | /* |
| 50 | * The reference design was missing a pull-up on the CMD line. |
| 51 | * This means we can't run at the full 400 kHz. By setting this |
| 52 | * to 1 we run at the slowest frequency possible by the |
| 53 | * controller (~97 kHz). |
| 54 | * |
| 55 | * Boards that have the pull-up should correctly set this. |
| 56 | */ |
| 57 | .init_khz_preset = 1, |
Raul E Rangel | 7c79d83 | 2020-09-03 14:30:33 -0600 | [diff] [blame] | 58 | }" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 59 | |
Felix Held | 1d0154c | 2020-07-23 19:37:42 +0200 | [diff] [blame] | 60 | register "has_usb2_phy_tune_params" = "1" |
| 61 | |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 62 | # Controller0 Port0 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 63 | register "usb_2_port_tune_params[0]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 64 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 65 | .sq_rx_tune = 0x3, |
| 66 | .tx_fsls_tune = 0x3, |
| 67 | .tx_pre_emp_amp_tune = 0x03, |
| 68 | .tx_pre_emp_pulse_tune = 0x0, |
| 69 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 70 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 71 | .tx_hsxv_tune = 0x3, |
| 72 | .tx_res_tune = 0x01, |
| 73 | }" |
| 74 | |
| 75 | # Controller0 Port1 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 76 | register "usb_2_port_tune_params[1]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 77 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 78 | .sq_rx_tune = 0x3, |
| 79 | .tx_fsls_tune = 0x3, |
| 80 | .tx_pre_emp_amp_tune = 0x03, |
| 81 | .tx_pre_emp_pulse_tune = 0x0, |
| 82 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 83 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 84 | .tx_hsxv_tune = 0x3, |
| 85 | .tx_res_tune = 0x01, |
| 86 | }" |
| 87 | |
| 88 | # Controller0 Port2 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 89 | register "usb_2_port_tune_params[2]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 90 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 91 | .sq_rx_tune = 0x3, |
| 92 | .tx_fsls_tune = 0x3, |
| 93 | .tx_pre_emp_amp_tune = 0x03, |
| 94 | .tx_pre_emp_pulse_tune = 0x0, |
| 95 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 96 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 97 | .tx_hsxv_tune = 0x3, |
| 98 | .tx_res_tune = 0x01, |
| 99 | }" |
| 100 | |
| 101 | # Controller0 Port3 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 102 | register "usb_2_port_tune_params[3]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 103 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 104 | .sq_rx_tune = 0x3, |
| 105 | .tx_fsls_tune = 0x3, |
| 106 | .tx_pre_emp_amp_tune = 0x03, |
| 107 | .tx_pre_emp_pulse_tune = 0x0, |
| 108 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 109 | .tx_vref_tune = 0x6, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 110 | .tx_hsxv_tune = 0x3, |
| 111 | .tx_res_tune = 0x01, |
| 112 | }" |
| 113 | |
| 114 | # Controller1 Port0 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 115 | register "usb_2_port_tune_params[4]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 116 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 117 | .sq_rx_tune = 0x3, |
| 118 | .tx_fsls_tune = 0x3, |
| 119 | .tx_pre_emp_amp_tune = 0x02, |
| 120 | .tx_pre_emp_pulse_tune = 0x0, |
| 121 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 122 | .tx_vref_tune = 0x5, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 123 | .tx_hsxv_tune = 0x3, |
| 124 | .tx_res_tune = 0x01, |
| 125 | }" |
| 126 | |
| 127 | # Controller1 Port1 Default |
Felix Held | 3a7389e | 2020-07-23 18:22:30 +0200 | [diff] [blame] | 128 | register "usb_2_port_tune_params[5]" = "{ |
Julian Schroeder | e286ef9 | 2021-03-04 15:50:41 -0600 | [diff] [blame] | 129 | .com_pds_tune = 0x07, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 130 | .sq_rx_tune = 0x3, |
| 131 | .tx_fsls_tune = 0x3, |
| 132 | .tx_pre_emp_amp_tune = 0x02, |
| 133 | .tx_pre_emp_pulse_tune = 0x0, |
| 134 | .tx_rise_tune = 0x1, |
Kevin Chiu | de20b28 | 2020-11-19 14:09:47 +0800 | [diff] [blame] | 135 | .tx_vref_tune = 0x5, |
Chris Wang | 1e3e528 | 2020-06-23 21:10:57 +0800 | [diff] [blame] | 136 | .tx_hsxv_tune = 0x3, |
| 137 | .tx_res_tune = 0x01, |
| 138 | }" |
| 139 | |
Chris Wang | 68d68f1 | 2021-02-03 04:32:06 +0800 | [diff] [blame] | 140 | # Start RV2 USB3 PHY Parameters |
| 141 | register "usb3_phy_override" = "0" |
| 142 | |
| 143 | # USB3 Port0 Default |
| 144 | register "usb3_phy_tune_params[0]" = "{ |
| 145 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 146 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 147 | }" |
| 148 | |
| 149 | # USB3 Port1 Default |
| 150 | register "usb3_phy_tune_params[1]" = "{ |
| 151 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 152 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 153 | }" |
| 154 | |
| 155 | # USB3 Port2 Default |
| 156 | register "usb3_phy_tune_params[2]" = "{ |
| 157 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 158 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 159 | }" |
| 160 | |
| 161 | # USB3 Port3 Default |
| 162 | register "usb3_phy_tune_params[3]" = "{ |
| 163 | .rx_eq_delta_iq_ovrd_val = 0x0, |
| 164 | .rx_eq_delta_iq_ovrd_en = 0x0, |
| 165 | }" |
| 166 | |
| 167 | # SUP_DIG_LVL_OVRD_IN Default |
| 168 | register "usb3_rx_vref_ctrl" = "0x10" |
| 169 | register "usb3_rx_vref_ctrl_en" = "0x00" |
| 170 | register "usb_3_tx_vboost_lvl" = "0x07" |
| 171 | register "usb_3_tx_vboost_lvl_en" = "0x00" |
| 172 | |
| 173 | # SUPX_DIG_LVL_OVRD_IN Default |
| 174 | register "usb_3_rx_vref_ctrl_x" = "0x10" |
| 175 | register "usb_3_rx_vref_ctrl_en_x" = "0x00" |
| 176 | register "usb_3_tx_vboost_lvl_x" = "0x07" |
| 177 | register "usb_3_tx_vboost_lvl_en_x" = "0x00" |
| 178 | |
| 179 | # End RV2 USB3 phy setting |
| 180 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 181 | # SPI Configuration |
| 182 | register "common_config.spi_config" = "{ |
Rob Barnes | 13ec6a0 | 2020-07-14 13:23:43 -0600 | [diff] [blame] | 183 | .normal_speed = SPI_SPEED_33M, /* MHz */ |
| 184 | .fast_speed = SPI_SPEED_66M, /* MHz */ |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 185 | .altio_speed = SPI_SPEED_66M, /* MHz */ |
| 186 | .tpm_speed = SPI_SPEED_66M, /* MHz */ |
Martin Roth | 637f941 | 2020-07-06 20:02:36 -0600 | [diff] [blame] | 187 | .read_mode = SPI_READ_MODE_DUAL122, |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 188 | }" |
| 189 | |
Felix Held | 04394d6 | 2020-08-06 15:04:15 +0200 | [diff] [blame] | 190 | # USB OC pin mapping |
| 191 | register "usb_port_overcurrent_pin[0]" = "USB_OC_PIN_0" # USB C0 |
| 192 | register "usb_port_overcurrent_pin[1]" = "USB_OC_PIN_0" # USB A0 |
| 193 | register "usb_port_overcurrent_pin[2]" = "USB_OC_PIN_1" # USB A1 |
| 194 | register "usb_port_overcurrent_pin[3]" = "USB_OC_PIN_1" # USB C1 |
Felix Held | e237996 | 2020-07-29 01:02:38 +0200 | [diff] [blame] | 195 | register "usb_port_overcurrent_pin[4]" = "USB_OC_NONE" # Camera or internal hub |
| 196 | register "usb_port_overcurrent_pin[5]" = "USB_OC_NONE" # Bluetooth |
| 197 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 198 | # eSPI Configuration |
| 199 | register "common_config.espi_config" = "{ |
| 200 | .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN, |
| 201 | .generic_io_range[0] = { |
| 202 | .base = 0x62, |
| 203 | /* |
| 204 | * Only 0x62 and 0x66 are required. But, this is not supported by |
| 205 | * standard IO decodes and there are only 4 generic I/O windows |
| 206 | * available. Hence, open a window from 0x62-0x67. |
| 207 | */ |
| 208 | .size = 5, |
| 209 | }, |
| 210 | .generic_io_range[1] = { |
| 211 | .base = 0x800, /* EC_HOST_CMD_REGION0 */ |
| 212 | .size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */ |
| 213 | }, |
| 214 | .generic_io_range[2] = { |
| 215 | .base = 0x900, /* EC_LPC_ADDR_MEMMAP */ |
| 216 | .size = 255, /* EC_MEMMAP_SIZE */ |
| 217 | }, |
| 218 | .generic_io_range[3] = { |
| 219 | .base = 0x200, /* EC_LPC_ADDR_HOST_DATA */ |
| 220 | .size = 8, /* 0x200 - 0x207 */ |
| 221 | }, |
| 222 | |
| 223 | .io_mode = ESPI_IO_MODE_QUAD, |
| 224 | .op_freq_mhz = ESPI_OP_FREQ_33_MHZ, |
| 225 | .crc_check_enable = 1, |
Raul E Rangel | 8317e72 | 2021-05-05 13:38:27 -0600 | [diff] [blame] | 226 | .alert_pin = ESPI_ALERT_PIN_PUSH_PULL, |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 227 | .periph_ch_en = 1, |
| 228 | .vw_ch_en = 1, |
| 229 | .oob_ch_en = 0, |
| 230 | .flash_ch_en = 0, |
| 231 | |
Aaron Durbin | 76fcf829 | 2020-07-02 11:08:21 -0600 | [diff] [blame] | 232 | .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12), |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 233 | }" |
| 234 | |
| 235 | register "i2c_scl_reset" = "GPIO_I2C2_SCL | GPIO_I2C3_SCL" |
| 236 | |
Felix Held | 764b987 | 2020-08-28 02:12:06 +0200 | [diff] [blame] | 237 | # genral purpose PCIe clock output configuration |
| 238 | register "gpp_clk_config[0]" = "GPP_CLK_REQ" # WLAN |
| 239 | register "gpp_clk_config[1]" = "GPP_CLK_REQ" # SD Reader |
| 240 | register "gpp_clk_config[2]" = "GPP_CLK_OFF" |
| 241 | register "gpp_clk_config[3]" = "GPP_CLK_OFF" |
| 242 | register "gpp_clk_config[4]" = "GPP_CLK_REQ" # NVME SSD |
| 243 | register "gpp_clk_config[5]" = "GPP_CLK_OFF" |
| 244 | register "gpp_clk_config[6]" = "GPP_CLK_OFF" |
| 245 | |
Felix Held | 0fec867 | 2021-05-25 21:07:23 +0200 | [diff] [blame] | 246 | register "pspp_policy" = "DXIO_PSPP_POWERSAVE" |
| 247 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 248 | # See AMD 55570-B1 Table 13: PCI Device ID Assignments. |
| 249 | device domain 0 on |
| 250 | subsystemid 0x1022 0x1510 inherit |
Felix Held | 4fbab54 | 2021-05-31 19:44:46 +0200 | [diff] [blame] | 251 | device ref iommu on end |
| 252 | device ref gpp_bridge_1 on # Wifi |
Rob Barnes | d1095c7 | 2020-09-25 14:16:46 -0600 | [diff] [blame] | 253 | chip drivers/wifi/generic |
| 254 | register "wake" = "GEVENT_8" |
| 255 | device pci 00.0 on end |
| 256 | end |
| 257 | end |
Felix Held | 4fbab54 | 2021-05-31 19:44:46 +0200 | [diff] [blame] | 258 | device ref gpp_bridge_2 on end # SD |
| 259 | device ref gpp_bridge_6 on end # NVME |
| 260 | device ref internal_bridge_a on |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 261 | device ref gfx on end # Internal GPU |
| 262 | device ref gfx_hda on end # Display HDA |
| 263 | device ref crypto on end # Crypto Coprocessor |
| 264 | device ref xhci_0 on # USB 3.1 |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 265 | chip drivers/usb/acpi |
| 266 | register "desc" = ""Root Hub"" |
| 267 | register "type" = "UPC_TYPE_HUB" |
| 268 | device usb 0.0 on |
| 269 | chip drivers/usb/acpi |
| 270 | register "desc" = ""Left Type-C Port"" |
| 271 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 272 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 273 | device usb 2.0 on end |
| 274 | end |
| 275 | chip drivers/usb/acpi |
| 276 | register "desc" = ""Left Type-A Port"" |
| 277 | register "type" = "UPC_TYPE_USB3_A" |
| 278 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 279 | device usb 2.1 on end |
| 280 | end |
| 281 | chip drivers/usb/acpi |
| 282 | register "desc" = ""Right Type-A Port"" |
| 283 | register "type" = "UPC_TYPE_USB3_A" |
| 284 | register "group" = "ACPI_PLD_GROUP(2, 1)" |
| 285 | device usb 2.2 on end |
| 286 | end |
| 287 | chip drivers/usb/acpi |
| 288 | register "desc" = ""Right Type-C Port"" |
| 289 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 290 | register "group" = "ACPI_PLD_GROUP(2, 2)" |
| 291 | device usb 2.3 on end |
| 292 | end |
| 293 | chip drivers/usb/acpi |
| 294 | register "desc" = ""Left Type-C Port"" |
| 295 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 296 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 297 | device usb 3.0 on end |
| 298 | end |
| 299 | chip drivers/usb/acpi |
| 300 | register "desc" = ""Left Type-A Port"" |
| 301 | register "type" = "UPC_TYPE_USB3_A" |
| 302 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 303 | device usb 3.1 on end |
| 304 | end |
| 305 | chip drivers/usb/acpi |
| 306 | register "desc" = ""Right Type-A Port"" |
| 307 | register "type" = "UPC_TYPE_USB3_A" |
| 308 | register "group" = "ACPI_PLD_GROUP(2, 1)" |
| 309 | device usb 3.2 on end |
| 310 | end |
| 311 | chip drivers/usb/acpi |
| 312 | register "desc" = ""Right Type-C Port"" |
| 313 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 314 | register "group" = "ACPI_PLD_GROUP(2, 2)" |
| 315 | device usb 3.3 on end |
| 316 | end |
| 317 | |
| 318 | # The following devices are only enabled on Dali SKUs |
| 319 | chip drivers/usb/acpi |
| 320 | register "desc" = ""User-Facing Camera"" |
| 321 | register "type" = "UPC_TYPE_INTERNAL" |
| 322 | device usb 2.4 on end |
| 323 | end |
| 324 | chip drivers/usb/acpi |
| 325 | register "desc" = ""Bluetooth"" |
| 326 | register "type" = "UPC_TYPE_INTERNAL" |
Rob Barnes | 56e889c | 2020-07-23 14:21:23 -0600 | [diff] [blame] | 327 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_14)" |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 328 | device usb 2.5 on end |
| 329 | end |
| 330 | end |
| 331 | end |
| 332 | end |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 333 | device ref xhci_1 on # USB 3.1 |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 334 | chip drivers/usb/acpi |
| 335 | # The following devices are only enabled on Picasso SKUs |
| 336 | register "desc" = ""Root Hub"" |
| 337 | register "type" = "UPC_TYPE_HUB" |
| 338 | device usb 0.0 on |
| 339 | chip drivers/usb/acpi |
| 340 | register "desc" = ""User-Facing Camera"" |
| 341 | register "type" = "UPC_TYPE_INTERNAL" |
| 342 | device usb 2.0 on end |
| 343 | end |
| 344 | chip drivers/usb/acpi |
| 345 | register "desc" = ""Bluetooth"" |
| 346 | register "type" = "UPC_TYPE_INTERNAL" |
Rob Barnes | 56e889c | 2020-07-23 14:21:23 -0600 | [diff] [blame] | 347 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_14)" |
Rob Barnes | f0d1c9a | 2020-06-24 09:42:02 -0600 | [diff] [blame] | 348 | device usb 2.1 on end |
| 349 | end |
| 350 | chip drivers/usb/acpi |
| 351 | register "desc" = ""World-Facing Camera"" |
| 352 | register "type" = "UPC_TYPE_INTERNAL" |
| 353 | device usb 3.0 on end |
| 354 | end |
| 355 | end |
| 356 | end |
| 357 | end |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 358 | device ref acp on |
Furquan Shaikh | 24ec79c | 2020-07-16 13:40:28 -0700 | [diff] [blame] | 359 | chip drivers/amd/i2s_machine_dev |
| 360 | register "hid" = ""AMDI5682"" |
| 361 | # DMIC select GPIO for ACP machine device |
| 362 | # This GPIO is used to select DMIC0 or DMIC1 by the |
| 363 | # kernel driver. It does not really have a polarity |
| 364 | # since low and high control the selection of DMIC and |
| 365 | # hence does not have an active polarity. |
| 366 | # Kernel driver does not use the polarity field and |
| 367 | # instead treats the GPIO selection as follows: |
| 368 | # Set low (0) = Select DMIC0 |
| 369 | # Set high (1) = Select DMIC1 |
| 370 | register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)" |
| 371 | device generic 0.0 on end |
| 372 | end |
| 373 | end # Audio |
Felix Held | 5fd63bd | 2021-05-31 20:07:02 +0200 | [diff] [blame] | 374 | device ref hda off end # HDA |
| 375 | device ref mp2 on end # non-Sensor Fusion Hub device |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 376 | end |
Felix Held | 4fbab54 | 2021-05-31 19:44:46 +0200 | [diff] [blame] | 377 | device ref lpc_bridge on |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 378 | chip ec/google/chromeec |
| 379 | device pnp 0c09.0 on |
| 380 | chip ec/google/chromeec/i2c_tunnel |
Raul E Rangel | f38dc8b | 2021-01-21 13:52:01 -0700 | [diff] [blame] | 381 | register "uid" = "0" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 382 | register "remote_bus" = "8" |
| 383 | device generic 0.0 on |
| 384 | chip drivers/i2c/generic |
| 385 | register "hid" = ""10EC5682"" |
| 386 | register "name" = ""RT58"" |
| 387 | register "uid" = "1" |
| 388 | register "desc" = ""Realtek RT5682"" |
Josie Nordrum | cc72e15 | 2020-08-03 11:39:41 -0600 | [diff] [blame] | 389 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_29)" |
Akshu Agrawal | c7d6d7a | 2020-07-06 19:39:51 +0530 | [diff] [blame] | 390 | register "property_count" = "2" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 391 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 392 | register "property_list[0].name" = ""realtek,jd-src"" |
| 393 | register "property_list[0].integer" = "1" |
Akshu Agrawal | c7d6d7a | 2020-07-06 19:39:51 +0530 | [diff] [blame] | 394 | register "property_list[1].type" = "ACPI_DP_TYPE_STRING" |
| 395 | register "property_list[1].name" = ""realtek,mclk-name"" |
| 396 | register "property_list[1].string" = ""oscout1"" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 397 | device i2c 1a on end |
| 398 | end |
| 399 | end |
| 400 | end |
| 401 | chip ec/google/chromeec/i2c_tunnel |
| 402 | register "name" = ""MSTH"" |
| 403 | register "uid" = "1" |
| 404 | register "remote_bus" = "9" |
Shiyu Sun | 000ee73 | 2020-12-02 16:23:46 +1100 | [diff] [blame] | 405 | device generic 1.0 on |
| 406 | chip drivers/i2c/generic |
| 407 | register "hid" = ""10EC2141"" |
| 408 | register "name" = ""MSTH"" |
| 409 | register "uid" = "1" |
| 410 | register "desc" = ""Realtek RTD2141B"" |
| 411 | device i2c 4a on end |
| 412 | end |
| 413 | end |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 414 | end |
Furquan Shaikh | e284bff | 2020-07-02 16:03:06 -0700 | [diff] [blame] | 415 | chip ec/google/chromeec/audio_codec |
| 416 | register "uid" = "1" |
| 417 | device generic 0 on end |
| 418 | end |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 419 | end |
| 420 | end |
| 421 | end |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 422 | end # domain |
| 423 | |
| 424 | chip drivers/generic/max98357a |
Raul E Rangel | 19704cd | 2020-06-02 10:43:20 -0600 | [diff] [blame] | 425 | register "hid" = ""MX98357A"" |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 426 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_91)" |
| 427 | register "sdmode_delay" = "5" |
| 428 | device generic 0.1 on end |
| 429 | end |
| 430 | |
Felix Held | 97fc054 | 2021-06-15 20:02:27 +0200 | [diff] [blame^] | 431 | device ref i2c_3 on |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 432 | chip drivers/i2c/tpm |
| 433 | register "hid" = ""GOOG0005"" |
| 434 | register "desc" = ""Cr50 TPM"" |
| 435 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_3)" |
| 436 | device i2c 50 on end |
| 437 | end |
| 438 | end |
| 439 | |
Raul E Rangel | 5e29c0e | 2020-06-12 11:41:16 -0600 | [diff] [blame] | 440 | device mmio 0xfedca000 off end # UART1 |
| 441 | device mmio 0xfedce000 off end # UART2 |
| 442 | device mmio 0xfedcf000 off end # UART3 |
| 443 | |
Raul E Rangel | b3c4132 | 2020-05-20 14:07:41 -0600 | [diff] [blame] | 444 | end # chip soc/amd/picasso |