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Frank Vibrans63e62b02011-02-14 18:38:14 +00001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2011 Advanced Micro Devices, Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Frank Vibrans63e62b02011-02-14 18:38:14 +000018##
19
efdesign9805a89ab2011-06-20 17:38:49 -070020config SOUTHBRIDGE_AMD_CIMX_SB800
Frank Vibrans63e62b02011-02-14 18:38:14 +000021 bool
Kerry Shefeed3292011-08-18 18:03:44 +080022 default n
Frank Vibrans63e62b02011-02-14 18:38:14 +000023 select IOAPIC
Kyösti Mälkki8526c3a2014-01-03 08:20:50 +020024 select HAVE_USBDEBUG_OPTIONS
Kerry Shefeed3292011-08-18 18:03:44 +080025 select AMD_SB_CIMX
Kyösti Mälkki56892fc2013-06-16 17:12:37 +030026 select HAVE_HARD_RESET
Frank Vibrans63e62b02011-02-14 18:38:14 +000027
efdesign9805a89ab2011-06-20 17:38:49 -070028if SOUTHBRIDGE_AMD_CIMX_SB800
Frank Vibrans63e62b02011-02-14 18:38:14 +000029config BOOTBLOCK_SOUTHBRIDGE_INIT
Martin Roth595e7772015-04-26 18:53:26 -060030 string
31 default "southbridge/amd/cimx/sb800/bootblock.c"
Kerry She6209c822011-08-18 18:44:00 +080032
Kerry Shehd7e856b92011-10-11 17:27:06 +080033config ENABLE_IDE_COMBINED_MODE
34 bool "Enable SATA IDE combined mode"
35 default n
36 help
37 If Combined Mode is enabled. IDE controller is exposed and
38 SATA controller has control over Port0 through Port3,
39 IDE controller has control over Port4 and Port5.
40
41 If Combined Mode is disabled, IDE controller is hidden and
42 SATA controller has full control of all 6 Ports when operating in non-IDE mode.
43
44config IDE_COMBINED_MODE
45 hex
46 default "0x0" if ENABLE_IDE_COMBINED_MODE
47 default "0x1" if !ENABLE_IDE_COMBINED_MODE
48
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080049choice
50 prompt "SATA Mode"
Paul Menzelee5c1112013-03-12 12:41:40 +010051 default SB800_SATA_AHCI
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080052 help
53 Select the mode in which SATA should be driven. NATIVE AHCI, or RAID.
Paul Menzelbae3f062013-03-28 13:03:38 +010054 The default is AHCI.
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080055
56config SB800_SATA_IDE
57 bool "NATIVE"
58 help
Paul Menzelbae3f062013-03-28 13:03:38 +010059 NATIVE does not require a ROM.
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080060
61config SB800_SATA_AHCI
62 bool "AHCI"
63 help
Paul Menzelbae3f062013-03-28 13:03:38 +010064 AHCI is the default and may work with or without AHCI ROM. It depends on the payload support.
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080065 For example, seabios does not require the AHCI ROM.
66
67config SB800_SATA_RAID
68 bool "RAID"
69 help
70 sb800 RAID mode must have the two required ROM files.
71
72endchoice
73
74config SB800_SATA_MODE
Martin Roth595e7772015-04-26 18:53:26 -060075 hex
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080076 depends on (SB800_SATA_IDE || SB800_SATA_RAID || SB800_SATA_AHCI)
77 default "0x0" if SB800_SATA_IDE
78 default "0x1" if SB800_SATA_RAID
79 default "0x2" if SB800_SATA_AHCI
80
Kerry She6209c822011-08-18 18:44:00 +080081config SB_SUPERIO_HWM
Martin Roth595e7772015-04-26 18:53:26 -060082 bool
83 default n
Kerry Shehd4a0e7d2011-10-10 17:17:39 +080084
85if SB800_SATA_AHCI
86config AHCI_ROM_ID
87 string "AHCI device PCI IDs"
88 default "1002,4391"
89
90config SB800_AHCI_ROM
91 bool "Add a AHCI ROM"
92
93config AHCI_ROM_FILE
94 string "AHCI ROM path and filename"
95 depends on SB800_AHCI_ROM
96 default "site-local/sb800/ahci.bin"
97endif
98
99if SB800_SATA_RAID
100config RAID_ROM_ID
101 string "RAID device PCI IDs"
102 default "1002,4393"
Martin Roth595e7772015-04-26 18:53:26 -0600103 help
104 1002,4392 for SATA NON-RAID5 module, 1002,4393 for SATA RAID5 mode
Kerry Shehd4a0e7d2011-10-10 17:17:39 +0800105
106config RAID_ROM_FILE
107 string "RAID ROM path and filename"
108 depends on SB800_SATA_RAID
109 default "site-local/sb800/raid.bin"
110
111config RAID_MISC_ROM_FILE
Martin Roth595e7772015-04-26 18:53:26 -0600112 string "RAID Misc ROM path and filename"
113 default "site-local/sb800/misc.bin"
Kerry Shehd4a0e7d2011-10-10 17:17:39 +0800114 depends on SB800_SATA_RAID
115
Kerry Sheh55437c52011-10-12 11:42:59 +0800116config RAID_MISC_ROM_POSITION
117 hex "RAID Misc ROM Position"
118 default 0xFFF00000
119 depends on SB800_SATA_RAID
120 help
121 The RAID ROM requires that the MISC ROM is located between the range
122 0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned.
123 The CONFIG_ROM_SIZE must larger than 0x100000.
124
Kerry Shehd4a0e7d2011-10-10 17:17:39 +0800125endif
126
Martin Rothe899e512012-12-05 16:07:11 -0700127config SB800_IMC_FWM
128 bool "Add IMC firmware"
129 default n
130 help
131 Add SB800 / Hudson 1 IMC Firmware to support the onboard fan control.
Martin Rothe899e512012-12-05 16:07:11 -0700132
133if SB800_IMC_FWM
134
135config SB800_IMC_FWM_FILE
136 string "IMC firmware path and filename"
137 default "3rdparty/southbridge/amd/sb800/imc.bin"
138
139choice
140 prompt "SB800 Firmware ROM Position"
141
142config SB800_FWM_AT_FFFA0000
143 bool "0xFFFA0000"
144 help
145 The IMC and GEC ROMs requires a 'signature' located at one of several
146 fixed locations in memory. The location used shouldn't matter, just
147 select an area that doesn't conflict with anything else.
148
149config SB800_FWM_AT_FFF20000
150 bool "0xFFF20000"
151 help
152 The IMC and GEC ROMs requires a 'signature' located at one of several
153 fixed locations in memory. The location used shouldn't matter, just
154 select an area that doesn't conflict with anything else.
155
156config SB800_FWM_AT_FFE20000
157 depends on BOARD_ROMSIZE_KB_8192 || BOARD_ROMSIZE_KB_4096 || BOARD_ROMSIZE_KB_2048
158 bool "0xFFE20000"
159 help
160 The IMC and GEC ROMs requires a 'signature' located at one of several
161 fixed locations in memory. The location used shouldn't matter, just
162 select an area that doesn't conflict with anything else.
163
164config SB800_FWM_AT_FFC20000
165 depends on BOARD_ROMSIZE_KB_8192 || BOARD_ROMSIZE_KB_4096
166 bool "0xFFC20000"
167 help
168 The IMC and GEC ROMs requires a 'signature' located at one of several
169 fixed locations in memory. The location used shouldn't matter, just
170 select an area that doesn't conflict with anything else.
171
172config SB800_FWM_AT_FF820000
173 depends on BOARD_ROMSIZE_KB_8192
174 bool "0xFF820000"
175 help
176 The IMC and GEC ROMs requires a 'signature' located at one of several
177 fixed locations in memory. The location used shouldn't matter, just
178 select an area that doesn't conflict with anything else.
179
180endchoice
181
182config SB800_FWM_POSITION
183 hex
184 default 0xFFFA0000 if SB800_FWM_AT_FFFA0000
185 default 0xFFF20000 if SB800_FWM_AT_FFF20000
186 default 0xFFE20000 if SB800_FWM_AT_FFE20000
187 default 0xFFC20000 if SB800_FWM_AT_FFC20000
Martin Roth238780c2013-01-08 13:46:50 -0700188 default 0xFF820000 if SB800_FWM_AT_FF820000
Martin Rothe899e512012-12-05 16:07:11 -0700189
190endif #SB800_IMC_FWM
191
Kyösti Mälkkia9bbdd32013-08-09 02:24:05 +0300192config EHCI_BAR
193 hex
194 default 0xfef00000
195
Martin Rothe899e512012-12-05 16:07:11 -0700196choice
197 prompt "Fan Control"
198 default SB800_NO_FAN_CONTROL
199 help
200 Select the method of SB800 fan control to be used. None would be
201 for either fixed maximum speed fans connected to the SB800 or for
202 an external chip controlling the fan speeds. Manual control sets
203 up the SB800 fan control registers. IMC fan control uses the SB800
204 IMC to actively control the fan speeds.
205
206config SB800_NO_FAN_CONTROL
207 bool "None"
208 help
209 No SB800 Fan control - Do not set up the SB800 fan control registers.
210
211config SB800_MANUAL_FAN_CONTROL
212 bool "Manual"
213 help
214 Configure the SB800 fan control registers in devicetree.cb.
215
216config SB800_IMC_FAN_CONTROL
217 bool "IMC Based"
218 depends on SB800_IMC_FWM
219 help
220 Set up the SB800 to use the IMC based Fan controller. This requires
221 the IMC rom from AMD. Configure the registers in devicetree.cb.
222
223endchoice
224
efdesign9805a89ab2011-06-20 17:38:49 -0700225endif #SOUTHBRIDGE_AMD_CIMX_SB800
Frank Vibrans63e62b02011-02-14 18:38:14 +0000226