Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | |
| 18 | #include <device/device.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <console/console.h> |
Kyösti Mälkki | 2e50142 | 2017-04-21 08:43:09 +0300 | [diff] [blame] | 21 | #include <arch/acpi.h> |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 22 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 23 | #include <device/pci_ops.h> |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 24 | #include <cpu/x86/cache.h> |
| 25 | #include <cpu/x86/smm.h> |
| 26 | #include <string.h> |
| 27 | #include "i82801dx.h" |
| 28 | |
Kyösti Mälkki | 55b7263 | 2019-07-08 22:36:38 +0300 | [diff] [blame^] | 29 | |
| 30 | void northbridge_write_smram(u8 smram); |
| 31 | |
| 32 | /* For intel/e7505. */ |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 33 | #define D_OPEN (1 << 6) |
| 34 | #define D_CLS (1 << 5) |
| 35 | #define D_LCK (1 << 4) |
| 36 | #define G_SMRAME (1 << 3) |
| 37 | #define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0)) |
| 38 | |
| 39 | /* While we read PMBASE dynamically in case it changed, let's |
| 40 | * initialize it with a sane value |
| 41 | */ |
| 42 | static u16 pmbase = PMBASE_ADDR; |
| 43 | |
| 44 | /** |
| 45 | * @brief read and clear PM1_STS |
| 46 | * @return PM1_STS register |
| 47 | */ |
| 48 | static u16 reset_pm1_status(void) |
| 49 | { |
| 50 | u16 reg16; |
| 51 | |
| 52 | reg16 = inw(pmbase + PM1_STS); |
| 53 | /* set status bits are cleared by writing 1 to them */ |
| 54 | outw(reg16, pmbase + PM1_STS); |
| 55 | |
| 56 | return reg16; |
| 57 | } |
| 58 | |
| 59 | static void dump_pm1_status(u16 pm1_sts) |
| 60 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 61 | printk(BIOS_DEBUG, "PM1_STS: "); |
| 62 | if (pm1_sts & (1 << 15)) printk(BIOS_DEBUG, "WAK "); |
| 63 | if (pm1_sts & (1 << 14)) printk(BIOS_DEBUG, "PCIEXPWAK "); |
| 64 | if (pm1_sts & (1 << 11)) printk(BIOS_DEBUG, "PRBTNOR "); |
| 65 | if (pm1_sts & (1 << 10)) printk(BIOS_DEBUG, "RTC "); |
| 66 | if (pm1_sts & (1 << 8)) printk(BIOS_DEBUG, "PWRBTN "); |
| 67 | if (pm1_sts & (1 << 5)) printk(BIOS_DEBUG, "GBL "); |
| 68 | if (pm1_sts & (1 << 4)) printk(BIOS_DEBUG, "BM "); |
| 69 | if (pm1_sts & (1 << 0)) printk(BIOS_DEBUG, "TMROF "); |
| 70 | printk(BIOS_DEBUG, "\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | /** |
| 74 | * @brief read and clear SMI_STS |
| 75 | * @return SMI_STS register |
| 76 | */ |
| 77 | static u32 reset_smi_status(void) |
| 78 | { |
| 79 | u32 reg32; |
| 80 | |
| 81 | reg32 = inl(pmbase + SMI_STS); |
| 82 | /* set status bits are cleared by writing 1 to them */ |
| 83 | outl(reg32, pmbase + SMI_STS); |
| 84 | |
| 85 | return reg32; |
| 86 | } |
| 87 | |
| 88 | static void dump_smi_status(u32 smi_sts) |
| 89 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 90 | printk(BIOS_DEBUG, "SMI_STS: "); |
| 91 | if (smi_sts & (1 << 26)) printk(BIOS_DEBUG, "SPI "); |
| 92 | if (smi_sts & (1 << 25)) printk(BIOS_DEBUG, "EL_SMI "); |
| 93 | if (smi_sts & (1 << 21)) printk(BIOS_DEBUG, "MONITOR "); |
| 94 | if (smi_sts & (1 << 20)) printk(BIOS_DEBUG, "PCI_EXP_SMI "); |
| 95 | if (smi_sts & (1 << 18)) printk(BIOS_DEBUG, "INTEL_USB2 "); |
| 96 | if (smi_sts & (1 << 17)) printk(BIOS_DEBUG, "LEGACY_USB2 "); |
| 97 | if (smi_sts & (1 << 16)) printk(BIOS_DEBUG, "SMBUS_SMI "); |
| 98 | if (smi_sts & (1 << 15)) printk(BIOS_DEBUG, "SERIRQ_SMI "); |
| 99 | if (smi_sts & (1 << 14)) printk(BIOS_DEBUG, "PERIODIC "); |
| 100 | if (smi_sts & (1 << 13)) printk(BIOS_DEBUG, "TCO "); |
| 101 | if (smi_sts & (1 << 12)) printk(BIOS_DEBUG, "DEVMON "); |
| 102 | if (smi_sts & (1 << 11)) printk(BIOS_DEBUG, "MCSMI "); |
| 103 | if (smi_sts & (1 << 10)) printk(BIOS_DEBUG, "GPI "); |
| 104 | if (smi_sts & (1 << 9)) printk(BIOS_DEBUG, "GPE0 "); |
| 105 | if (smi_sts & (1 << 8)) printk(BIOS_DEBUG, "PM1 "); |
| 106 | if (smi_sts & (1 << 6)) printk(BIOS_DEBUG, "SWSMI_TMR "); |
| 107 | if (smi_sts & (1 << 5)) printk(BIOS_DEBUG, "APM "); |
| 108 | if (smi_sts & (1 << 4)) printk(BIOS_DEBUG, "SLP_SMI "); |
| 109 | if (smi_sts & (1 << 3)) printk(BIOS_DEBUG, "LEGACY_USB "); |
| 110 | if (smi_sts & (1 << 2)) printk(BIOS_DEBUG, "BIOS "); |
| 111 | printk(BIOS_DEBUG, "\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 112 | } |
| 113 | |
| 114 | |
| 115 | /** |
| 116 | * @brief read and clear GPE0_STS |
| 117 | * @return GPE0_STS register |
| 118 | */ |
| 119 | static u32 reset_gpe0_status(void) |
| 120 | { |
| 121 | u32 reg32; |
| 122 | |
| 123 | reg32 = inl(pmbase + GPE0_STS); |
| 124 | /* set status bits are cleared by writing 1 to them */ |
| 125 | outl(reg32, pmbase + GPE0_STS); |
| 126 | |
| 127 | return reg32; |
| 128 | } |
| 129 | |
| 130 | static void dump_gpe0_status(u32 gpe0_sts) |
| 131 | { |
| 132 | int i; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 133 | printk(BIOS_DEBUG, "GPE0_STS: "); |
Konstantin Aladyshev | 62f8083 | 2013-03-07 04:04:27 +0400 | [diff] [blame] | 134 | for (i=31; i>= 16; i--) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 135 | if (gpe0_sts & (1 << i)) printk(BIOS_DEBUG, "GPIO%d ", (i-16)); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 136 | } |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 137 | if (gpe0_sts & (1 << 14)) printk(BIOS_DEBUG, "USB4 "); |
| 138 | if (gpe0_sts & (1 << 13)) printk(BIOS_DEBUG, "PME_B0 "); |
| 139 | if (gpe0_sts & (1 << 12)) printk(BIOS_DEBUG, "USB3 "); |
| 140 | if (gpe0_sts & (1 << 11)) printk(BIOS_DEBUG, "PME "); |
| 141 | if (gpe0_sts & (1 << 10)) printk(BIOS_DEBUG, "EL_SCI/BATLOW "); |
| 142 | if (gpe0_sts & (1 << 9)) printk(BIOS_DEBUG, "PCI_EXP "); |
| 143 | if (gpe0_sts & (1 << 8)) printk(BIOS_DEBUG, "RI "); |
| 144 | if (gpe0_sts & (1 << 7)) printk(BIOS_DEBUG, "SMB_WAK "); |
| 145 | if (gpe0_sts & (1 << 6)) printk(BIOS_DEBUG, "TCO_SCI "); |
| 146 | if (gpe0_sts & (1 << 5)) printk(BIOS_DEBUG, "AC97 "); |
| 147 | if (gpe0_sts & (1 << 4)) printk(BIOS_DEBUG, "USB2 "); |
| 148 | if (gpe0_sts & (1 << 3)) printk(BIOS_DEBUG, "USB1 "); |
| 149 | if (gpe0_sts & (1 << 2)) printk(BIOS_DEBUG, "HOT_PLUG "); |
| 150 | if (gpe0_sts & (1 << 0)) printk(BIOS_DEBUG, "THRM "); |
| 151 | printk(BIOS_DEBUG, "\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 152 | } |
| 153 | |
| 154 | |
| 155 | /** |
| 156 | * @brief read and clear ALT_GP_SMI_STS |
| 157 | * @return ALT_GP_SMI_STS register |
| 158 | */ |
| 159 | static u16 reset_alt_gp_smi_status(void) |
| 160 | { |
| 161 | u16 reg16; |
| 162 | |
| 163 | reg16 = inl(pmbase + ALT_GP_SMI_STS); |
| 164 | /* set status bits are cleared by writing 1 to them */ |
| 165 | outl(reg16, pmbase + ALT_GP_SMI_STS); |
| 166 | |
| 167 | return reg16; |
| 168 | } |
| 169 | |
| 170 | static void dump_alt_gp_smi_status(u16 alt_gp_smi_sts) |
| 171 | { |
| 172 | int i; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 173 | printk(BIOS_DEBUG, "ALT_GP_SMI_STS: "); |
Konstantin Aladyshev | 62f8083 | 2013-03-07 04:04:27 +0400 | [diff] [blame] | 174 | for (i=15; i>= 0; i--) { |
Konstantin Aladyshev | 07c3fc0 | 2013-03-07 04:37:02 +0400 | [diff] [blame] | 175 | if (alt_gp_smi_sts & (1 << i)) printk(BIOS_DEBUG, "GPI%d ", i); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 176 | } |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 177 | printk(BIOS_DEBUG, "\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 178 | } |
| 179 | |
| 180 | |
| 181 | |
| 182 | /** |
| 183 | * @brief read and clear TCOx_STS |
| 184 | * @return TCOx_STS registers |
| 185 | */ |
| 186 | static u32 reset_tco_status(void) |
| 187 | { |
| 188 | u32 tcobase = pmbase + 0x60; |
| 189 | u32 reg32; |
| 190 | |
| 191 | reg32 = inl(tcobase + 0x04); |
| 192 | /* set status bits are cleared by writing 1 to them */ |
| 193 | outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS |
| 194 | if (reg32 & (1 << 18)) |
| 195 | outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS |
| 196 | |
| 197 | return reg32; |
| 198 | } |
| 199 | |
| 200 | |
| 201 | static void dump_tco_status(u32 tco_sts) |
| 202 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 203 | printk(BIOS_DEBUG, "TCO_STS: "); |
| 204 | if (tco_sts & (1 << 20)) printk(BIOS_DEBUG, "SMLINK_SLV "); |
| 205 | if (tco_sts & (1 << 18)) printk(BIOS_DEBUG, "BOOT "); |
| 206 | if (tco_sts & (1 << 17)) printk(BIOS_DEBUG, "SECOND_TO "); |
| 207 | if (tco_sts & (1 << 16)) printk(BIOS_DEBUG, "INTRD_DET "); |
| 208 | if (tco_sts & (1 << 12)) printk(BIOS_DEBUG, "DMISERR "); |
| 209 | if (tco_sts & (1 << 10)) printk(BIOS_DEBUG, "DMISMI "); |
| 210 | if (tco_sts & (1 << 9)) printk(BIOS_DEBUG, "DMISCI "); |
| 211 | if (tco_sts & (1 << 8)) printk(BIOS_DEBUG, "BIOSWR "); |
| 212 | if (tco_sts & (1 << 7)) printk(BIOS_DEBUG, "NEWCENTURY "); |
| 213 | if (tco_sts & (1 << 3)) printk(BIOS_DEBUG, "TIMEOUT "); |
| 214 | if (tco_sts & (1 << 2)) printk(BIOS_DEBUG, "TCO_INT "); |
| 215 | if (tco_sts & (1 << 1)) printk(BIOS_DEBUG, "SW_TCO "); |
| 216 | if (tco_sts & (1 << 0)) printk(BIOS_DEBUG, "NMI2SMI "); |
| 217 | printk(BIOS_DEBUG, "\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | |
| 221 | |
| 222 | /** |
| 223 | * @brief Set the EOS bit |
| 224 | */ |
| 225 | static void smi_set_eos(void) |
| 226 | { |
| 227 | u8 reg8; |
| 228 | |
| 229 | reg8 = inb(pmbase + SMI_EN); |
| 230 | reg8 |= EOS; |
| 231 | outb(reg8, pmbase + SMI_EN); |
| 232 | } |
| 233 | |
| 234 | extern uint8_t smm_relocation_start, smm_relocation_end; |
Kyösti Mälkki | 2e50142 | 2017-04-21 08:43:09 +0300 | [diff] [blame] | 235 | static void *default_smm_area = NULL; |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 236 | |
Stefan Reinauer | bd11298 | 2010-03-17 03:14:54 +0000 | [diff] [blame] | 237 | static void smm_relocate(void) |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 238 | { |
| 239 | u32 smi_en; |
| 240 | u16 pm1_en; |
| 241 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 242 | printk(BIOS_DEBUG, "Initializing SMM handler..."); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 243 | |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 244 | pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffc; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 245 | printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 246 | |
| 247 | smi_en = inl(pmbase + SMI_EN); |
| 248 | if (smi_en & APMC_EN) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 249 | printk(BIOS_INFO, "SMI# handler already enabled?\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 250 | return; |
| 251 | } |
| 252 | |
Kyösti Mälkki | 2e50142 | 2017-04-21 08:43:09 +0300 | [diff] [blame] | 253 | default_smm_area = backup_default_smm_area(); |
| 254 | |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 255 | /* copy the SMM relocation code */ |
| 256 | memcpy((void *)0x38000, &smm_relocation_start, |
| 257 | &smm_relocation_end - &smm_relocation_start); |
Kyösti Mälkki | b6e9021 | 2016-12-04 22:17:37 +0200 | [diff] [blame] | 258 | wbinvd(); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 259 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 260 | printk(BIOS_DEBUG, "\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 261 | dump_smi_status(reset_smi_status()); |
| 262 | dump_pm1_status(reset_pm1_status()); |
| 263 | dump_gpe0_status(reset_gpe0_status()); |
| 264 | dump_alt_gp_smi_status(reset_alt_gp_smi_status()); |
| 265 | dump_tco_status(reset_tco_status()); |
| 266 | |
| 267 | /* Enable SMI generation: |
| 268 | * - on TCO events |
| 269 | * - on APMC writes (io 0xb2) |
| 270 | * - on writes to SLP_EN (sleep states) |
| 271 | * - on writes to GBL_RLS (bios commands) |
| 272 | * No SMIs: |
| 273 | * - on microcontroller writes (io 0x62/0x66) |
| 274 | */ |
| 275 | |
| 276 | smi_en = 0; /* reset SMI enables */ |
| 277 | |
| 278 | #if 0 |
| 279 | smi_en |= LEGACY_USB2_EN | LEGACY_USB_EN; |
| 280 | #endif |
| 281 | smi_en |= TCO_EN; |
| 282 | smi_en |= APMC_EN; |
| 283 | #if DEBUG_PERIODIC_SMIS |
| 284 | /* Set DEBUG_PERIODIC_SMIS in i82801gx.h to debug using |
| 285 | * periodic SMIs. |
| 286 | */ |
| 287 | smi_en |= PERIODIC_EN; |
| 288 | #endif |
| 289 | smi_en |= SLP_SMI_EN; |
| 290 | smi_en |= BIOS_EN; |
| 291 | |
| 292 | /* The following need to be on for SMIs to happen */ |
| 293 | smi_en |= EOS | GBL_SMI_EN; |
| 294 | |
| 295 | outl(smi_en, pmbase + SMI_EN); |
| 296 | |
| 297 | pm1_en = 0; |
| 298 | pm1_en |= PWRBTN_EN; |
| 299 | pm1_en |= GBL_EN; |
| 300 | outw(pm1_en, pmbase + PM1_EN); |
| 301 | |
| 302 | /** |
| 303 | * There are several methods of raising a controlled SMI# via |
| 304 | * software, among them: |
| 305 | * - Writes to io 0xb2 (APMC) |
| 306 | * - Writes to the Local Apic ICR with Delivery mode SMI. |
| 307 | * |
| 308 | * Using the local apic is a bit more tricky. According to |
| 309 | * AMD Family 11 Processor BKDG no destination shorthand must be |
| 310 | * used. |
| 311 | * The whole SMM initialization is quite a bit hardware specific, so |
| 312 | * I'm not too worried about the better of the methods at the moment |
| 313 | */ |
| 314 | |
| 315 | /* raise an SMI interrupt */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 316 | printk(BIOS_SPEW, " ... raise SMI#\n"); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 317 | outb(0x00, 0xb2); |
| 318 | } |
| 319 | |
Stefan Reinauer | bd11298 | 2010-03-17 03:14:54 +0000 | [diff] [blame] | 320 | static void smm_install(void) |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 321 | { |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 322 | /* copy the real SMM handler */ |
Kyösti Mälkki | 9d8adc0 | 2016-12-04 22:17:37 +0200 | [diff] [blame] | 323 | memcpy((void *)0xa0000, _binary_smm_start, |
| 324 | _binary_smm_end - _binary_smm_start); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 325 | wbinvd(); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 326 | } |
| 327 | |
| 328 | void smm_init(void) |
| 329 | { |
Stefan Reinauer | bc0f7a6 | 2010-08-01 15:41:14 +0000 | [diff] [blame] | 330 | /* Put SMM code to 0xa0000 */ |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 331 | smm_install(); |
| 332 | |
Stefan Reinauer | bc0f7a6 | 2010-08-01 15:41:14 +0000 | [diff] [blame] | 333 | /* Put relocation code to 0x38000 and relocate SMBASE */ |
| 334 | smm_relocate(); |
| 335 | |
| 336 | /* We're done. Make sure SMIs can happen! */ |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 337 | smi_set_eos(); |
| 338 | } |
| 339 | |
Kyösti Mälkki | 2e50142 | 2017-04-21 08:43:09 +0300 | [diff] [blame] | 340 | void smm_init_completion(void) |
| 341 | { |
| 342 | restore_default_smm_area(default_smm_area); |
| 343 | } |
| 344 | |
Kyösti Mälkki | 55b7263 | 2019-07-08 22:36:38 +0300 | [diff] [blame^] | 345 | void aseg_smm_lock(void) |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 346 | { |
| 347 | /* LOCK the SMM memory window and enable normal SMM. |
| 348 | * After running this function, only a full reset can |
| 349 | * make the SMM registers writable again. |
| 350 | */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 351 | printk(BIOS_DEBUG, "Locking SMM.\n"); |
Kyösti Mälkki | 55b7263 | 2019-07-08 22:36:38 +0300 | [diff] [blame^] | 352 | northbridge_write_smram(D_LCK | G_SMRAME | C_BASE_SEG); |
Stefan Reinauer | 800379f | 2010-03-01 08:34:19 +0000 | [diff] [blame] | 353 | } |
| 354 | |
| 355 | void smm_setup_structures(void *gnvs, void *tcg, void *smi1) |
| 356 | { |
| 357 | /* The GDT or coreboot table is going to live here. But a long time |
| 358 | * after we relocated the GNVS, so this is not troublesome. |
| 359 | */ |
| 360 | *(u32 *)0x500 = (u32)gnvs; |
| 361 | *(u32 *)0x504 = (u32)tcg; |
| 362 | *(u32 *)0x508 = (u32)smi1; |
| 363 | outb(0xea, 0xb2); |
| 364 | } |