Angel Pons | 3bd1e3d | 2020-04-05 15:47:17 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 2 | |
Felix Held | 4b2464f | 2022-02-23 17:54:20 +0100 | [diff] [blame^] | 3 | #include <arch/hpet.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 4 | #include <soc/iomap.h> |
| 5 | |
Subrata Banik | 36eb500 | 2020-01-22 16:01:14 +0530 | [diff] [blame] | 6 | Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID |
| 7 | Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID |
| 8 | Name (_SEG, Zero) // _SEG: PCI Segment |
| 9 | Name (_UID, Zero) // _UID: Unique ID |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 10 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 11 | Device (MCHC) |
| 12 | { |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 13 | Name (_ADR, 0x00000000) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 14 | |
| 15 | OperationRegion (MCHP, PCI_Config, 0x00, 0x100) |
| 16 | Field (MCHP, DWordAcc, NoLock, Preserve) |
| 17 | { |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 18 | Offset(0x40), /* EPBAR (0:0:0:40) */ |
| 19 | EPEN, 1, /* Enable */ |
| 20 | , 11, |
Subrata Banik | 4f65b87 | 2020-01-22 16:05:16 +0530 | [diff] [blame] | 21 | EPBR, 27, /* EPBAR [38:12] */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 22 | |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 23 | Offset(0x48), /* MCHBAR (0:0:0:48) */ |
| 24 | MHEN, 1, /* Enable */ |
| 25 | , 14, |
Subrata Banik | 4f65b87 | 2020-01-22 16:05:16 +0530 | [diff] [blame] | 26 | MHBR, 24, /* MCHBAR [38:15] */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 27 | |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 28 | Offset(0x60), /* PCIEXBAR (0:0:0:60) */ |
| 29 | PXEN, 1, /* Enable */ |
| 30 | PXSZ, 2, /* PCI Express Size */ |
| 31 | , 23, |
Subrata Banik | 4f65b87 | 2020-01-22 16:05:16 +0530 | [diff] [blame] | 32 | PXBR, 13, /* PCI Express BAR [38:26] */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 33 | |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 34 | Offset(0x68), /* DMIBAR (0:0:0:68) */ |
| 35 | DIEN, 1, /* Enable */ |
| 36 | , 11, |
Subrata Banik | 4f65b87 | 2020-01-22 16:05:16 +0530 | [diff] [blame] | 37 | DIBR, 27, /* DMIBAR [38:12] */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 38 | |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 39 | Offset (0x70), /* ME Base Address */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 40 | MEBA, 64, |
Subrata Banik | 4f65b87 | 2020-01-22 16:05:16 +0530 | [diff] [blame] | 41 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 42 | Offset (0xa0), |
| 43 | TOM, 64, /* Top of Used Memory */ |
| 44 | TUUD, 64, /* Top of Upper Used Memory */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 45 | |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 46 | Offset (0xbc), /* Top of Low Used Memory */ |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 47 | TLUD, 32, |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 48 | } |
| 49 | } |
| 50 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 51 | Method (_CRS, 0, Serialized) |
| 52 | { |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 53 | Name (MCRS, ResourceTemplate () |
| 54 | { |
| 55 | /* Bus Numbers */ |
| 56 | WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 57 | 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100) |
| 58 | |
| 59 | /* IO Region 0 */ |
| 60 | DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 61 | EntireRange, |
| 62 | 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8) |
| 63 | |
| 64 | /* PCI Config Space */ |
| 65 | Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) |
| 66 | |
| 67 | /* IO Region 1 */ |
| 68 | DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 69 | EntireRange, |
| 70 | 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300) |
| 71 | |
| 72 | /* VGA memory (0xa0000-0xbffff) */ |
| 73 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 74 | Cacheable, ReadWrite, |
| 75 | 0x00000000, 0x000a0000, 0x000bffff, 0x00000000, |
| 76 | 0x00020000) |
| 77 | |
| 78 | /* OPROM reserved (0xc0000-0xc3fff) */ |
| 79 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 80 | Cacheable, ReadWrite, |
| 81 | 0x00000000, 0x000c0000, 0x000c3fff, 0x00000000, |
| 82 | 0x00004000) |
| 83 | |
| 84 | /* OPROM reserved (0xc4000-0xc7fff) */ |
| 85 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 86 | Cacheable, ReadWrite, |
| 87 | 0x00000000, 0x000c4000, 0x000c7fff, 0x00000000, |
| 88 | 0x00004000) |
| 89 | |
| 90 | /* OPROM reserved (0xc8000-0xcbfff) */ |
| 91 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 92 | Cacheable, ReadWrite, |
| 93 | 0x00000000, 0x000c8000, 0x000cbfff, 0x00000000, |
| 94 | 0x00004000) |
| 95 | |
| 96 | /* OPROM reserved (0xcc000-0xcffff) */ |
| 97 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 98 | Cacheable, ReadWrite, |
| 99 | 0x00000000, 0x000cc000, 0x000cffff, 0x00000000, |
| 100 | 0x00004000) |
| 101 | |
| 102 | /* OPROM reserved (0xd0000-0xd3fff) */ |
| 103 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 104 | Cacheable, ReadWrite, |
| 105 | 0x00000000, 0x000d0000, 0x000d3fff, 0x00000000, |
| 106 | 0x00004000) |
| 107 | |
| 108 | /* OPROM reserved (0xd4000-0xd7fff) */ |
| 109 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 110 | Cacheable, ReadWrite, |
| 111 | 0x00000000, 0x000d4000, 0x000d7fff, 0x00000000, |
| 112 | 0x00004000) |
| 113 | |
| 114 | /* OPROM reserved (0xd8000-0xdbfff) */ |
| 115 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 116 | Cacheable, ReadWrite, |
| 117 | 0x00000000, 0x000d8000, 0x000dbfff, 0x00000000, |
| 118 | 0x00004000) |
| 119 | |
| 120 | /* OPROM reserved (0xdc000-0xdffff) */ |
| 121 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 122 | Cacheable, ReadWrite, |
| 123 | 0x00000000, 0x000dc000, 0x000dffff, 0x00000000, |
| 124 | 0x00004000) |
| 125 | |
| 126 | /* BIOS Extension (0xe0000-0xe3fff) */ |
| 127 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 128 | Cacheable, ReadWrite, |
| 129 | 0x00000000, 0x000e0000, 0x000e3fff, 0x00000000, |
| 130 | 0x00004000) |
| 131 | |
| 132 | /* BIOS Extension (0xe4000-0xe7fff) */ |
| 133 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 134 | Cacheable, ReadWrite, |
| 135 | 0x00000000, 0x000e4000, 0x000e7fff, 0x00000000, |
| 136 | 0x00004000) |
| 137 | |
| 138 | /* BIOS Extension (0xe8000-0xebfff) */ |
| 139 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 140 | Cacheable, ReadWrite, |
| 141 | 0x00000000, 0x000e8000, 0x000ebfff, 0x00000000, |
| 142 | 0x00004000) |
| 143 | |
| 144 | /* BIOS Extension (0xec000-0xeffff) */ |
| 145 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 146 | Cacheable, ReadWrite, |
| 147 | 0x00000000, 0x000ec000, 0x000effff, 0x00000000, |
| 148 | 0x00004000) |
| 149 | |
| 150 | /* System BIOS (0xf0000-0xfffff) */ |
| 151 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 152 | Cacheable, ReadWrite, |
| 153 | 0x00000000, 0x000f0000, 0x000fffff, 0x00000000, |
| 154 | 0x00010000) |
| 155 | |
| 156 | /* PCI Memory Region (TLUD - 0xdfffffff) */ |
| 157 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 158 | NonCacheable, ReadWrite, |
| 159 | 0x00000000, 0x00000000, 0xdfffffff, 0x00000000, |
| 160 | 0xE0000000,,, PM01) |
| 161 | |
| 162 | /* PCI Memory Region (TUUD - (TUUD + ABOVE_4G_MMIO_SIZE)) */ |
| 163 | QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 164 | NonCacheable, ReadWrite, |
| 165 | 0x00000000, 0x10000, 0x1ffff, 0x00000000, |
| 166 | 0x10000,,, PM02) |
| 167 | |
| 168 | /* PCH reserved resource (0xfc800000-0xfe7fffff) */ |
| 169 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 170 | Cacheable, ReadWrite, |
| 171 | 0x00000000, PCH_PRESERVED_BASE_ADDRESS, 0xfe7fffff, |
| 172 | 0x00000000, PCH_PRESERVED_BASE_SIZE) |
| 173 | |
Subrata Banik | fa8f9ec | 2020-01-22 15:58:39 +0530 | [diff] [blame] | 174 | #if !CONFIG(TPM_CR50) |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 175 | /* TPM Area (0xfed40000-0xfed44fff) */ |
| 176 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, |
| 177 | Cacheable, ReadWrite, |
| 178 | 0x00000000, 0xfed40000, 0xfed44fff, 0x00000000, |
| 179 | 0x00005000) |
Subrata Banik | fa8f9ec | 2020-01-22 15:58:39 +0530 | [diff] [blame] | 180 | #endif |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 181 | }) |
| 182 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 183 | /* Find PCI resource area in MCRS */ |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 184 | CreateDwordField (MCRS, PM01._MIN, PMIN) |
| 185 | CreateDwordField (MCRS, PM01._MAX, PMAX) |
| 186 | CreateDwordField (MCRS, PM01._LEN, PLEN) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 187 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 188 | /* |
| 189 | * Fix up PCI memory region |
| 190 | * Start with Top of Lower Usable DRAM |
Furquan Shaikh | 01750ef | 2020-05-16 21:41:35 -0700 | [diff] [blame] | 191 | * Lower 20 bits of TOLUD register need to be masked since they contain lock and |
| 192 | * reserved bits. |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 193 | */ |
Furquan Shaikh | 01750ef | 2020-05-16 21:41:35 -0700 | [diff] [blame] | 194 | Local0 = \_SB.PCI0.MCHC.TLUD & (0xfff << 20) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 195 | Local1 = \_SB.PCI0.MCHC.MEBA |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 196 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 197 | /* Check if ME base is equal */ |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 198 | If (Local0 == Local1) { |
Furquan Shaikh | 01750ef | 2020-05-16 21:41:35 -0700 | [diff] [blame] | 199 | /* |
| 200 | * Use Top Of Memory instead |
| 201 | * Lower 20 bits of TOM register need to be masked since they contain lock and |
| 202 | * reserved bits. |
| 203 | */ |
| 204 | Local0 = \_SB.PCI0.MCHC.TOM & (0x7ffff << 20) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 205 | } |
| 206 | |
Elyes HAOUAS | fc29afb | 2020-10-09 15:05:28 +0200 | [diff] [blame] | 207 | PMIN = Local0 |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 208 | PLEN = (PMAX - PMIN) + 1 |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 209 | |
| 210 | /* Patch PM02 range based on Memory Size */ |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 211 | If (A4GS == 0) { |
Subrata Banik | b6df6b0 | 2020-01-03 15:29:02 +0530 | [diff] [blame] | 212 | CreateQwordField (MCRS, PM02._LEN, MSEN) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 213 | MSEN = 0 |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 214 | } Else { |
Subrata Banik | b6df6b0 | 2020-01-03 15:29:02 +0530 | [diff] [blame] | 215 | CreateQwordField (MCRS, PM02._MIN, MMIN) |
| 216 | CreateQwordField (MCRS, PM02._MAX, MMAX) |
| 217 | CreateQwordField (MCRS, PM02._LEN, MLEN) |
| 218 | /* Set 64bit MMIO resource base and length */ |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 219 | MLEN = A4GS |
| 220 | MMIN = A4GB |
| 221 | MMAX = (MMIN + MLEN) - 1 |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 222 | } |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 223 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 224 | Return (MCRS) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 225 | } |
| 226 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 227 | /* Get MCH BAR */ |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 228 | Method (GMHB, 0, Serialized) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 229 | { |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 230 | Local0 = \_SB.PCI0.MCHC.MHBR << 15 |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 231 | Return (Local0) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 232 | } |
| 233 | |
| 234 | /* Get EP BAR */ |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 235 | Method (GEPB, 0, Serialized) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 236 | { |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 237 | Local0 = \_SB.PCI0.MCHC.EPBR << 12 |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 238 | Return (Local0) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 239 | } |
| 240 | |
| 241 | /* Get PCIe BAR */ |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 242 | Method (GPCB, 0, Serialized) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 243 | { |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 244 | Local0 = \_SB.PCI0.MCHC.PXBR << 26 |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 245 | Return (Local0) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 246 | } |
| 247 | |
| 248 | /* Get PCIe Length */ |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 249 | Method (GPCL, 0, Serialized) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 250 | { |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 251 | Local0 = 0x10000000 >> \_SB.PCI0.MCHC.PXSZ |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 252 | Return (Local0) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | /* Get DMI BAR */ |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 256 | Method (GDMB, 0, Serialized) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 257 | { |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 258 | Local0 = \_SB.PCI0.MCHC.DIBR << 12 |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 259 | Return (Local0) |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 260 | } |
| 261 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 262 | /* PCI Device Resource Consumption */ |
| 263 | Device (PDRC) |
| 264 | { |
Duncan Laurie | f966d3b | 2015-08-27 17:19:24 -0700 | [diff] [blame] | 265 | Name (_HID, EISAID ("PNP0C02")) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 266 | Name (_UID, 1) |
| 267 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 268 | Method (_CRS, 0, Serialized) |
| 269 | { |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 270 | Name (BUF0, ResourceTemplate () |
| 271 | { |
| 272 | /* MCH BAR _BAS will be updated in _CRS below according to |
| 273 | * B0:D0:F0:Reg.48h |
| 274 | */ |
| 275 | Memory32Fixed (ReadWrite, 0, 0x08000, MCHB) |
| 276 | |
| 277 | /* DMI BAR _BAS will be updated in _CRS below according to |
| 278 | * B0:D0:F0:Reg.68h |
| 279 | */ |
| 280 | Memory32Fixed (ReadWrite, 0, 0x01000, DMIB) |
| 281 | |
| 282 | /* EP BAR _BAS will be updated in _CRS below according to |
| 283 | * B0:D0:F0:Reg.40h |
| 284 | */ |
| 285 | Memory32Fixed (ReadWrite, 0, 0x01000, EGPB) |
| 286 | |
| 287 | /* PCI Express BAR _BAS and _LEN will be updated in |
| 288 | * _CRS below according to B0:D0:F0:Reg.60h |
| 289 | */ |
| 290 | Memory32Fixed (ReadWrite, 0, 0, PCIX) |
| 291 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 292 | /* VTD engine memory range. */ |
| 293 | Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE) |
| 294 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 295 | /* FLASH range */ |
| 296 | Memory32Fixed (ReadOnly, 0, CONFIG_ROM_SIZE, FIOH) |
| 297 | |
| 298 | /* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ |
| 299 | Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) |
| 300 | |
| 301 | /* HPET address decode range */ |
| 302 | Memory32Fixed (ReadWrite, HPET_BASE_ADDRESS, 0x400) |
| 303 | }) |
| 304 | |
| 305 | CreateDwordField (BUF0, MCHB._BAS, MBR0) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 306 | MBR0 = \_SB.PCI0.GMHB () |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 307 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 308 | CreateDwordField (BUF0, DMIB._BAS, DBR0) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 309 | DBR0 = \_SB.PCI0.GDMB () |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 310 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 311 | CreateDwordField (BUF0, EGPB._BAS, EBR0) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 312 | EBR0 = \_SB.PCI0.GEPB () |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 313 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 314 | CreateDwordField (BUF0, PCIX._BAS, XBR0) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 315 | XBR0 = \_SB.PCI0.GPCB () |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 316 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 317 | CreateDwordField (BUF0, PCIX._LEN, XSZ0) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 318 | XSZ0 = \_SB.PCI0.GPCL () |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 319 | |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 320 | CreateDwordField (BUF0, FIOH._BAS, FBR0) |
Furquan Shaikh | c336130 | 2020-05-16 21:38:33 -0700 | [diff] [blame] | 321 | FBR0 = 0x100000000 - CONFIG_ROM_SIZE |
Subrata Banik | e938fb7 | 2020-01-03 14:02:50 +0530 | [diff] [blame] | 322 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 323 | Return (BUF0) |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 324 | } |
| 325 | } |
Angel Pons | 09f0605 | 2021-01-05 20:30:16 +0100 | [diff] [blame] | 326 | |
| 327 | /* Integrated graphics 0:2.0 */ |
| 328 | #include <drivers/intel/gma/acpi/gfx.asl> |