Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <arch/io.h> |
| 22 | #include <stdint.h> |
| 23 | #include <device/device.h> |
| 24 | #include <device/pci.h> |
| 25 | #include <device/pci_ids.h> |
| 26 | #include <device/hypertransport.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <string.h> |
| 29 | #include <bitops.h> |
| 30 | #include <cpu/cpu.h> |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 31 | #include <cbmem.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 32 | |
| 33 | #include <cpu/x86/lapic.h> |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 34 | #include <cpu/amd/mtrr.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 35 | |
efdesign98 | 3f5ebd6 | 2011-09-14 13:47:17 -0600 | [diff] [blame] | 36 | #include "agesawrapper.h" |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 37 | #include "chip.h" |
| 38 | #include "northbridge.h" |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 39 | #if CONFIG_AMD_SB_CIMX |
| 40 | #include <sb_cimx.h> |
| 41 | #endif |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 42 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 43 | //#define FX_DEVS NODE_NUMS |
| 44 | #define FX_DEVS 1 |
| 45 | |
| 46 | static device_t __f0_dev[FX_DEVS]; |
| 47 | static device_t __f1_dev[FX_DEVS]; |
| 48 | static device_t __f2_dev[FX_DEVS]; |
| 49 | static device_t __f4_dev[FX_DEVS]; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 50 | static unsigned fx_devs = 0; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 51 | |
| 52 | device_t get_node_pci(u32 nodeid, u32 fn) |
| 53 | { |
zbao | 49bb26a4 | 2012-08-03 15:44:42 +0800 | [diff] [blame] | 54 | if ((CONFIG_CDB + nodeid) < 32) { |
| 55 | return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); |
| 56 | } else { |
| 57 | return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn)); |
| 58 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 59 | } |
| 60 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 61 | static void get_fx_devs(void) |
| 62 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 63 | int i; |
| 64 | for (i = 0; i < FX_DEVS; i++) { |
| 65 | __f0_dev[i] = get_node_pci(i, 0); |
| 66 | __f1_dev[i] = get_node_pci(i, 1); |
| 67 | __f2_dev[i] = get_node_pci(i, 2); |
| 68 | __f4_dev[i] = get_node_pci(i, 4); |
| 69 | if (__f0_dev[i] != NULL && __f1_dev[i] != NULL) |
| 70 | fx_devs = i + 1; |
| 71 | } |
| 72 | if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) { |
| 73 | die("Cannot find 0:0x18.[0|1]\n"); |
| 74 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 75 | } |
| 76 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 77 | static u32 f1_read_config32(unsigned reg) |
| 78 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 79 | if (fx_devs == 0) |
| 80 | get_fx_devs(); |
| 81 | return pci_read_config32(__f1_dev[0], reg); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 84 | static void f1_write_config32(unsigned reg, u32 value) |
| 85 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 86 | int i; |
| 87 | if (fx_devs == 0) |
| 88 | get_fx_devs(); |
| 89 | for (i = 0; i < fx_devs; i++) { |
| 90 | device_t dev; |
| 91 | dev = __f1_dev[i]; |
| 92 | if (dev && dev->enabled) { |
| 93 | pci_write_config32(dev, reg, value); |
| 94 | } |
| 95 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 96 | } |
| 97 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 98 | static u32 amdfam14_nodeid(device_t dev) |
| 99 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 100 | return (dev->path.pci.devfn >> 3) - CONFIG_CDB; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 101 | } |
| 102 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 103 | #include "amdfam14_conf.c" |
| 104 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 105 | static void northbridge_init(device_t dev) |
| 106 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 107 | printk(BIOS_DEBUG, "Northbridge init\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 108 | } |
| 109 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 110 | static void set_vga_enable_reg(u32 nodeid, u32 linkn) |
| 111 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 112 | u32 val; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 113 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 114 | val = 1 | (nodeid << 4) | (linkn << 12); |
| 115 | /* it will routing (1)mmio 0xa0000:0xbffff (2) io 0x3b0:0x3bb, |
| 116 | 0x3c0:0x3df */ |
| 117 | f1_write_config32(0xf4, val); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 118 | |
| 119 | } |
| 120 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 121 | static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 122 | unsigned goal_link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 123 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 124 | struct resource *res; |
| 125 | unsigned nodeid, link = 0; |
| 126 | int result; |
| 127 | res = 0; |
| 128 | for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) { |
| 129 | device_t dev; |
| 130 | dev = __f0_dev[nodeid]; |
| 131 | if (!dev) |
| 132 | continue; |
| 133 | for (link = 0; !res && (link < 8); link++) { |
| 134 | res = probe_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 135 | } |
| 136 | } |
| 137 | result = 2; |
| 138 | if (res) { |
| 139 | result = 0; |
| 140 | if ((goal_link == (link - 1)) && |
| 141 | (goal_nodeid == (nodeid - 1)) && (res->flags <= 1)) { |
| 142 | result = 1; |
| 143 | } |
| 144 | } |
| 145 | return result; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 146 | } |
| 147 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 148 | static struct resource *amdfam14_find_iopair(device_t dev, unsigned nodeid, |
| 149 | unsigned link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 150 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 151 | struct resource *resource; |
| 152 | u32 result, reg; |
| 153 | resource = 0; |
| 154 | reg = 0; |
| 155 | result = reg_useable(0xc0, dev, nodeid, link); |
| 156 | if (result >= 1) { |
| 157 | /* I have been allocated this one */ |
| 158 | reg = 0xc0; |
| 159 | } |
| 160 | /* Ext conf space */ |
| 161 | if (!reg) { |
| 162 | /* Because of Extend conf space, we will never run out of reg, |
| 163 | * but we need one index to differ them. So ,same node and same |
| 164 | * link can have multi range |
| 165 | */ |
| 166 | u32 index = get_io_addr_index(nodeid, link); |
| 167 | reg = 0x110 + (index << 24) + (4 << 20); // index could be 0, 255 |
| 168 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 169 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 170 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 171 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 172 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 173 | } |
| 174 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 175 | static struct resource *amdfam14_find_mempair(device_t dev, u32 nodeid, |
| 176 | u32 link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 177 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 178 | struct resource *resource; |
| 179 | u32 free_reg, reg; |
| 180 | resource = 0; |
| 181 | free_reg = 0; |
| 182 | for (reg = 0x80; reg <= 0xb8; reg += 0x8) { |
| 183 | int result; |
| 184 | result = reg_useable(reg, dev, nodeid, link); |
| 185 | if (result == 1) { |
| 186 | /* I have been allocated this one */ |
| 187 | break; |
| 188 | } else if (result > 1) { |
| 189 | /* I have a free register pair */ |
| 190 | free_reg = reg; |
| 191 | } |
| 192 | } |
| 193 | if (reg > 0xb8) { |
| 194 | reg = free_reg; |
| 195 | } |
| 196 | /* Ext conf space */ |
| 197 | if (!reg) { |
| 198 | /* Because of Extend conf space, we will never run out of reg, |
| 199 | * but we need one index to differ them. So ,same node and same |
| 200 | * link can have multi range |
| 201 | */ |
| 202 | u32 index = get_mmio_addr_index(nodeid, link); |
| 203 | reg = 0x110 + (index << 24) + (6 << 20); // index could be 0, 63 |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 204 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 205 | } |
| 206 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 207 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 208 | } |
| 209 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 210 | static void amdfam14_link_read_bases(device_t dev, u32 nodeid, u32 link) |
| 211 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 212 | struct resource *resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 213 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 214 | /* Initialize the io space constraints on the current bus */ |
| 215 | resource = amdfam14_find_iopair(dev, nodeid, link); |
| 216 | if (resource) { |
| 217 | u32 align; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 218 | #if CONFIG_EXT_CONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 219 | if ((resource->index & 0x1fff) == 0x1110) { // ext |
| 220 | align = 8; |
| 221 | } else |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 222 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 223 | align = log2(HT_IO_HOST_ALIGN); |
| 224 | resource->base = 0; |
| 225 | resource->size = 0; |
| 226 | resource->align = align; |
| 227 | resource->gran = align; |
| 228 | resource->limit = 0xffffUL; |
| 229 | resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE; |
| 230 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 231 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 232 | /* Initialize the prefetchable memory constraints on the current bus */ |
| 233 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 234 | if (resource) { |
| 235 | resource->base = 0; |
| 236 | resource->size = 0; |
| 237 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 238 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 239 | resource->limit = 0xffffffffffULL; |
| 240 | resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 241 | resource->flags |= IORESOURCE_BRIDGE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 242 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 243 | #if CONFIG_EXT_CONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 244 | if ((resource->index & 0x1fff) == 0x1110) { // ext |
| 245 | normalize_resource(resource); |
| 246 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 247 | #endif |
| 248 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 249 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 250 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 251 | /* Initialize the memory constraints on the current bus */ |
| 252 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 253 | if (resource) { |
| 254 | resource->base = 0; |
| 255 | resource->size = 0; |
| 256 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 257 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 258 | resource->limit = 0xffffffffffULL; |
| 259 | resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 260 | #if CONFIG_EXT_CONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 261 | if ((resource->index & 0x1fff) == 0x1110) { // ext |
| 262 | normalize_resource(resource); |
| 263 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 264 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 265 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 266 | } |
| 267 | |
| 268 | static u32 my_find_pci_tolm(struct bus *bus, u32 tolm) |
| 269 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 270 | struct resource *min; |
| 271 | min = 0; |
| 272 | search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, |
| 273 | &min); |
| 274 | if (min && tolm > min->base) { |
| 275 | tolm = min->base; |
| 276 | } |
| 277 | return tolm; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 278 | } |
| 279 | |
| 280 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 281 | |
| 282 | struct hw_mem_hole_info { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 283 | unsigned hole_startk; |
| 284 | int node_id; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 285 | }; |
| 286 | |
| 287 | static struct hw_mem_hole_info get_hw_mem_hole_info(void) |
| 288 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 289 | struct hw_mem_hole_info mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 290 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 291 | mem_hole.hole_startk = CONFIG_HW_MEM_HOLE_SIZEK; |
| 292 | mem_hole.node_id = -1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 293 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 294 | struct dram_base_mask_t d; |
| 295 | u32 hole; |
| 296 | d = get_dram_base_mask(0); |
| 297 | if (d.mask & 1) { |
| 298 | hole = pci_read_config32(__f1_dev[0], 0xf0); |
| 299 | if (hole & 1) { // we find the hole |
| 300 | mem_hole.hole_startk = (hole & (0xff << 24)) >> 10; |
| 301 | mem_hole.node_id = 0; // record the node No with hole |
| 302 | } |
| 303 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 304 | #if 0 |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 305 | /* We need to double check if there is speical set on base reg and limit reg |
| 306 | * are not continous instead of hole, it will find out it's hole_startk |
| 307 | */ |
| 308 | if (mem_hole.node_id == -1) { |
| 309 | resource_t limitk_pri = 0; |
| 310 | struct dram_base_mask_t d; |
| 311 | resource_t base_k, limit_k; |
| 312 | d = get_dram_base_mask(0); |
| 313 | if (d.base & 1) { |
| 314 | base_k = ((resource_t) (d.base & 0x1fffff00)) << 9; |
| 315 | if (base_k <= 4 * 1024 * 1024) { |
| 316 | if (limitk_pri != base_k) { // we find the hole |
| 317 | mem_hole.hole_startk = (unsigned)limitk_pri; // must be below 4G |
| 318 | mem_hole.node_id = 0; |
| 319 | } |
| 320 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 321 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 322 | limit_k = |
| 323 | ((resource_t) ((d.mask + 0x00000100) & 0x1fffff00)) |
| 324 | << 9; |
| 325 | limitk_pri = limit_k; |
| 326 | } |
| 327 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 328 | #endif |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 329 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 330 | return mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 331 | } |
| 332 | #endif |
| 333 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 334 | static void read_resources(device_t dev) |
| 335 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 336 | u32 nodeid; |
| 337 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 338 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 339 | printk(BIOS_DEBUG, "\nFam14h - read_resources.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 340 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 341 | nodeid = amdfam14_nodeid(dev); |
| 342 | for (link = dev->link_list; link; link = link->next) { |
| 343 | if (link->children) { |
| 344 | amdfam14_link_read_bases(dev, nodeid, link->link_num); |
| 345 | } |
| 346 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 347 | } |
| 348 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 349 | static void set_resource(device_t dev, struct resource *resource, u32 nodeid) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 350 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 351 | resource_t rbase, rend; |
| 352 | unsigned reg, link_num; |
| 353 | char buf[50]; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 354 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 355 | printk(BIOS_DEBUG, "\nFam14h - set_resource.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 356 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 357 | /* Make certain the resource has actually been set */ |
| 358 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
| 359 | return; |
| 360 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 361 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 362 | /* If I have already stored this resource don't worry about it */ |
| 363 | if (resource->flags & IORESOURCE_STORED) { |
| 364 | return; |
| 365 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 366 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 367 | /* Only handle PCI memory and IO resources */ |
| 368 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
| 369 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 370 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 371 | /* Ensure I am actually looking at a resource of function 1 */ |
| 372 | if ((resource->index & 0xffff) < 0x1000) { |
| 373 | return; |
| 374 | } |
| 375 | /* Get the base address */ |
| 376 | rbase = resource->base; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 377 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 378 | /* Get the limit (rounded up) */ |
| 379 | rend = resource_end(resource); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 380 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 381 | /* Get the register and link */ |
| 382 | reg = resource->index & 0xfff; // 4k |
| 383 | link_num = IOINDEX_LINK(resource->index); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 384 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 385 | if (resource->flags & IORESOURCE_IO) { |
| 386 | set_io_addr_reg(dev, nodeid, link_num, reg, rbase >> 8, |
| 387 | rend >> 8); |
| 388 | } else if (resource->flags & IORESOURCE_MEM) { |
| 389 | set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >> 24), |
| 390 | rbase >> 8, rend >> 8, 1); // [39:8] |
| 391 | } |
| 392 | resource->flags |= IORESOURCE_STORED; |
| 393 | sprintf(buf, " <node %x link %x>", nodeid, link_num); |
| 394 | report_resource_stored(dev, resource, buf); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 395 | } |
| 396 | |
efdesign98 | 3f5ebd6 | 2011-09-14 13:47:17 -0600 | [diff] [blame] | 397 | #if CONFIG_CONSOLE_VGA_MULTI |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 398 | extern device_t vga_pri; // the primary vga device, defined in device.c |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 399 | #endif |
| 400 | |
| 401 | static void create_vga_resource(device_t dev, unsigned nodeid) |
| 402 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 403 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 404 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 405 | printk(BIOS_DEBUG, "\nFam14h - create_vga_resource.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 406 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 407 | /* find out which link the VGA card is connected, |
| 408 | * we only deal with the 'first' vga card */ |
| 409 | for (link = dev->link_list; link; link = link->next) { |
| 410 | if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { |
efdesign98 | 3f5ebd6 | 2011-09-14 13:47:17 -0600 | [diff] [blame] | 411 | #if CONFIG_CONSOLE_VGA_MULTI |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 412 | printk(BIOS_DEBUG, |
| 413 | "VGA: vga_pri bus num = %d bus range [%d,%d]\n", |
| 414 | vga_pri->bus->secondary, link->secondary, |
| 415 | link->subordinate); |
| 416 | /* We need to make sure the vga_pri is under the link */ |
| 417 | if ((vga_pri->bus->secondary >= link->secondary) && |
| 418 | (vga_pri->bus->secondary <= link->subordinate)) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 419 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 420 | break; |
| 421 | } |
| 422 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 423 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 424 | /* no VGA card installed */ |
| 425 | if (link == NULL) |
| 426 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 427 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 428 | printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", |
| 429 | dev_path(dev), nodeid, link->link_num); |
| 430 | set_vga_enable_reg(nodeid, link->link_num); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 431 | } |
| 432 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 433 | static void set_resources(device_t dev) |
| 434 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 435 | unsigned nodeid; |
| 436 | struct bus *bus; |
| 437 | struct resource *res; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 438 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 439 | printk(BIOS_DEBUG, "\nFam14h - set_resources.\n"); |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 440 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 441 | /* Find the nodeid */ |
| 442 | nodeid = amdfam14_nodeid(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 443 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 444 | create_vga_resource(dev, nodeid); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 445 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 446 | /* Set each resource we have found */ |
| 447 | for (res = dev->resource_list; res; res = res->next) { |
| 448 | set_resource(dev, res, nodeid); |
| 449 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 450 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 451 | for (bus = dev->link_list; bus; bus = bus->next) { |
| 452 | if (bus->children) { |
| 453 | assign_resources(bus); |
| 454 | } |
| 455 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 456 | } |
| 457 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 458 | /* Domain/Root Complex related code */ |
| 459 | |
| 460 | static void domain_read_resources(device_t dev) |
| 461 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 462 | unsigned reg; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 463 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 464 | printk(BIOS_DEBUG, "\nFam14h - domain_read_resources.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 465 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 466 | /* Find the already assigned resource pairs */ |
| 467 | get_fx_devs(); |
| 468 | for (reg = 0x80; reg <= 0xc0; reg += 0x08) { |
| 469 | u32 base, limit; |
| 470 | base = f1_read_config32(reg); |
| 471 | limit = f1_read_config32(reg + 0x04); |
| 472 | /* Is this register allocated? */ |
| 473 | if ((base & 3) != 0) { |
| 474 | unsigned nodeid, reg_link; |
| 475 | device_t reg_dev; |
| 476 | if (reg < 0xc0) { // mmio |
| 477 | nodeid = (limit & 0xf) + (base & 0x30); |
| 478 | } else { // io |
| 479 | nodeid = (limit & 0xf) + ((base >> 4) & 0x30); |
| 480 | } |
| 481 | reg_link = (limit >> 4) & 7; |
| 482 | reg_dev = __f0_dev[nodeid]; |
| 483 | if (reg_dev) { |
| 484 | /* Reserve the resource */ |
| 485 | struct resource *res; |
| 486 | res = |
| 487 | new_resource(reg_dev, |
| 488 | IOINDEX(0x1000 + reg, |
| 489 | reg_link)); |
| 490 | if (res) { |
| 491 | res->flags = 1; |
| 492 | } |
| 493 | } |
| 494 | } |
| 495 | } |
| 496 | /* FIXME: do we need to check extend conf space? |
| 497 | I don't believe that much preset value */ |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 498 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 499 | #if !CONFIG_PCI_64BIT_PREF_MEM |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 500 | pci_domain_read_resources(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 501 | #else |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 502 | struct bus *link; |
| 503 | struct resource *resource; |
| 504 | for (link = dev->link_list; link; link = link->next) { |
| 505 | /* Initialize the system wide io space constraints */ |
| 506 | resource = new_resource(dev, 0 | (link->link_num << 2)); |
| 507 | resource->base = 0x400; |
| 508 | resource->limit = 0xffffUL; |
| 509 | resource->flags = IORESOURCE_IO; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 510 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 511 | /* Initialize the system wide prefetchable memory resources constraints */ |
| 512 | resource = new_resource(dev, 1 | (link->link_num << 2)); |
| 513 | resource->limit = 0xfcffffffffULL; |
| 514 | resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 515 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 516 | /* Initialize the system wide memory resources constraints */ |
| 517 | resource = new_resource(dev, 2 | (link->link_num << 2)); |
| 518 | resource->limit = 0xfcffffffffULL; |
| 519 | resource->flags = IORESOURCE_MEM; |
| 520 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 521 | #endif |
| 522 | } |
| 523 | |
Kyösti Mälkki | 6b5eb1c | 2012-07-19 19:26:43 +0300 | [diff] [blame] | 524 | static void setup_uma_memory(void) |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 525 | { |
| 526 | #if CONFIG_GFXUMA |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame^] | 527 | uint32_t topmem = (uint32_t) bsp_topmem(); |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 528 | uint32_t sys_mem; |
| 529 | |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 530 | /* refer to UMA Size Consideration in Family14h BKDG. */ |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame^] | 531 | sys_mem = topmem + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON() |
| 532 | if ((bsp_topmem2()>>32) || (sys_mem >= 0x80000000)) { |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 533 | uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */ |
| 534 | } |
| 535 | else { |
| 536 | if (sys_mem >= 0x40000000) { |
| 537 | uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */ |
| 538 | } else { |
| 539 | uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */ |
| 540 | } |
| 541 | } |
| 542 | |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame^] | 543 | uma_memory_base = topmem - uma_memory_size; /* TOP_MEM1 */ |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 544 | printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", |
| 545 | __func__, uma_memory_size, uma_memory_base); |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 546 | #endif |
| 547 | } |
| 548 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 549 | static void domain_set_resources(device_t dev) |
| 550 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 551 | printk(BIOS_DEBUG, "\nFam14h - domain_set_resources.\n"); |
| 552 | printk(BIOS_DEBUG, " amsr - incoming dev = %08x\n", (u32) dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 553 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 554 | #if CONFIG_PCI_64BIT_PREF_MEM |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 555 | struct resource *io, *mem1, *mem2; |
| 556 | struct resource *res; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 557 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 558 | unsigned long mmio_basek; |
| 559 | u32 pci_tolm; |
| 560 | int idx; |
| 561 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 562 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 563 | struct hw_mem_hole_info mem_hole; |
| 564 | u32 reset_memhole = 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 565 | #endif |
| 566 | |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame^] | 567 | setup_bsp_ramtop(); |
Kyösti Mälkki | 6b5eb1c | 2012-07-19 19:26:43 +0300 | [diff] [blame] | 568 | setup_uma_memory(); |
| 569 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 570 | #if CONFIG_PCI_64BIT_PREF_MEM |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 571 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 572 | printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n"); |
| 573 | for (link = dev->link_list; link; link = link->next) { |
| 574 | /* Now reallocate the pci resources memory with the |
| 575 | * highest addresses I can manage. |
| 576 | */ |
| 577 | mem1 = find_resource(dev, 1 | (link->link_num << 2)); |
| 578 | mem2 = find_resource(dev, 2 | (link->link_num << 2)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 579 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 580 | printk(BIOS_DEBUG, |
| 581 | "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 582 | (u32) (mem1->base), (u32) (mem1->limit), |
| 583 | (u32) (mem1->size), u32) (mem1->align)); |
| 584 | printk(BIOS_DEBUG, |
| 585 | "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 586 | (u32) (mem2->base), (u32) (mem2->limit), |
| 587 | (u32) (mem2->size), (u32) (mem2->align)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 588 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 589 | /* See if both resources have roughly the same limits */ |
| 590 | if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) |
| 591 | || ((mem1->limit > 0xffffffff) |
| 592 | && (mem2->limit > 0xffffffff))) { |
| 593 | /* If so place the one with the most stringent alignment first |
| 594 | */ |
| 595 | if (mem2->align > mem1->align) { |
| 596 | struct resource *tmp; |
| 597 | tmp = mem1; |
| 598 | mem1 = mem2; |
| 599 | mem2 = tmp; |
| 600 | } |
| 601 | /* Now place the memory as high up as it will go */ |
| 602 | mem2->base = resource_max(mem2); |
| 603 | mem1->limit = mem2->base - 1; |
| 604 | mem1->base = resource_max(mem1); |
| 605 | } else { |
| 606 | /* Place the resources as high up as they will go */ |
| 607 | mem2->base = resource_max(mem2); |
| 608 | mem1->base = resource_max(mem1); |
| 609 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 610 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 611 | printk(BIOS_DEBUG, |
| 612 | "base1: 0x%08Lx limit1: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 613 | mem1->base, mem1->limit, mem1->size, mem1->align); |
| 614 | printk(BIOS_DEBUG, |
| 615 | "base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx align: %d\n", |
| 616 | mem2->base, mem2->limit, mem2->size, mem2->align); |
| 617 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 618 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 619 | for (res = &dev->resource_list; res; res = res->next) { |
| 620 | res->flags |= IORESOURCE_ASSIGNED; |
| 621 | res->flags |= IORESOURCE_STORED; |
| 622 | report_resource_stored(dev, res, ""); |
| 623 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 624 | #endif |
| 625 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 626 | pci_tolm = 0xffffffffUL; |
| 627 | for (link = dev->link_list; link; link = link->next) { |
| 628 | pci_tolm = my_find_pci_tolm(link, pci_tolm); |
| 629 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 630 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 631 | // FIXME handle interleaved nodes. If you fix this here, please fix |
| 632 | // amdk8, too. |
| 633 | mmio_basek = pci_tolm >> 10; |
| 634 | /* Round mmio_basek to something the processor can support */ |
| 635 | mmio_basek &= ~((1 << 6) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 636 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 637 | // FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M |
| 638 | // MMIO hole. If you fix this here, please fix amdk8, too. |
| 639 | /* Round the mmio hole to 64M */ |
| 640 | mmio_basek &= ~((64 * 1024) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 641 | |
| 642 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 643 | /* if the hw mem hole is already set in raminit stage, here we will compare |
| 644 | * mmio_basek and hole_basek. if mmio_basek is bigger that hole_basek and will |
| 645 | * use hole_basek as mmio_basek and we don't need to reset hole. |
| 646 | * otherwise We reset the hole to the mmio_basek |
| 647 | */ |
| 648 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 649 | mem_hole = get_hw_mem_hole_info(); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 650 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 651 | // Use hole_basek as mmio_basek, and we don't need to reset hole anymore |
| 652 | if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { |
| 653 | mmio_basek = mem_hole.hole_startk; |
| 654 | reset_memhole = 0; |
| 655 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 656 | #endif |
| 657 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 658 | idx = 0x10; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 659 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 660 | struct dram_base_mask_t d; |
| 661 | resource_t basek, limitk, sizek; // 4 1T |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 662 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 663 | d = get_dram_base_mask(0); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 664 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 665 | if (d.mask & 1) { |
| 666 | basek = ((resource_t) ((u64) d.base)) << 8; |
| 667 | limitk = (resource_t) (((u64) d.mask << 8) | 0xFFFFFF); |
| 668 | printk(BIOS_DEBUG, |
| 669 | "adsr: (before) basek = %llx, limitk = %llx.\n", basek, |
| 670 | limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 671 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 672 | /* Convert these values to multiples of 1K for ease of math. */ |
| 673 | basek >>= 10; |
| 674 | limitk >>= 10; |
| 675 | sizek = limitk - basek + 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 676 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 677 | printk(BIOS_DEBUG, |
| 678 | "adsr: (after) basek = %llx, limitk = %llx, sizek = %llx.\n", |
| 679 | basek, limitk, sizek); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 680 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 681 | /* see if we need a hole from 0xa0000 to 0xbffff */ |
| 682 | if ((basek < 640) && (sizek > 768)) { |
| 683 | printk(BIOS_DEBUG,"adsr - 0xa0000 to 0xbffff resource.\n"); |
| 684 | ram_resource(dev, (idx | 0), basek, 640 - basek); |
| 685 | idx += 0x10; |
| 686 | basek = 768; |
| 687 | sizek = limitk - 768; |
| 688 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 689 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 690 | printk(BIOS_DEBUG, |
| 691 | "adsr: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", |
| 692 | mmio_basek, basek, limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 693 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 694 | /* split the region to accomodate pci memory space */ |
| 695 | if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) { |
| 696 | if (basek <= mmio_basek) { |
| 697 | unsigned pre_sizek; |
| 698 | pre_sizek = mmio_basek - basek; |
| 699 | if (pre_sizek > 0) { |
| 700 | ram_resource(dev, idx, basek, |
| 701 | pre_sizek); |
| 702 | idx += 0x10; |
| 703 | sizek -= pre_sizek; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 704 | #if CONFIG_WRITE_HIGH_TABLES |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 705 | if (high_tables_base == 0) { |
| 706 | /* Leave some space for ACPI, PIRQ and MP tables */ |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 707 | #if CONFIG_GFXUMA |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 708 | high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 709 | #else |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 710 | high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 711 | #endif |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 712 | high_tables_size = HIGH_MEMORY_SIZE; |
| 713 | printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", |
| 714 | (u32)(high_tables_size / 1024), high_tables_base); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 715 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 716 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 717 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 718 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 719 | basek = mmio_basek; |
| 720 | } |
| 721 | if ((basek + sizek) <= 4 * 1024 * 1024) { |
| 722 | sizek = 0; |
| 723 | } else { |
| 724 | basek = 4 * 1024 * 1024; |
| 725 | sizek -= (4 * 1024 * 1024 - mmio_basek); |
| 726 | } |
| 727 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 728 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 729 | ram_resource(dev, (idx | 0), basek, sizek); |
| 730 | idx += 0x10; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 731 | #if CONFIG_WRITE_HIGH_TABLES |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 732 | printk(BIOS_DEBUG, |
| 733 | "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0, |
| 734 | mmio_basek, basek, limitk); |
| 735 | if (high_tables_base == 0) { |
| 736 | /* Leave some space for ACPI, PIRQ and MP tables */ |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 737 | #if CONFIG_GFXUMA |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 738 | high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 739 | printk(BIOS_DEBUG, " adsr - uma_memory_base = %llx.\n", uma_memory_base); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 740 | #else |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 741 | high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 742 | #endif |
Marc Jones | 5750ed2 | 2012-03-15 13:21:41 -0600 | [diff] [blame] | 743 | high_tables_size = HIGH_MEMORY_SIZE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 744 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 745 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 746 | } |
| 747 | printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); |
| 748 | printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n", |
| 749 | high_tables_size); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 750 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 751 | #if CONFIG_GFXUMA |
Kyösti Mälkki | 63f8c08 | 2012-07-10 13:27:26 +0300 | [diff] [blame] | 752 | uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 753 | #endif |
| 754 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 755 | for (link = dev->link_list; link; link = link->next) { |
| 756 | if (link->children) { |
| 757 | assign_resources(link); |
| 758 | } |
| 759 | } |
| 760 | printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 761 | } |
| 762 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 763 | extern u8 acpi_slp_type; |
| 764 | |
| 765 | static void domain_enable_resources(device_t dev) |
| 766 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 767 | u32 val; |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 768 | |
| 769 | #if CONFIG_AMD_SB_CIMX |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 770 | #if CONFIG_HAVE_ACPI_RESUME |
| 771 | if (acpi_slp_type != 3) { |
| 772 | sb_After_Pci_Init(); |
| 773 | sb_Mid_Post_Init(); |
| 774 | } else { |
| 775 | sb_After_Pci_Restore_Init(); |
| 776 | } |
| 777 | #else |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 778 | sb_After_Pci_Init(); |
| 779 | sb_Mid_Post_Init(); |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 780 | #endif |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 781 | #endif |
| 782 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 783 | /* Must be called after PCI enumeration and resource allocation */ |
| 784 | printk(BIOS_DEBUG, "\nFam14h - domain_enable_resources: AmdInitMid.\n"); |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 785 | |
| 786 | #if CONFIG_HAVE_ACPI_RESUME |
| 787 | if (acpi_slp_type != 3) { |
| 788 | printk(BIOS_DEBUG, "agesawrapper_amdinitmid "); |
| 789 | val = agesawrapper_amdinitmid (); |
| 790 | if (val) |
| 791 | printk(BIOS_DEBUG, "error level: %x \n", val); |
| 792 | else |
| 793 | printk(BIOS_DEBUG, "passed.\n"); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 794 | } |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 795 | #else |
| 796 | printk(BIOS_DEBUG, "agesawrapper_amdinitmid "); |
| 797 | val = agesawrapper_amdinitmid (); |
| 798 | if (val) |
| 799 | printk(BIOS_DEBUG, "error level: %x \n", val); |
| 800 | else |
| 801 | printk(BIOS_DEBUG, "passed.\n"); |
| 802 | #endif |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 803 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 804 | printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 805 | } |
| 806 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 807 | /* Bus related code */ |
| 808 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 809 | static void cpu_bus_read_resources(device_t dev) { |
| 810 | printk(BIOS_DEBUG, "\nFam14h - cpu_bus_read_resources.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 811 | |
| 812 | #if CONFIG_MMCONF_SUPPORT |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 813 | struct resource *resource = new_resource(dev, 0xc0010058); |
| 814 | resource->base = CONFIG_MMCONF_BASE_ADDRESS; |
| 815 | resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; |
| 816 | resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | |
| 817 | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 818 | #endif |
| 819 | } |
| 820 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 821 | static void cpu_bus_set_resources(device_t dev) { |
| 822 | struct resource *resource = find_resource(dev, 0xc0010058); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 823 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 824 | printk(BIOS_DEBUG, "\nFam14h - cpu_bus_set_resources.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 825 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 826 | if (resource) { |
| 827 | report_resource_stored(dev, resource, " <mmconfig>"); |
| 828 | } |
| 829 | pci_dev_set_resources(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 830 | } |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 831 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 832 | static u32 cpu_bus_scan(device_t dev, u32 max) |
| 833 | { |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 834 | device_t cpu; |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 835 | struct device_path cpu_path; |
| 836 | int apic_id, cores_found; |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 837 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 838 | /* There is only one node for fam14, but there may be multiple cores. */ |
| 839 | cpu = dev_find_slot(0, PCI_DEVFN(0x18, 0)); |
| 840 | if (!cpu) |
| 841 | printk(BIOS_ERR, "ERROR: %02x:%02x.0 not found", 0, 0x18); |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 842 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 843 | cores_found = (pci_read_config32(dev_find_slot(0,PCI_DEVFN(0x18,0x3)), 0xe8) >> 12) & 3; |
| 844 | printk(BIOS_DEBUG, " AP siblings=%d\n", cores_found); |
| 845 | |
| 846 | |
| 847 | for (apic_id = 0; apic_id <= cores_found; apic_id++) { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 848 | cpu_path.type = DEVICE_PATH_APIC; |
| 849 | cpu_path.apic.apic_id = apic_id; |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 850 | cpu = alloc_find_dev(dev->link_list, &cpu_path); |
| 851 | if (cpu) { |
| 852 | cpu->enabled = 1; |
| 853 | cpu->path.apic.node_id = 0; |
| 854 | cpu->path.apic.core_id = apic_id; |
| 855 | printk(BIOS_DEBUG, "CPU: %s %s\n", |
| 856 | dev_path(cpu), cpu->enabled?"enabled":"disabled"); |
| 857 | } else { |
| 858 | cpu->enabled = 0; |
| 859 | } |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 860 | } |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 861 | return max; |
| 862 | } |
| 863 | |
| 864 | static void cpu_bus_init(device_t dev) |
| 865 | { |
| 866 | initialize_cpus(dev->link_list); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 867 | } |
| 868 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 869 | /* North Bridge Structures */ |
| 870 | |
| 871 | static struct device_operations northbridge_operations = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 872 | .read_resources = read_resources, |
| 873 | .set_resources = set_resources, |
| 874 | .enable_resources = pci_dev_enable_resources, |
| 875 | .init = northbridge_init, |
| 876 | .enable = 0,.ops_pci = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 877 | }; |
| 878 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 879 | static const struct pci_driver northbridge_driver __pci_driver = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 880 | .ops = &northbridge_operations, |
| 881 | .vendor = PCI_VENDOR_ID_AMD, |
| 882 | .device = 0x1510, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 883 | }; |
| 884 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 885 | struct chip_operations northbridge_amd_agesa_family14_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 886 | CHIP_NAME("AMD Family 14h Northbridge") |
| 887 | .enable_dev = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 888 | }; |
| 889 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 890 | /* Root Complex Structures */ |
| 891 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 892 | static struct device_operations pci_domain_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 893 | .read_resources = domain_read_resources, |
| 894 | .set_resources = domain_set_resources, |
| 895 | .enable_resources = domain_enable_resources, |
| 896 | .init = NULL, |
| 897 | .scan_bus = pci_domain_scan_bus, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 898 | }; |
| 899 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 900 | static struct device_operations cpu_bus_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 901 | .read_resources = cpu_bus_read_resources, |
| 902 | .set_resources = cpu_bus_set_resources, |
| 903 | .enable_resources = NULL, |
| 904 | .init = cpu_bus_init, |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 905 | .scan_bus = cpu_bus_scan, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 906 | }; |
| 907 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 908 | static void root_complex_enable_dev(struct device *dev) { |
| 909 | /* Set the operations if it is a special bus type */ |
| 910 | if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { |
| 911 | dev->ops = &pci_domain_ops; |
| 912 | } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { |
| 913 | dev->ops = &cpu_bus_ops; |
| 914 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 915 | } |
| 916 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 917 | struct chip_operations northbridge_amd_agesa_family14_root_complex_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 918 | CHIP_NAME("AMD Family 14h Root Complex") |
| 919 | .enable_dev = root_complex_enable_dev, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 920 | }; |