Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <arch/io.h> |
Kyösti Mälkki | 8ae16a4 | 2014-06-19 20:44:34 +0300 | [diff] [blame] | 18 | #include <arch/acpi.h> |
Kyösti Mälkki | 68a83df | 2014-11-26 09:51:14 +0200 | [diff] [blame] | 19 | #include <arch/acpigen.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 20 | #include <stdint.h> |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <device/pci_ids.h> |
| 24 | #include <device/hypertransport.h> |
| 25 | #include <stdlib.h> |
| 26 | #include <string.h> |
Ronald G. Minnich | 5079a0d | 2012-11-27 11:32:38 -0800 | [diff] [blame] | 27 | #include <lib.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 28 | #include <cpu/cpu.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 29 | #include <cpu/x86/lapic.h> |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 30 | #include <cpu/amd/msr.h> |
Kyösti Mälkki | 55fff930 | 2012-07-11 08:02:39 +0300 | [diff] [blame] | 31 | #include <cpu/amd/mtrr.h> |
Kyösti Mälkki | 28c4d2f | 2016-11-25 11:21:02 +0200 | [diff] [blame] | 32 | #include <northbridge/amd/agesa/state_machine.h> |
Kyösti Mälkki | d610c58 | 2017-03-05 06:28:18 +0200 | [diff] [blame] | 33 | #include <northbridge/amd/agesa/agesa_helper.h> |
Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 34 | #include <sb_cimx.h> |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 35 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 36 | #define FX_DEVS 1 |
| 37 | |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 38 | static struct device *__f0_dev[FX_DEVS]; |
| 39 | static struct device *__f1_dev[FX_DEVS]; |
| 40 | static struct device *__f2_dev[FX_DEVS]; |
| 41 | static struct device *__f4_dev[FX_DEVS]; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 42 | static unsigned fx_devs = 0; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 43 | |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 44 | static struct device *get_node_pci(u32 nodeid, u32 fn) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 45 | { |
Kyösti Mälkki | 113f670 | 2018-05-20 20:12:32 +0300 | [diff] [blame] | 46 | return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 47 | } |
| 48 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 49 | static void get_fx_devs(void) |
| 50 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 51 | int i; |
| 52 | for (i = 0; i < FX_DEVS; i++) { |
| 53 | __f0_dev[i] = get_node_pci(i, 0); |
| 54 | __f1_dev[i] = get_node_pci(i, 1); |
| 55 | __f2_dev[i] = get_node_pci(i, 2); |
| 56 | __f4_dev[i] = get_node_pci(i, 4); |
| 57 | if (__f0_dev[i] != NULL && __f1_dev[i] != NULL) |
| 58 | fx_devs = i + 1; |
| 59 | } |
| 60 | if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) { |
| 61 | die("Cannot find 0:0x18.[0|1]\n"); |
| 62 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 63 | } |
| 64 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 65 | static u32 f1_read_config32(unsigned reg) |
| 66 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 67 | if (fx_devs == 0) |
| 68 | get_fx_devs(); |
| 69 | return pci_read_config32(__f1_dev[0], reg); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 70 | } |
| 71 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 72 | static void f1_write_config32(unsigned reg, u32 value) |
| 73 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 74 | int i; |
| 75 | if (fx_devs == 0) |
| 76 | get_fx_devs(); |
| 77 | for (i = 0; i < fx_devs; i++) { |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 78 | struct device *dev; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 79 | dev = __f1_dev[i]; |
| 80 | if (dev && dev->enabled) { |
| 81 | pci_write_config32(dev, reg, value); |
| 82 | } |
| 83 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 84 | } |
| 85 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 86 | static u32 amdfam14_nodeid(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 87 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 88 | return (dev->path.pci.devfn >> 3) - CONFIG_CDB; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 89 | } |
| 90 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 91 | #include "amdfam14_conf.c" |
| 92 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 93 | static void northbridge_init(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 94 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 95 | printk(BIOS_DEBUG, "Northbridge init\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 96 | } |
| 97 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 98 | static void set_vga_enable_reg(u32 nodeid, u32 linkn) |
| 99 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 100 | u32 val; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 101 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 102 | val = 1 | (nodeid << 4) | (linkn << 12); |
| 103 | /* it will routing (1)mmio 0xa0000:0xbffff (2) io 0x3b0:0x3bb, |
| 104 | 0x3c0:0x3df */ |
| 105 | f1_write_config32(0xf4, val); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 106 | |
| 107 | } |
| 108 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 109 | static int reg_useable(unsigned reg, struct device *goal_dev, |
| 110 | unsigned goal_nodeid, unsigned goal_link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 111 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 112 | struct resource *res; |
| 113 | unsigned nodeid, link = 0; |
| 114 | int result; |
| 115 | res = 0; |
| 116 | for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) { |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 117 | struct device *dev; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 118 | dev = __f0_dev[nodeid]; |
| 119 | if (!dev) |
| 120 | continue; |
| 121 | for (link = 0; !res && (link < 8); link++) { |
| 122 | res = probe_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 123 | } |
| 124 | } |
| 125 | result = 2; |
| 126 | if (res) { |
| 127 | result = 0; |
| 128 | if ((goal_link == (link - 1)) && |
| 129 | (goal_nodeid == (nodeid - 1)) && (res->flags <= 1)) { |
| 130 | result = 1; |
| 131 | } |
| 132 | } |
| 133 | return result; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 134 | } |
| 135 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 136 | static struct resource *amdfam14_find_iopair(struct device *dev, |
| 137 | unsigned nodeid, unsigned link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 138 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 139 | struct resource *resource; |
| 140 | u32 result, reg; |
| 141 | resource = 0; |
| 142 | reg = 0; |
| 143 | result = reg_useable(0xc0, dev, nodeid, link); |
| 144 | if (result >= 1) { |
| 145 | /* I have been allocated this one */ |
| 146 | reg = 0xc0; |
| 147 | } |
| 148 | /* Ext conf space */ |
| 149 | if (!reg) { |
| 150 | /* Because of Extend conf space, we will never run out of reg, |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 151 | * but we need one index to differ them. So,same node and same |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 152 | * link can have multi range |
| 153 | */ |
| 154 | u32 index = get_io_addr_index(nodeid, link); |
| 155 | reg = 0x110 + (index << 24) + (4 << 20); // index could be 0, 255 |
| 156 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 157 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 158 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 159 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 160 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 161 | } |
| 162 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 163 | static struct resource *amdfam14_find_mempair(struct device *dev, u32 nodeid, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 164 | u32 link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 165 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 166 | struct resource *resource; |
| 167 | u32 free_reg, reg; |
| 168 | resource = 0; |
| 169 | free_reg = 0; |
| 170 | for (reg = 0x80; reg <= 0xb8; reg += 0x8) { |
| 171 | int result; |
| 172 | result = reg_useable(reg, dev, nodeid, link); |
| 173 | if (result == 1) { |
| 174 | /* I have been allocated this one */ |
| 175 | break; |
| 176 | } else if (result > 1) { |
| 177 | /* I have a free register pair */ |
| 178 | free_reg = reg; |
| 179 | } |
| 180 | } |
| 181 | if (reg > 0xb8) { |
| 182 | reg = free_reg; |
| 183 | } |
| 184 | /* Ext conf space */ |
| 185 | if (!reg) { |
| 186 | /* Because of Extend conf space, we will never run out of reg, |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 187 | * but we need one index to differ them. So,same node and same |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 188 | * link can have multi range |
| 189 | */ |
| 190 | u32 index = get_mmio_addr_index(nodeid, link); |
| 191 | reg = 0x110 + (index << 24) + (6 << 20); // index could be 0, 63 |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 192 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 193 | } |
| 194 | resource = new_resource(dev, IOINDEX(0x1000 + reg, link)); |
| 195 | return resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 196 | } |
| 197 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 198 | static void amdfam14_link_read_bases(struct device *dev, u32 nodeid, u32 link) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 199 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 200 | struct resource *resource; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 201 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 202 | /* Initialize the io space constraints on the current bus */ |
| 203 | resource = amdfam14_find_iopair(dev, nodeid, link); |
| 204 | if (resource) { |
| 205 | u32 align; |
Kyösti Mälkki | ac7402d | 2014-12-14 08:30:17 +0200 | [diff] [blame] | 206 | align = log2(HT_IO_HOST_ALIGN); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 207 | resource->base = 0; |
| 208 | resource->size = 0; |
| 209 | resource->align = align; |
| 210 | resource->gran = align; |
| 211 | resource->limit = 0xffffUL; |
| 212 | resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE; |
| 213 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 214 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 215 | /* Initialize the prefetchable memory constraints on the current bus */ |
| 216 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 217 | if (resource) { |
| 218 | resource->base = 0; |
| 219 | resource->size = 0; |
| 220 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 221 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 222 | resource->limit = 0xffffffffffULL; |
| 223 | resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 224 | resource->flags |= IORESOURCE_BRIDGE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 225 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 226 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 227 | /* Initialize the memory constraints on the current bus */ |
| 228 | resource = amdfam14_find_mempair(dev, nodeid, link); |
| 229 | if (resource) { |
| 230 | resource->base = 0; |
| 231 | resource->size = 0; |
| 232 | resource->align = log2(HT_MEM_HOST_ALIGN); |
| 233 | resource->gran = log2(HT_MEM_HOST_ALIGN); |
| 234 | resource->limit = 0xffffffffffULL; |
| 235 | resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 236 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 237 | } |
| 238 | |
| 239 | static u32 my_find_pci_tolm(struct bus *bus, u32 tolm) |
| 240 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 241 | struct resource *min; |
| 242 | min = 0; |
| 243 | search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, |
| 244 | &min); |
| 245 | if (min && tolm > min->base) { |
| 246 | tolm = min->base; |
| 247 | } |
| 248 | return tolm; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 252 | |
| 253 | struct hw_mem_hole_info { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 254 | unsigned hole_startk; |
| 255 | int node_id; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 256 | }; |
| 257 | |
| 258 | static struct hw_mem_hole_info get_hw_mem_hole_info(void) |
| 259 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 260 | struct hw_mem_hole_info mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 261 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 262 | mem_hole.hole_startk = CONFIG_HW_MEM_HOLE_SIZEK; |
| 263 | mem_hole.node_id = -1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 264 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 265 | struct dram_base_mask_t d; |
| 266 | u32 hole; |
| 267 | d = get_dram_base_mask(0); |
| 268 | if (d.mask & 1) { |
| 269 | hole = pci_read_config32(__f1_dev[0], 0xf0); |
| 270 | if (hole & 1) { // we find the hole |
| 271 | mem_hole.hole_startk = (hole & (0xff << 24)) >> 10; |
| 272 | mem_hole.node_id = 0; // record the node No with hole |
| 273 | } |
| 274 | } |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 275 | return mem_hole; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 276 | } |
| 277 | #endif |
| 278 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 279 | static void nb_read_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 280 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 281 | u32 nodeid; |
| 282 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 283 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 284 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 285 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 286 | nodeid = amdfam14_nodeid(dev); |
| 287 | for (link = dev->link_list; link; link = link->next) { |
| 288 | if (link->children) { |
| 289 | amdfam14_link_read_bases(dev, nodeid, link->link_num); |
| 290 | } |
| 291 | } |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 292 | |
| 293 | /* |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 294 | * This MMCONF resource must be reserved in the PCI domain. |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 295 | * It is not honored by the coreboot resource allocator if it is in |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 296 | * the CPU_CLUSTER. |
Marc Jones | d5c998b | 2013-01-16 17:14:24 -0700 | [diff] [blame] | 297 | */ |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 298 | mmconf_resource(dev, MMIO_CONF_BASE); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 299 | } |
| 300 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 301 | static void set_resource(struct device *dev, struct resource *resource, |
| 302 | u32 nodeid) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 303 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 304 | resource_t rbase, rend; |
| 305 | unsigned reg, link_num; |
| 306 | char buf[50]; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 307 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 308 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 309 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 310 | /* Make certain the resource has actually been set */ |
| 311 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
| 312 | return; |
| 313 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 314 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 315 | /* If I have already stored this resource don't worry about it */ |
| 316 | if (resource->flags & IORESOURCE_STORED) { |
| 317 | return; |
| 318 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 319 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 320 | /* Only handle PCI memory and IO resources */ |
| 321 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
| 322 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 323 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 324 | /* Ensure I am actually looking at a resource of function 1 */ |
| 325 | if ((resource->index & 0xffff) < 0x1000) { |
| 326 | return; |
| 327 | } |
| 328 | /* Get the base address */ |
| 329 | rbase = resource->base; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 330 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 331 | /* Get the limit (rounded up) */ |
| 332 | rend = resource_end(resource); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 333 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 334 | /* Get the register and link */ |
| 335 | reg = resource->index & 0xfff; // 4k |
| 336 | link_num = IOINDEX_LINK(resource->index); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 337 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 338 | if (resource->flags & IORESOURCE_IO) { |
| 339 | set_io_addr_reg(dev, nodeid, link_num, reg, rbase >> 8, |
| 340 | rend >> 8); |
| 341 | } else if (resource->flags & IORESOURCE_MEM) { |
| 342 | set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >> 24), |
| 343 | rbase >> 8, rend >> 8, 1); // [39:8] |
| 344 | } |
| 345 | resource->flags |= IORESOURCE_STORED; |
Elyes HAOUAS | 0d4b11a | 2016-10-03 21:57:21 +0200 | [diff] [blame] | 346 | snprintf(buf, sizeof(buf), " <node %x link %x>", nodeid, link_num); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 347 | report_resource_stored(dev, resource, buf); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 348 | } |
| 349 | |
Martin Roth | 77a58b9 | 2017-06-24 14:45:48 -0600 | [diff] [blame] | 350 | #if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI) |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 351 | extern struct device *vga_pri; // the primary vga device, defined in device.c |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 352 | #endif |
| 353 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 354 | static void create_vga_resource(struct device *dev, unsigned nodeid) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 355 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 356 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 357 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 358 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 359 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 360 | /* find out which link the VGA card is connected, |
| 361 | * we only deal with the 'first' vga card */ |
| 362 | for (link = dev->link_list; link; link = link->next) { |
| 363 | if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { |
Martin Roth | 77a58b9 | 2017-06-24 14:45:48 -0600 | [diff] [blame] | 364 | #if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI) |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 365 | printk(BIOS_DEBUG, |
| 366 | "VGA: vga_pri bus num = %d bus range [%d,%d]\n", |
| 367 | vga_pri->bus->secondary, link->secondary, |
| 368 | link->subordinate); |
| 369 | /* We need to make sure the vga_pri is under the link */ |
| 370 | if ((vga_pri->bus->secondary >= link->secondary) && |
| 371 | (vga_pri->bus->secondary <= link->subordinate)) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 372 | #endif |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 373 | break; |
| 374 | } |
| 375 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 376 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 377 | /* no VGA card installed */ |
| 378 | if (link == NULL) |
| 379 | return; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 380 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 381 | printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", |
| 382 | dev_path(dev), nodeid, link->link_num); |
| 383 | set_vga_enable_reg(nodeid, link->link_num); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 384 | } |
| 385 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 386 | static void nb_set_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 387 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 388 | unsigned nodeid; |
| 389 | struct bus *bus; |
| 390 | struct resource *res; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 391 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 392 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 393 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 394 | /* Find the nodeid */ |
| 395 | nodeid = amdfam14_nodeid(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 396 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 397 | create_vga_resource(dev, nodeid); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 398 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 399 | /* Set each resource we have found */ |
| 400 | for (res = dev->resource_list; res; res = res->next) { |
| 401 | set_resource(dev, res, nodeid); |
| 402 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 403 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 404 | for (bus = dev->link_list; bus; bus = bus->next) { |
| 405 | if (bus->children) { |
| 406 | assign_resources(bus); |
| 407 | } |
| 408 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 409 | } |
| 410 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 411 | /* Domain/Root Complex related code */ |
| 412 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 413 | static void domain_read_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 414 | { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 415 | unsigned reg; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 416 | |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 417 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 418 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 419 | /* Find the already assigned resource pairs */ |
| 420 | get_fx_devs(); |
| 421 | for (reg = 0x80; reg <= 0xc0; reg += 0x08) { |
| 422 | u32 base, limit; |
| 423 | base = f1_read_config32(reg); |
| 424 | limit = f1_read_config32(reg + 0x04); |
| 425 | /* Is this register allocated? */ |
| 426 | if ((base & 3) != 0) { |
| 427 | unsigned nodeid, reg_link; |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 428 | struct device *reg_dev; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 429 | if (reg < 0xc0) { // mmio |
| 430 | nodeid = (limit & 0xf) + (base & 0x30); |
| 431 | } else { // io |
| 432 | nodeid = (limit & 0xf) + ((base >> 4) & 0x30); |
| 433 | } |
| 434 | reg_link = (limit >> 4) & 7; |
| 435 | reg_dev = __f0_dev[nodeid]; |
| 436 | if (reg_dev) { |
| 437 | /* Reserve the resource */ |
| 438 | struct resource *res; |
| 439 | res = |
| 440 | new_resource(reg_dev, |
| 441 | IOINDEX(0x1000 + reg, |
| 442 | reg_link)); |
| 443 | if (res) { |
| 444 | res->flags = 1; |
| 445 | } |
| 446 | } |
| 447 | } |
| 448 | } |
| 449 | /* FIXME: do we need to check extend conf space? |
| 450 | I don't believe that much preset value */ |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 451 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 452 | pci_domain_read_resources(dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 453 | } |
| 454 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 455 | static void domain_set_resources(struct device *dev) |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 456 | { |
Mike Loptien | 58089e8 | 2013-01-29 15:45:09 -0700 | [diff] [blame] | 457 | printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__); |
Stefan Reinauer | 29e6548 | 2015-06-18 01:18:09 -0700 | [diff] [blame] | 458 | printk(BIOS_DEBUG, " amsr - incoming dev = %p\n", dev); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 459 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 460 | unsigned long mmio_basek; |
| 461 | u32 pci_tolm; |
| 462 | int idx; |
| 463 | struct bus *link; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 464 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 465 | struct hw_mem_hole_info mem_hole; |
| 466 | u32 reset_memhole = 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 467 | #endif |
| 468 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 469 | pci_tolm = 0xffffffffUL; |
| 470 | for (link = dev->link_list; link; link = link->next) { |
| 471 | pci_tolm = my_find_pci_tolm(link, pci_tolm); |
| 472 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 473 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 474 | // FIXME handle interleaved nodes. If you fix this here, please fix |
| 475 | // amdk8, too. |
| 476 | mmio_basek = pci_tolm >> 10; |
| 477 | /* Round mmio_basek to something the processor can support */ |
| 478 | mmio_basek &= ~((1 << 6) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 479 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 480 | // FIXME improve mtrr.c so we don't use up all of the mtrrs with a 64M |
| 481 | // MMIO hole. If you fix this here, please fix amdk8, too. |
| 482 | /* Round the mmio hole to 64M */ |
| 483 | mmio_basek &= ~((64 * 1024) - 1); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 484 | |
| 485 | #if CONFIG_HW_MEM_HOLE_SIZEK != 0 |
| 486 | /* if the hw mem hole is already set in raminit stage, here we will compare |
| 487 | * mmio_basek and hole_basek. if mmio_basek is bigger that hole_basek and will |
| 488 | * use hole_basek as mmio_basek and we don't need to reset hole. |
| 489 | * otherwise We reset the hole to the mmio_basek |
| 490 | */ |
| 491 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 492 | mem_hole = get_hw_mem_hole_info(); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 493 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 494 | // Use hole_basek as mmio_basek, and we don't need to reset hole anymore |
| 495 | if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { |
| 496 | mmio_basek = mem_hole.hole_startk; |
| 497 | reset_memhole = 0; |
| 498 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 499 | #endif |
| 500 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 501 | idx = 0x10; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 502 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 503 | struct dram_base_mask_t d; |
| 504 | resource_t basek, limitk, sizek; // 4 1T |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 505 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 506 | d = get_dram_base_mask(0); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 507 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 508 | if (d.mask & 1) { |
| 509 | basek = ((resource_t) ((u64) d.base)) << 8; |
| 510 | limitk = (resource_t) (((u64) d.mask << 8) | 0xFFFFFF); |
| 511 | printk(BIOS_DEBUG, |
| 512 | "adsr: (before) basek = %llx, limitk = %llx.\n", basek, |
| 513 | limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 514 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 515 | /* Convert these values to multiples of 1K for ease of math. */ |
| 516 | basek >>= 10; |
| 517 | limitk >>= 10; |
| 518 | sizek = limitk - basek + 1; |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 519 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 520 | printk(BIOS_DEBUG, |
| 521 | "adsr: (after) basek = %llx, limitk = %llx, sizek = %llx.\n", |
| 522 | basek, limitk, sizek); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 523 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 524 | /* see if we need a hole from 0xa0000 to 0xbffff */ |
| 525 | if ((basek < 640) && (sizek > 768)) { |
| 526 | printk(BIOS_DEBUG,"adsr - 0xa0000 to 0xbffff resource.\n"); |
| 527 | ram_resource(dev, (idx | 0), basek, 640 - basek); |
| 528 | idx += 0x10; |
| 529 | basek = 768; |
| 530 | sizek = limitk - 768; |
| 531 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 532 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 533 | printk(BIOS_DEBUG, |
| 534 | "adsr: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", |
| 535 | mmio_basek, basek, limitk); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 536 | |
Kyösti Mälkki | 26c6543 | 2014-06-26 05:30:54 +0300 | [diff] [blame] | 537 | /* split the region to accommodate pci memory space */ |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 538 | if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) { |
| 539 | if (basek <= mmio_basek) { |
| 540 | unsigned pre_sizek; |
| 541 | pre_sizek = mmio_basek - basek; |
| 542 | if (pre_sizek > 0) { |
| 543 | ram_resource(dev, idx, basek, |
| 544 | pre_sizek); |
| 545 | idx += 0x10; |
| 546 | sizek -= pre_sizek; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 547 | } |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 548 | basek = mmio_basek; |
| 549 | } |
| 550 | if ((basek + sizek) <= 4 * 1024 * 1024) { |
| 551 | sizek = 0; |
| 552 | } else { |
| 553 | basek = 4 * 1024 * 1024; |
| 554 | sizek -= (4 * 1024 * 1024 - mmio_basek); |
| 555 | } |
| 556 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 557 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 558 | ram_resource(dev, (idx | 0), basek, sizek); |
| 559 | idx += 0x10; |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 560 | printk(BIOS_DEBUG, |
| 561 | "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0, |
| 562 | mmio_basek, basek, limitk); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 563 | } |
| 564 | printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 565 | |
Kyösti Mälkki | 61be360 | 2017-04-15 20:07:53 +0300 | [diff] [blame] | 566 | add_uma_resource_below_tolm(dev, 7); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 567 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 568 | for (link = dev->link_list; link; link = link->next) { |
| 569 | if (link->children) { |
| 570 | assign_resources(link); |
| 571 | } |
| 572 | } |
| 573 | printk(BIOS_DEBUG, " adsr - leaving this lovely routine.\n"); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 574 | } |
| 575 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 576 | static const char *domain_acpi_name(const struct device *dev) |
Tobias Diedrich | d8a2c1f | 2017-02-20 02:46:19 +0100 | [diff] [blame] | 577 | { |
| 578 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 579 | return "PCI0"; |
| 580 | |
| 581 | return NULL; |
| 582 | } |
| 583 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 584 | /* Bus related code */ |
| 585 | |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 586 | static void cpu_bus_scan(struct device *dev) |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 587 | { |
Kyösti Mälkki | c33f1e9 | 2012-08-07 17:12:11 +0300 | [diff] [blame] | 588 | struct bus *cpu_bus = dev->link_list; |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 589 | struct device *cpu; |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 590 | int apic_id, cores_found; |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 591 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 592 | /* There is only one node for fam14, but there may be multiple cores. */ |
| 593 | cpu = dev_find_slot(0, PCI_DEVFN(0x18, 0)); |
| 594 | if (!cpu) |
| 595 | printk(BIOS_ERR, "ERROR: %02x:%02x.0 not found", 0, 0x18); |
Scott Duplichan | 9ab3c6c | 2011-05-15 21:45:46 +0000 | [diff] [blame] | 596 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 597 | cores_found = (pci_read_config32(dev_find_slot(0,PCI_DEVFN(0x18,0x3)), 0xe8) >> 12) & 3; |
| 598 | printk(BIOS_DEBUG, " AP siblings=%d\n", cores_found); |
| 599 | |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 600 | for (apic_id = 0; apic_id <= cores_found; apic_id++) { |
Kyösti Mälkki | c33f1e9 | 2012-08-07 17:12:11 +0300 | [diff] [blame] | 601 | cpu = add_cpu_device(cpu_bus, apic_id, 1); |
| 602 | if (cpu) |
| 603 | amd_cpu_topology(cpu, 0, apic_id); |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 604 | } |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 605 | } |
| 606 | |
Elyes HAOUAS | 0d7c7a8 | 2018-05-09 17:58:33 +0200 | [diff] [blame] | 607 | static void cpu_bus_init(struct device *dev) |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 608 | { |
| 609 | initialize_cpus(dev->link_list); |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 610 | } |
| 611 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 612 | /* North Bridge Structures */ |
| 613 | |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 614 | static void northbridge_fill_ssdt_generator(struct device *device) |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 615 | { |
| 616 | msr_t msr; |
| 617 | char pscope[] = "\\_SB.PCI0"; |
| 618 | |
| 619 | acpigen_write_scope(pscope); |
| 620 | msr = rdmsr(TOP_MEM); |
| 621 | acpigen_write_name_dword("TOM1", msr.lo); |
| 622 | msr = rdmsr(TOP_MEM2); |
| 623 | /* |
| 624 | * Since XP only implements parts of ACPI 2.0, we can't use a qword |
| 625 | * here. |
| 626 | * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt |
| 627 | * slide 22ff. |
| 628 | * Shift value right by 20 bit to make it fit into 32bit, |
| 629 | * giving us 1MB granularity and a limit of almost 4Exabyte of memory. |
| 630 | */ |
| 631 | acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); |
| 632 | acpigen_pop_len(); |
| 633 | } |
| 634 | |
Vladimir Serbinenko | 807127f | 2014-11-09 13:36:18 +0100 | [diff] [blame] | 635 | static unsigned long acpi_fill_hest(acpi_hest_t *hest) |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 636 | { |
| 637 | void *addr, *current; |
| 638 | |
| 639 | /* Skip the HEST header. */ |
| 640 | current = (void *)(hest + 1); |
| 641 | |
| 642 | addr = agesawrapper_getlateinitptr(PICK_WHEA_MCE); |
| 643 | if (addr != NULL) |
Stefan Reinauer | 29e6548 | 2015-06-18 01:18:09 -0700 | [diff] [blame] | 644 | current += acpi_create_hest_error_source(hest, current, 0, |
| 645 | addr + 2, *(UINT16 *)addr - 2); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 646 | |
| 647 | addr = agesawrapper_getlateinitptr(PICK_WHEA_CMC); |
| 648 | if (addr != NULL) |
Stefan Reinauer | 29e6548 | 2015-06-18 01:18:09 -0700 | [diff] [blame] | 649 | current += acpi_create_hest_error_source(hest, current, 1, |
| 650 | addr + 2, *(UINT16 *)addr - 2); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 651 | |
| 652 | return (unsigned long)current; |
| 653 | } |
| 654 | |
Kyösti Mälkki | e2c2a4c | 2018-05-20 20:59:52 +0300 | [diff] [blame] | 655 | static unsigned long agesa_write_acpi_tables(struct device *device, |
Alexander Couzens | 83fc32f | 2015-04-12 22:28:37 +0200 | [diff] [blame] | 656 | unsigned long current, |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 657 | acpi_rsdp_t *rsdp) |
| 658 | { |
| 659 | acpi_srat_t *srat; |
| 660 | acpi_slit_t *slit; |
| 661 | acpi_header_t *ssdt; |
| 662 | acpi_header_t *alib; |
| 663 | acpi_hest_t *hest; |
| 664 | |
| 665 | /* HEST */ |
| 666 | current = ALIGN(current, 8); |
| 667 | hest = (acpi_hest_t *)current; |
Vladimir Serbinenko | 807127f | 2014-11-09 13:36:18 +0100 | [diff] [blame] | 668 | acpi_write_hest((void *)current, acpi_fill_hest); |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 669 | acpi_add_table(rsdp, (void *)current); |
| 670 | current += ((acpi_header_t *)current)->length; |
| 671 | |
| 672 | /* SRAT */ |
| 673 | current = ALIGN(current, 8); |
| 674 | printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); |
| 675 | srat = (acpi_srat_t *) agesawrapper_getlateinitptr (PICK_SRAT); |
| 676 | if (srat != NULL) { |
| 677 | memcpy((void *)current, srat, srat->header.length); |
| 678 | srat = (acpi_srat_t *) current; |
| 679 | current += srat->header.length; |
| 680 | acpi_add_table(rsdp, srat); |
| 681 | } |
| 682 | else { |
| 683 | printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); |
| 684 | } |
| 685 | |
| 686 | /* SLIT */ |
| 687 | current = ALIGN(current, 8); |
| 688 | printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); |
| 689 | slit = (acpi_slit_t *) agesawrapper_getlateinitptr (PICK_SLIT); |
| 690 | if (slit != NULL) { |
| 691 | memcpy((void *)current, slit, slit->header.length); |
| 692 | slit = (acpi_slit_t *) current; |
| 693 | current += slit->header.length; |
| 694 | acpi_add_table(rsdp, slit); |
| 695 | } |
| 696 | else { |
| 697 | printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); |
| 698 | } |
| 699 | |
| 700 | /* SSDT */ |
| 701 | current = ALIGN(current, 16); |
| 702 | printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); |
| 703 | alib = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_ALIB); |
| 704 | if (alib != NULL) { |
| 705 | memcpy((void *)current, alib, alib->length); |
| 706 | alib = (acpi_header_t *) current; |
| 707 | current += alib->length; |
| 708 | acpi_add_table(rsdp, (void *)alib); |
| 709 | } else { |
| 710 | printk(BIOS_DEBUG, " AGESA ALIB SSDT table NULL. Skipping.\n"); |
| 711 | } |
| 712 | |
| 713 | /* The DSDT needs additional work for the AGESA SSDT Pstate table */ |
| 714 | /* Keep the comment for a while. */ |
| 715 | current = ALIGN(current, 16); |
| 716 | printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); |
| 717 | ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); |
| 718 | if (ssdt != NULL) { |
| 719 | memcpy((void *)current, ssdt, ssdt->length); |
| 720 | ssdt = (acpi_header_t *) current; |
| 721 | current += ssdt->length; |
| 722 | acpi_add_table(rsdp,ssdt); |
| 723 | } else { |
| 724 | printk(BIOS_DEBUG, " AGESA SSDT Pstate table NULL. Skipping.\n"); |
| 725 | } |
| 726 | |
| 727 | return current; |
| 728 | } |
| 729 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 730 | static struct device_operations northbridge_operations = { |
Marc Jones | 8a49ac7 | 2013-01-16 17:02:20 -0700 | [diff] [blame] | 731 | .read_resources = nb_read_resources, |
| 732 | .set_resources = nb_set_resources, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 733 | .enable_resources = pci_dev_enable_resources, |
Vladimir Serbinenko | 4ab588b | 2014-10-08 21:18:31 +0200 | [diff] [blame] | 734 | .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, |
| 735 | .write_acpi_tables = agesa_write_acpi_tables, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 736 | .init = northbridge_init, |
| 737 | .enable = 0,.ops_pci = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 738 | }; |
| 739 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 740 | static const struct pci_driver northbridge_driver __pci_driver = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 741 | .ops = &northbridge_operations, |
| 742 | .vendor = PCI_VENDOR_ID_AMD, |
| 743 | .device = 0x1510, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 744 | }; |
| 745 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 746 | struct chip_operations northbridge_amd_agesa_family14_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 747 | CHIP_NAME("AMD Family 14h Northbridge") |
| 748 | .enable_dev = 0, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 749 | }; |
| 750 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 751 | /* Root Complex Structures */ |
| 752 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 753 | static struct device_operations pci_domain_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 754 | .read_resources = domain_read_resources, |
| 755 | .set_resources = domain_set_resources, |
Edward O'Callaghan | e9e1d7a | 2015-01-02 15:11:49 +1100 | [diff] [blame] | 756 | .init = DEVICE_NOOP, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 757 | .scan_bus = pci_domain_scan_bus, |
Tobias Diedrich | d8a2c1f | 2017-02-20 02:46:19 +0100 | [diff] [blame] | 758 | .acpi_name = domain_acpi_name, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 759 | }; |
| 760 | |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 761 | static struct device_operations cpu_bus_ops = { |
Edward O'Callaghan | 2837ab2 | 2014-11-06 08:57:40 +1100 | [diff] [blame] | 762 | .read_resources = DEVICE_NOOP, |
| 763 | .set_resources = DEVICE_NOOP, |
Edward O'Callaghan | e9e1d7a | 2015-01-02 15:11:49 +1100 | [diff] [blame] | 764 | .enable_resources = DEVICE_NOOP, |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 765 | .init = cpu_bus_init, |
zbao | f722373 | 2012-04-13 13:42:15 +0800 | [diff] [blame] | 766 | .scan_bus = cpu_bus_scan, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 767 | }; |
| 768 | |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 769 | static void root_complex_enable_dev(struct device *dev) |
| 770 | { |
| 771 | static int done = 0; |
| 772 | |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 773 | if (!done) { |
| 774 | setup_bsp_ramtop(); |
Kyösti Mälkki | 87213b6 | 2012-08-27 20:00:33 +0300 | [diff] [blame] | 775 | done = 1; |
| 776 | } |
| 777 | |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 778 | /* Set the operations if it is a special bus type */ |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 779 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 780 | dev->ops = &pci_domain_ops; |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 781 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 782 | dev->ops = &cpu_bus_ops; |
| 783 | } |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 784 | } |
| 785 | |
efdesign98 | 05a89ab | 2011-06-20 17:38:49 -0700 | [diff] [blame] | 786 | struct chip_operations northbridge_amd_agesa_family14_root_complex_ops = { |
Marc Jones | 8d59569 | 2012-03-15 12:55:26 -0600 | [diff] [blame] | 787 | CHIP_NAME("AMD Family 14h Root Complex") |
| 788 | .enable_dev = root_complex_enable_dev, |
Frank Vibrans | 39fca80 | 2011-02-14 18:35:15 +0000 | [diff] [blame] | 789 | }; |