blob: deb11299e9b4775202e308ed5b4e9ce4d6c8537a [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +00001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2008-2009 coresystems GmbH
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
Patrick Georgi0588d192009-08-12 15:00:51 +000015
16config SOUTHBRIDGE_INTEL_I82801GX
17 bool
Aaron Durbine9919452016-07-13 23:24:55 -050018 select ACPI_INTEL_HARDWARE_SLEEP_VALUES
Patrick Georgid5663ba2010-01-18 17:30:36 +000019 select IOAPIC
Stefan Reinauerde3206a2010-02-22 06:09:43 +000020 select USE_WATCHDOG_ON_BOOT
Stefan Reinauer431a8162012-11-13 13:01:31 -080021 select HAVE_SMI_HANDLER
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +020022 select COMMON_FADT
Arthur Heymans62902ca2016-11-29 14:13:43 +010023 select SOUTHBRIDGE_INTEL_COMMON_GPIO
Arthur Heymans16fe7902017-04-12 17:01:31 +020024 select SOUTHBRIDGE_INTEL_COMMON_SMBUS
Arthur Heymans47a66032019-10-25 23:43:14 +020025 select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 if BOOT_DEVICE_SPI_FLASH
Patrick Rudolph425e75a2019-03-24 15:06:17 +010026 select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Arthur Heymansb8bda112019-06-04 13:57:47 +020027 select SOUTHBRIDGE_INTEL_COMMON_PMBASE
Arthur Heymans36646472018-01-22 14:42:18 +010028 select HAVE_INTEL_CHIPSET_LOCKDOWN
Arthur Heymansa8a9f342017-12-24 08:11:13 +010029 select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
Arthur Heymansb9c049a2018-07-27 15:29:21 +020030 select INTEL_HAS_TOP_SWAP
Arthur Heymans31312b22018-04-10 12:56:19 +020031 select SOUTHBRIDGE_INTEL_COMMON_SMM
Elyes HAOUAS551a7592019-05-01 16:56:36 +020032 select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
Arthur Heymans074730c2019-06-04 14:05:53 +020033 select SOUTHBRIDGE_INTEL_COMMON_RTC
Arthur Heymans23a6c792019-10-13 22:36:04 +020034 select SOUTHBRIDGE_INTEL_COMMON_RESET
Arthur Heymans3457df12019-11-16 10:04:41 +010035 select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
Patrick Georgi0588d192009-08-12 15:00:51 +000036
Stefan Reinauerb3ae1862011-04-18 23:51:12 +000037if SOUTHBRIDGE_INTEL_I82801GX
38
Patrick Georgi5692c572010-10-05 13:40:31 +000039config EHCI_BAR
40 hex
Stefan Reinauerb3ae1862011-04-18 23:51:12 +000041 default 0xfef00000
Patrick Georgi5692c572010-10-05 13:40:31 +000042
Patrick Georgi9aeb6942012-10-05 21:54:38 +020043config HPET_MIN_TICKS
44 hex
45 default 0x80
Sven Schnelle49ae9712011-05-03 07:55:30 +000046
Arthur Heymansb9c049a2018-07-27 15:29:21 +020047config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
48 hex
49 # Always 64K, all other options are invalid
50 default 0x10000
51
Stefan Reinauerb3ae1862011-04-18 23:51:12 +000052endif