| commit | b8bda114874c8a1122460bbe5b50f3aa757c5a76 | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Tue Jun 04 13:57:47 2019 +0200 |
| committer | Nico Huber <nico.h@gmx.de> | Wed Oct 30 21:39:12 2019 +0000 |
| tree | 3bea096a9149282249d86045a84b6b604eede802 | |
| parent | 63998adf4acb92e9a43533f9f82cafb28f295ac4 [diff] [blame] |
sb/intel/common: Make linking pmbase.c conditional Change-Id: I6a7cd96699dbeb42a53bf1d25db1bcf93e416e0f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33200 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 2d6e938..5053a1f 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -26,6 +26,7 @@ select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_PMCLIB + select SOUTHBRIDGE_INTEL_COMMON_PMBASE select HAVE_INTEL_CHIPSET_LOCKDOWN select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select INTEL_HAS_TOP_SWAP