Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2008-2009 coresystems GmbH |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 15 | |
| 16 | config SOUTHBRIDGE_INTEL_I82801GX |
| 17 | bool |
Aaron Durbin | e991945 | 2016-07-13 23:24:55 -0500 | [diff] [blame] | 18 | select ACPI_INTEL_HARDWARE_SLEEP_VALUES |
Kyösti Mälkki | 71216c9 | 2013-07-28 23:39:37 +0300 | [diff] [blame] | 19 | select SOUTHBRIDGE_INTEL_COMMON |
Patrick Georgi | d5663ba | 2010-01-18 17:30:36 +0000 | [diff] [blame] | 20 | select IOAPIC |
Stefan Reinauer | 8a7d34b | 2010-02-22 09:15:13 +0000 | [diff] [blame] | 21 | select HAVE_HARD_RESET |
Uwe Hermann | 65e6034 | 2010-09-26 07:35:55 +0000 | [diff] [blame] | 22 | select HAVE_USBDEBUG |
Stefan Reinauer | de3206a | 2010-02-22 06:09:43 +0000 | [diff] [blame] | 23 | select USE_WATCHDOG_ON_BOOT |
Stefan Reinauer | 431a816 | 2012-11-13 13:01:31 -0800 | [diff] [blame] | 24 | select HAVE_SMI_HANDLER |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 25 | select COMMON_FADT |
Arthur Heymans | 62902ca | 2016-11-29 14:13:43 +0100 | [diff] [blame] | 26 | select SOUTHBRIDGE_INTEL_COMMON_GPIO |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 27 | select SOUTHBRIDGE_INTEL_COMMON_SMBUS |
Arthur Heymans | bddef0d | 2017-09-25 12:21:07 +0200 | [diff] [blame] | 28 | select SOUTHBRIDGE_INTEL_COMMON_SPI |
Arthur Heymans | 3664647 | 2018-01-22 14:42:18 +0100 | [diff] [blame] | 29 | select HAVE_INTEL_CHIPSET_LOCKDOWN |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 30 | select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ |
Arthur Heymans | b9c049a | 2018-07-27 15:29:21 +0200 | [diff] [blame^] | 31 | select INTEL_HAS_TOP_SWAP |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 32 | |
Stefan Reinauer | b3ae186 | 2011-04-18 23:51:12 +0000 | [diff] [blame] | 33 | if SOUTHBRIDGE_INTEL_I82801GX |
| 34 | |
Patrick Georgi | 5692c57 | 2010-10-05 13:40:31 +0000 | [diff] [blame] | 35 | config EHCI_BAR |
| 36 | hex |
Stefan Reinauer | b3ae186 | 2011-04-18 23:51:12 +0000 | [diff] [blame] | 37 | default 0xfef00000 |
Patrick Georgi | 5692c57 | 2010-10-05 13:40:31 +0000 | [diff] [blame] | 38 | |
Sven Schnelle | 49ae971 | 2011-05-03 07:55:30 +0000 | [diff] [blame] | 39 | config BOOTBLOCK_SOUTHBRIDGE_INIT |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 40 | string |
Sven Schnelle | 49ae971 | 2011-05-03 07:55:30 +0000 | [diff] [blame] | 41 | default "southbridge/intel/i82801gx/bootblock.c" |
Patrick Georgi | 9aeb694 | 2012-10-05 21:54:38 +0200 | [diff] [blame] | 42 | |
| 43 | config HPET_MIN_TICKS |
| 44 | hex |
| 45 | default 0x80 |
Sven Schnelle | 49ae971 | 2011-05-03 07:55:30 +0000 | [diff] [blame] | 46 | |
Arthur Heymans | b9c049a | 2018-07-27 15:29:21 +0200 | [diff] [blame^] | 47 | config INTEL_TOP_SWAP_BOOTBLOCK_SIZE |
| 48 | hex |
| 49 | # Always 64K, all other options are invalid |
| 50 | default 0x10000 |
| 51 | |
Stefan Reinauer | b3ae186 | 2011-04-18 23:51:12 +0000 | [diff] [blame] | 52 | endif |