blob: 649254290619598cd402d9d1f5d2fef392c50ad1 [file] [log] [blame]
Philipp Deppenwiese714baa12017-01-02 17:58:09 +01001chip northbridge/intel/sandybridge
Nico Huberb0b25c82020-03-21 20:35:12 +01002 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +01003
4 # Enable DisplayPort Hotplug with 6ms pulse
5 register "gpu_dp_d_hotplug" = "0x06"
6
7 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02008 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +01009 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
10 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
11 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
12 register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
13 register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010014 register "gpu_cpu_backlight" = "0x1155"
15 register "gpu_pch_backlight" = "0x11551155"
16
Keith Hui45e4ab42023-07-22 12:49:05 -040017 register "spd_addresses" = "{0x50, 0, 0x51, 0}"
18
Angel Ponsbceea672021-05-17 10:58:36 +020019 device domain 0 on
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010020 subsystemid 0x17aa 0x21f3 inherit
21
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010022 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010023 register "docking_supported" = "1"
24 register "gen1_dec" = "0x000c15e1"
25 register "gen2_dec" = "0x007c1601"
26 register "gen3_dec" = "0x000c06a1"
27 register "gpi13_routing" = "2"
28 register "gpi1_routing" = "2"
Patrick Rudolpha7033932017-05-26 15:26:10 +020029 register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
Angel Ponsaf4bd562021-12-28 13:05:56 +010030 register "pcie_port_coalesce" = "true"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010031 register "sata_interface_speed_support" = "0x3"
32 register "sata_port_map" = "0x17"
Bill XIEc5578472023-10-27 18:58:15 +080033
34 # Do not enable xHCI Port 4 since WWAN USB is EHCI-only
35 register "superspeed_capable_ports" = "0x7"
36 register "xhci_switchable_ports" = "0x7"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010037 register "xhci_overcurrent_mapping" = "0x04000201"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010038
39 # device specific SPI configuration
40 register "spi_uvscc" = "0x2005"
41 register "spi_lvscc" = "0x2005"
42
Arthur Heymansb5df65a2022-11-12 14:51:49 +010043 device ref xhci on end # USB 3.0 Controller
44 device ref mei1 on end # Management Engine Interface 1
45 device ref mei2 off end # Management Engine Interface 2
46 device ref me_ide_r off end # Management Engine IDE-R
47 device ref me_kt off end # Management Engine KT
48 device ref gbe on end # Intel Gigabit Ethernet
49 device ref ehci2 on end # USB2 EHCI #2
Alexander Goncharov893c3ae82023-02-04 15:20:37 +040050 device ref hda on end # High Definition Audio controller
Arthur Heymansb5df65a2022-11-12 14:51:49 +010051 device ref pcie_rp1 on # PCIe Port #1
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010052 chip drivers/ricoh/rce822 # Ricoh cardreader
53 register "disable_mask" = "0x87"
54 register "sdwppol" = "1"
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010055 device pci 00.0 on end # Ricoh SD card reader
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010056 end
57 end
Arthur Heymansb5df65a2022-11-12 14:51:49 +010058 device ref pcie_rp2 on end # PCIe Port #2
59 device ref pcie_rp3 on # PCIe Port #3
Patrick Rudolph05216322019-04-12 16:14:27 +020060 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010061 end
Arthur Heymansb5df65a2022-11-12 14:51:49 +010062 device ref pcie_rp4 off end # PCIe Port #4
63 device ref pcie_rp5 off end # PCIe Port #5
64 device ref pcie_rp6 off end # PCIe Port #6
65 device ref pcie_rp7 off end # PCIe Port #7
66 device ref pcie_rp8 off end # PCIe Port #8
67 device ref ehci1 on end # USB2 EHCI #1
68 device ref pci_bridge off end # PCI bridge
69 device ref lpc on # LPC bridge PCI-LPC bridge
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010070 chip ec/lenovo/pmh7
Elyes Haouasaf933362023-03-19 08:01:53 +010071 register "backlight_enable" = "true"
72 register "dock_event_enable" = "true"
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010073 device pnp ff.1 on end # dummy
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010074 end
75 chip ec/lenovo/h8
76 device pnp ff.2 on # dummy
77 io 0x60 = 0x62
78 io 0x62 = 0x66
79 io 0x64 = 0x1600
80 io 0x66 = 0x1604
81 end
82 register "config0" = "0xa7"
83 register "config1" = "0x01"
84 register "config2" = "0xa0"
85 register "config3" = "0xe2"
86
87 register "has_keyboard_backlight" = "0"
88
89 register "beepmask0" = "0x02"
90 register "beepmask1" = "0x86"
91 register "has_power_management_beeps" = "1"
92 register "event2_enable" = "0xff"
93 register "event3_enable" = "0xff"
94 register "event4_enable" = "0xf0"
95 register "event5_enable" = "0x3c"
96 register "event6_enable" = "0x00"
97 register "event7_enable" = "0xa1"
98 register "event8_enable" = "0x7b"
99 register "event9_enable" = "0xff"
100 register "eventa_enable" = "0x00"
101 register "eventb_enable" = "0x00"
102 register "eventc_enable" = "0xff"
103 register "eventd_enable" = "0xff"
104 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200105
106 register "has_bdc_detection" = "1"
107 register "bdc_gpio_num" = "54"
108 register "bdc_gpio_lvl" = "0"
Patrick Rudolph7d7c6312017-08-13 12:51:27 +0200109
110 register "has_wwan_detection" = "1"
111 register "wwan_gpio_num" = "70"
112 register "wwan_gpio_lvl" = "0"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100113 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200114 chip drivers/lenovo/hybrid_graphics
115 device pnp ff.f on end # dummy
116
117 register "detect_gpio" = "21"
118
119 register "has_panel_hybrid_gpio" = "1"
120 register "panel_hybrid_gpio" = "52"
121 register "panel_integrated_lvl" = "1"
122
123 register "has_backlight_gpio" = "0"
124 register "has_dgpu_power_gpio" = "0"
125
Evgeny Zinoviev01869122018-08-30 00:23:39 +0300126 register "has_thinker1" = "1"
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200127 end
Patrick Rudolph1e96ea12018-06-03 10:15:33 +0200128 chip drivers/pc80/tpm
129 device pnp 0c31.0 on end
130 end
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100131 end
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100132 device ref sata1 on end # SATA Controller 1
133 device ref smbus on # SMBus
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100134 chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +0100135 device i2c 54 on end
136 device i2c 55 on end
137 device i2c 56 on end
138 device i2c 57 on end
139 device i2c 5c on end
140 device i2c 5d on end
141 device i2c 5e on end
142 device i2c 5f on end
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100143 end
144 end
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100145 device ref sata2 off end # SATA Controller 2
146 device ref thermal off end # Thermal
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100147 end
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100148 device ref host_bridge on end # Host bridge Host bridge
149 device ref peg10 on end # PCIe Bridge for discrete graphics
150 device ref igd on end # Internal graphics VGA controller
151 device ref dev4 off end # Signal processing controller
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100152 end
153end