blob: f3524cd99958821b9acd27ef5823794239fe59ff [file] [log] [blame]
Philipp Deppenwiese714baa12017-01-02 17:58:09 +01001chip northbridge/intel/sandybridge
Nico Huberb0b25c82020-03-21 20:35:12 +01002 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +01003
4 # Enable DisplayPort Hotplug with 6ms pulse
5 register "gpu_dp_d_hotplug" = "0x06"
6
7 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02008 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +01009 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
10 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
11 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
12 register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
13 register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010014 register "gpu_cpu_backlight" = "0x1155"
15 register "gpu_pch_backlight" = "0x11551155"
16
17 device cpu_cluster 0x0 on
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010018 chip cpu/intel/model_206ax # FIXME: check all registers
19 register "c1_acpower" = "1"
20 register "c1_battery" = "1"
21 register "c2_acpower" = "3"
22 register "c2_battery" = "3"
23 register "c3_acpower" = "5"
24 register "c3_battery" = "5"
Arthur Heymans7e6946a2019-01-21 17:55:02 +010025 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010026 device lapic 0xacac off end
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010027 end
28 end
29
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010030 device domain 0x0 on
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010031 subsystemid 0x17aa 0x21f3 inherit
32
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010033 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
34 register "c2_latency" = "0x0065"
35 register "docking_supported" = "1"
36 register "gen1_dec" = "0x000c15e1"
37 register "gen2_dec" = "0x007c1601"
38 register "gen3_dec" = "0x000c06a1"
39 register "gpi13_routing" = "2"
40 register "gpi1_routing" = "2"
Patrick Rudolpha7033932017-05-26 15:26:10 +020041 register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010042 register "pcie_port_coalesce" = "1"
43 register "sata_interface_speed_support" = "0x3"
44 register "sata_port_map" = "0x17"
45 register "superspeed_capable_ports" = "0x0000000f"
46 register "xhci_overcurrent_mapping" = "0x04000201"
47 register "xhci_switchable_ports" = "0x0000000f"
48
49 # device specific SPI configuration
50 register "spi_uvscc" = "0x2005"
51 register "spi_lvscc" = "0x2005"
52
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010053 device pci 14.0 on end # USB 3.0 Controller
54 device pci 16.0 on end # Management Engine Interface 1
55 device pci 16.1 off end # Management Engine Interface 2
56 device pci 16.2 off end # Management Engine IDE-R
57 device pci 16.3 off end # Management Engine KT
58 device pci 19.0 on end # Intel Gigabit Ethernet
59 device pci 1a.0 on end # USB2 EHCI #2
60 device pci 1b.0 on end # High Definition Audio Audio controller
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010061 device pci 1c.0 on # PCIe Port #1
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010062 chip drivers/ricoh/rce822 # Ricoh cardreader
63 register "disable_mask" = "0x87"
64 register "sdwppol" = "1"
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010065 device pci 00.0 on end # Ricoh SD card reader
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010066 end
67 end
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010068 device pci 1c.1 on end # PCIe Port #2
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010069 device pci 1c.2 on # PCIe Port #3
Patrick Rudolph05216322019-04-12 16:14:27 +020070 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010071 end
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010072 device pci 1c.3 off end # PCIe Port #4
73 device pci 1c.4 off end # PCIe Port #5
74 device pci 1c.5 off end # PCIe Port #6
75 device pci 1c.6 off end # PCIe Port #7
76 device pci 1c.7 off end # PCIe Port #8
77 device pci 1d.0 on end # USB2 EHCI #1
78 device pci 1e.0 off end # PCI bridge
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010079 device pci 1f.0 on # LPC bridge PCI-LPC bridge
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010080 chip ec/lenovo/pmh7
81 register "backlight_enable" = "0x01"
82 register "dock_event_enable" = "0x01"
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +010083 device pnp ff.1 on end # dummy
Philipp Deppenwiese714baa12017-01-02 17:58:09 +010084 end
85 chip ec/lenovo/h8
86 device pnp ff.2 on # dummy
87 io 0x60 = 0x62
88 io 0x62 = 0x66
89 io 0x64 = 0x1600
90 io 0x66 = 0x1604
91 end
92 register "config0" = "0xa7"
93 register "config1" = "0x01"
94 register "config2" = "0xa0"
95 register "config3" = "0xe2"
96
97 register "has_keyboard_backlight" = "0"
98
99 register "beepmask0" = "0x02"
100 register "beepmask1" = "0x86"
101 register "has_power_management_beeps" = "1"
102 register "event2_enable" = "0xff"
103 register "event3_enable" = "0xff"
104 register "event4_enable" = "0xf0"
105 register "event5_enable" = "0x3c"
106 register "event6_enable" = "0x00"
107 register "event7_enable" = "0xa1"
108 register "event8_enable" = "0x7b"
109 register "event9_enable" = "0xff"
110 register "eventa_enable" = "0x00"
111 register "eventb_enable" = "0x00"
112 register "eventc_enable" = "0xff"
113 register "eventd_enable" = "0xff"
114 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200115
116 register "has_bdc_detection" = "1"
117 register "bdc_gpio_num" = "54"
118 register "bdc_gpio_lvl" = "0"
Patrick Rudolph7d7c6312017-08-13 12:51:27 +0200119
120 register "has_wwan_detection" = "1"
121 register "wwan_gpio_num" = "70"
122 register "wwan_gpio_lvl" = "0"
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100123 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200124 chip drivers/lenovo/hybrid_graphics
125 device pnp ff.f on end # dummy
126
127 register "detect_gpio" = "21"
128
129 register "has_panel_hybrid_gpio" = "1"
130 register "panel_hybrid_gpio" = "52"
131 register "panel_integrated_lvl" = "1"
132
133 register "has_backlight_gpio" = "0"
134 register "has_dgpu_power_gpio" = "0"
135
Evgeny Zinoviev01869122018-08-30 00:23:39 +0300136 register "has_thinker1" = "1"
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200137 end
Patrick Rudolph1e96ea12018-06-03 10:15:33 +0200138 chip drivers/pc80/tpm
139 device pnp 0c31.0 on end
140 end
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100141 end
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +0100142 device pci 1f.2 on end # SATA Controller 1
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100143 device pci 1f.3 on # SMBus
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100144 chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +0100145 device i2c 54 on end
146 device i2c 55 on end
147 device i2c 56 on end
148 device i2c 57 on end
149 device i2c 5c on end
150 device i2c 5d on end
151 device i2c 5e on end
152 device i2c 5f on end
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100153 end
154 end
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +0100155 device pci 1f.5 off end # SATA Controller 2
156 device pci 1f.6 off end # Thermal
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100157 end
Peter Lemenkov07b2fdb2019-11-27 22:56:57 +0100158 device pci 00.0 on end # Host bridge Host bridge
159 device pci 01.0 on end # PCIe Bridge for discrete graphics
160 device pci 02.0 on end # Internal graphics VGA controller
161 device pci 04.0 off end # Signal processing controller
Philipp Deppenwiese714baa12017-01-02 17:58:09 +0100162 end
163end