blob: eff5cf5e17d4e3048eae024eec5e72a7d5952080 [file] [log] [blame]
Angel Pons27123982020-04-05 13:22:30 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -07002
3#include <baseboard/variants.h>
4#include <chip.h>
5#include <device/device.h>
6#include <device/pci_ids.h>
7#include <device/pci_ops.h>
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +05308#include <intelblocks/power_limit.h>
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -07009
10/* PL2 limit in watts for AML and KBL */
11#define PL2_AML 18
12#define PL2_KBL 15
13
14static uint32_t get_pl2(void)
15{
Kyösti Mälkki71756c212019-07-12 13:10:19 +030016 struct device *igd_dev = pcidev_path_on_root(SA_DEVFN_IGD);
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -070017 uint16_t id;
Kyösti Mälkki71756c212019-07-12 13:10:19 +030018
19 id = pci_read_config16(igd_dev, PCI_DEVICE_ID);
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -070020 /* Assume we only have KLB-Y and AML-Y SKUs */
Felix Singer43b7f412022-03-07 04:34:52 +010021 if (id == PCI_DID_INTEL_KBL_GT2_SULXM)
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -070022 return PL2_KBL;
23
24 return PL2_AML;
25}
26
27/* Override dev tree settings per board */
28void variant_devtree_update(void)
29{
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +053030 struct soc_power_limits_config *soc_conf;
Kyösti Mälkkid5f645c2019-09-28 00:20:27 +030031 config_t *cfg = config_of_soc();
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -070032
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +053033 soc_conf = &cfg->power_limits_config;
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -070034 /* Update PL2 based on CPU */
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +053035 soc_conf->tdp_pl2_override = get_pl2();
Nick Vaccaro2dd7b6b2018-08-09 16:18:02 -070036}