skylake: update processor power limits configuration
Update processor power limit configuration parameters based on
common code base support for Intel Skylake SoC based platforms.
BRANCH=None
BUG=None
TEST=Built and tested on nami system
Change-Id: Idc82f3d2f805b92fb3005d2f49098e55cb142e45
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/mainboard/google/poppy/variants/nocturne/mainboard.c b/src/mainboard/google/poppy/variants/nocturne/mainboard.c
index 8d72144..1482b34 100644
--- a/src/mainboard/google/poppy/variants/nocturne/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nocturne/mainboard.c
@@ -5,6 +5,7 @@
#include <device/device.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
+#include <intelblocks/power_limit.h>
/* PL2 limit in watts for AML and KBL */
#define PL2_AML 18
@@ -26,8 +27,10 @@
/* Override dev tree settings per board */
void variant_devtree_update(void)
{
+ struct soc_power_limits_config *soc_conf;
config_t *cfg = config_of_soc();
+ soc_conf = &cfg->power_limits_config;
/* Update PL2 based on CPU */
- cfg->tdp_pl2_override = get_pl2();
+ soc_conf->tdp_pl2_override = get_pl2();
}