blob: 372f51517b194cadc291e94b809941000622e5a8 [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Marshall Dawson9df969a2017-07-25 18:46:46 -06002
3/******************************************************************************
4 * $Workfile:: cache_as_ram.S
5 *
6 * Description: CAR setup called from bootblock_crt0.S.
7 *
8 ******************************************************************************
9 */
10
Martin Roth81804272022-11-20 20:30:18 -070011#include <amdblocks/post_codes.h>
Marshall Dawson9df969a2017-07-25 18:46:46 -060012#include <cpu/x86/post_code.h>
13
Kyösti Mälkki7522a8f2020-11-20 16:47:38 +020014.section .init
15
16.code32
17
18_cache_as_ram_setup:
19
20#include "gcccar.inc"
21
Marshall Dawson9df969a2017-07-25 18:46:46 -060022/*
23 * on entry:
24 * mm0: BIST (ignored)
Kyösti Mälkki6c7441f2020-12-05 08:39:57 +020025 * mm2_mm1: timestamp
Marshall Dawson9df969a2017-07-25 18:46:46 -060026 */
27
28.global bootblock_pre_c_entry
29bootblock_pre_c_entry:
30
Martin Roth81804272022-11-20 20:30:18 -070031 post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
Marshall Dawson9df969a2017-07-25 18:46:46 -060032
33 AMD_ENABLE_STACK
34
35 /* Align the stack and keep aligned for call to bootblock_c_entry() */
36 and $0xfffffff0, %esp
37 sub $8, %esp
38
39 movd %mm2, %eax
40 pushl %eax /* tsc[63:32] */
41 movd %mm1, %eax
42 pushl %eax /* tsc[31:0] */
43
44before_carstage:
Martin Roth81804272022-11-20 20:30:18 -070045 post_code(POST_BOOTBLOCK_PRE_C_DONE)
Marshall Dawson9df969a2017-07-25 18:46:46 -060046
47 call bootblock_c_entry
48 /* Never reached */
49
50.halt_forever:
lilacious40cb3fe2023-06-21 23:24:14 +020051 post_code(POSTCODE_DEAD_CODE)
Marshall Dawson9df969a2017-07-25 18:46:46 -060052 hlt
53 jmp .halt_forever
Kyösti Mälkki7522a8f2020-11-20 16:47:38 +020054
55_cache_as_ram_setup_end: