blob: 89d8df585b10d5f73ee8bd73b234619a169e737d [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Marshall Dawson9df969a2017-07-25 18:46:46 -06003
4/******************************************************************************
5 * $Workfile:: cache_as_ram.S
6 *
7 * Description: CAR setup called from bootblock_crt0.S.
8 *
9 ******************************************************************************
10 */
11
12#include "gcccar.inc"
Marshall Dawson9df969a2017-07-25 18:46:46 -060013#include <cpu/x86/post_code.h>
14
15/*
16 * on entry:
17 * mm0: BIST (ignored)
18 * mm2_mm1: timestamp at bootblock_protected_mode_entry
19 */
20
21.global bootblock_pre_c_entry
22bootblock_pre_c_entry:
23
24 post_code(0xa0)
25
26 AMD_ENABLE_STACK
27
28 /* Align the stack and keep aligned for call to bootblock_c_entry() */
29 and $0xfffffff0, %esp
30 sub $8, %esp
31
32 movd %mm2, %eax
33 pushl %eax /* tsc[63:32] */
34 movd %mm1, %eax
35 pushl %eax /* tsc[31:0] */
36
37before_carstage:
38 post_code(0xa2)
39
40 call bootblock_c_entry
41 /* Never reached */
42
43.halt_forever:
44 post_code(POST_DEAD_CODE)
45 hlt
46 jmp .halt_forever