| Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 1 | # This file is part of the coreboot project. |
| Elyes HAOUAS | 36787b0 | 2020-05-07 12:07:24 +0200 | [diff] [blame^] | 2 | # SPDX-License-Identifier: GPL-2.0-only |
| Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 3 | |
| Kyösti Mälkki | e4c17ce | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 4 | config NORTHBRIDGE_AMD_PI |
| Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 5 | bool |
| Marc Jones | 21cde8b | 2017-05-07 16:47:36 -0600 | [diff] [blame] | 6 | default y if CPU_AMD_PI |
| Marc Jones | 21cde8b | 2017-05-07 16:47:36 -0600 | [diff] [blame] | 7 | default n |
| Kyösti Mälkki | 6e37b0a | 2017-04-17 06:45:56 +0300 | [diff] [blame] | 8 | select CBMEM_TOP_BACKUP |
| Bruce Griffith | 27ed80b | 2014-08-15 11:46:25 -0600 | [diff] [blame] | 9 | |
| Kyösti Mälkki | e4c17ce | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 10 | if NORTHBRIDGE_AMD_PI |
| 11 | |
| Ricardo Ribalda Delgado | a132892 | 2016-12-28 15:16:22 +0100 | [diff] [blame] | 12 | config BOTTOMIO_POSITION |
| 13 | hex "Bottom of 32-bit IO space" |
| 14 | default 0xD0000000 |
| 15 | help |
| 16 | If PCI peripherals with big BARs are connected to the system |
| 17 | the bottom of the IO must be decreased to allocate such |
| 18 | devices. |
| 19 | |
| 20 | Declare the beginning of the 128MB-aligned MMIO region. This |
| 21 | option is useful when PCI peripherals requesting large address |
| 22 | ranges are present. |
| 23 | |
| Kyösti Mälkki | e4c17ce | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 24 | config CONSOLE_VGA_MULTI |
| 25 | bool |
| 26 | default n |
| 27 | |
| 28 | config S3_VGA_ROM_RUN |
| 29 | bool |
| 30 | default n |
| 31 | |
| Patrick Georgi | 0bb8346 | 2019-11-22 20:58:58 +0100 | [diff] [blame] | 32 | source "src/northbridge/amd/pi/00630F01/Kconfig" |
| 33 | source "src/northbridge/amd/pi/00730F01/Kconfig" |
| 34 | source "src/northbridge/amd/pi/00660F01/Kconfig" |
| Kyösti Mälkki | e4c17ce | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 35 | |
| WANG Siyuan | 2dcd0fc | 2015-06-02 16:25:58 +0800 | [diff] [blame] | 36 | config HW_MEM_HOLE_SIZEK |
| 37 | hex |
| 38 | default 0x200000 |
| 39 | |
| WANG Siyuan | 2dcd0fc | 2015-06-02 16:25:58 +0800 | [diff] [blame] | 40 | config HEAP_SIZE |
| 41 | hex |
| 42 | default 0xc0000 |
| 43 | |
| Michał Żygowski | e719288 | 2019-11-23 19:02:19 +0100 | [diff] [blame] | 44 | config NUM_OF_IOAPICS |
| 45 | int |
| 46 | default 3 |
| 47 | |
| Kyösti Mälkki | e4c17ce | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 48 | endif # NORTHBRIDGE_AMD_PI |