blob: 4d96edfd5f983e3d5266d58e22340f2780b5faa2 [file] [log] [blame]
Aaron Durbin76c37002012-10-30 09:03:43 -05001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
20# Run an intermediate step when producing coreboot.rom
21# that adds additional components to the final firmware
22# image outside of CBFS
23# FIXME, uncomment as soon as we have ME firmware in the blobs repo
24# INTERMEDIATE:=lynxpoint_add_me
25
26ramstage-y += pch.c
27ramstage-y += azalia.c
28ramstage-y += lpc.c
29ramstage-y += pci.c
30ramstage-y += pcie.c
31ramstage-y += sata.c
32ramstage-y += usb_ehci.c
Duncan Laurie2d9d39a2013-05-29 15:27:55 -070033ramstage-y += usb_xhci.c
Aaron Durbin76c37002012-10-30 09:03:43 -050034ramstage-y += me_9.x.c
35ramstage-y += smbus.c
Duncan Laurieb39ba2e2013-03-22 11:21:14 -070036ramstage-$(CONFIG_INTEL_LYNXPOINT_LP) += serialio.c
Aaron Durbin76c37002012-10-30 09:03:43 -050037
Duncan Laurie8584b222013-02-15 13:52:28 -080038ramstage-y += rcba.c
Aaron Durbin76c37002012-10-30 09:03:43 -050039ramstage-y += me_status.c
40ramstage-y += reset.c
41ramstage-y += watchdog.c
42ramstage-y += acpi.c
Aaron Durbin94998c42013-01-22 13:54:12 -060043ramstage-$(CONFIG_ALT_CBFS_LOAD_PAYLOAD) += spi_loading.c
Aaron Durbin76c37002012-10-30 09:03:43 -050044
45ramstage-$(CONFIG_ELOG) += elog.c
46ramstage-y += spi.c
47smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
48
Duncan Laurie55cdf552013-03-08 16:01:44 -080049ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c pmutil.c
Duncan Laurie1d048ca2013-05-01 11:30:24 -070050smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c finalize.c pch.c
Duncan Laurie55cdf552013-03-08 16:01:44 -080051smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
Aaron Durbin76c37002012-10-30 09:03:43 -050052
Aaron Durbin239c2e82012-12-19 11:31:17 -060053romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c
Duncan Laurie8584b222013-02-15 13:52:28 -080054romstage-y += reset.c early_spi.c rcba.c
Aaron Durbin76c37002012-10-30 09:03:43 -050055
Duncan Laurie045f1532012-12-17 11:29:10 -080056ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
57romstage-y += lp_gpio.c
58ramstage-y += lp_gpio.c
59else
60romstage-y += gpio.c
61ramstage-y += gpio.c
62endif
63
Aaron Durbin76c37002012-10-30 09:03:43 -050064lynxpoint_add_me: $(obj)/coreboot.pre $(IFDTOOL)
65 printf " DD Adding Intel Firmware Descriptor\n"
Patrick Georgi3cc151e2013-06-13 15:07:02 +020066 dd if=$(CONFIG_IFD_BIN_PATH) \
Aaron Durbin76c37002012-10-30 09:03:43 -050067 of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
68 printf " IFDTOOL me.bin -> coreboot.pre\n"
69 $(objutil)/ifdtool/ifdtool \
Patrick Georgi3cc151e2013-06-13 15:07:02 +020070 -i ME:$(CONFIG_ME_BIN_PATH) \
Aaron Durbin76c37002012-10-30 09:03:43 -050071 $(obj)/coreboot.pre
72 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
73ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
74 printf " IFDTOOL Locking Management Engine\n"
75 $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre
76 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
77else
78 printf " IFDTOOL Unlocking Management Engine\n"
79 $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre
80 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
81endif
82
83PHONY += lynxpoint_add_me