blob: 04fa2f83b9fa8cc7c7fe4e3490f30ec1d678b7c9 [file] [log] [blame]
Aaron Durbin76c37002012-10-30 09:03:43 -05001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
20# Run an intermediate step when producing coreboot.rom
21# that adds additional components to the final firmware
22# image outside of CBFS
23# FIXME, uncomment as soon as we have ME firmware in the blobs repo
24# INTERMEDIATE:=lynxpoint_add_me
25
26ramstage-y += pch.c
27ramstage-y += azalia.c
28ramstage-y += lpc.c
29ramstage-y += pci.c
30ramstage-y += pcie.c
31ramstage-y += sata.c
32ramstage-y += usb_ehci.c
33ramstage-y += me_9.x.c
34ramstage-y += smbus.c
35
Duncan Laurie8584b222013-02-15 13:52:28 -080036ramstage-y += rcba.c
Aaron Durbin76c37002012-10-30 09:03:43 -050037ramstage-y += me_status.c
38ramstage-y += reset.c
39ramstage-y += watchdog.c
40ramstage-y += acpi.c
Aaron Durbin94998c42013-01-22 13:54:12 -060041ramstage-$(CONFIG_ALT_CBFS_LOAD_PAYLOAD) += spi_loading.c
Aaron Durbin76c37002012-10-30 09:03:43 -050042
43ramstage-$(CONFIG_ELOG) += elog.c
44ramstage-y += spi.c
45smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
46
Duncan Laurie55cdf552013-03-08 16:01:44 -080047ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c pmutil.c
Duncan Laurie5cc51c02013-03-07 14:06:43 -080048smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c pch.c
Duncan Laurie55cdf552013-03-08 16:01:44 -080049smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
Aaron Durbin76c37002012-10-30 09:03:43 -050050
Aaron Durbin239c2e82012-12-19 11:31:17 -060051romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c
Aaron Durbin76c37002012-10-30 09:03:43 -050052romstage-$(CONFIG_USBDEBUG) += usb_debug.c
Duncan Laurie8584b222013-02-15 13:52:28 -080053romstage-y += reset.c early_spi.c rcba.c
Aaron Durbin76c37002012-10-30 09:03:43 -050054
Duncan Laurie045f1532012-12-17 11:29:10 -080055ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
56romstage-y += lp_gpio.c
57ramstage-y += lp_gpio.c
58else
59romstage-y += gpio.c
60ramstage-y += gpio.c
61endif
62
Aaron Durbin76c37002012-10-30 09:03:43 -050063lynxpoint_add_me: $(obj)/coreboot.pre $(IFDTOOL)
64 printf " DD Adding Intel Firmware Descriptor\n"
65 dd if=3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin \
66 of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
67 printf " IFDTOOL me.bin -> coreboot.pre\n"
68 $(objutil)/ifdtool/ifdtool \
69 -i ME:3rdparty/mainboard/$(MAINBOARDDIR)/me.bin \
70 $(obj)/coreboot.pre
71 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
72ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
73 printf " IFDTOOL Locking Management Engine\n"
74 $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre
75 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
76else
77 printf " IFDTOOL Unlocking Management Engine\n"
78 $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre
79 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
80endif
81
82PHONY += lynxpoint_add_me