Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2010 Google Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
| 20 | # Run an intermediate step when producing coreboot.rom |
| 21 | # that adds additional components to the final firmware |
| 22 | # image outside of CBFS |
| 23 | # FIXME, uncomment as soon as we have ME firmware in the blobs repo |
| 24 | # INTERMEDIATE:=lynxpoint_add_me |
| 25 | |
| 26 | ramstage-y += pch.c |
| 27 | ramstage-y += azalia.c |
| 28 | ramstage-y += lpc.c |
| 29 | ramstage-y += pci.c |
| 30 | ramstage-y += pcie.c |
| 31 | ramstage-y += sata.c |
| 32 | ramstage-y += usb_ehci.c |
| 33 | ramstage-y += me_9.x.c |
| 34 | ramstage-y += smbus.c |
| 35 | |
| 36 | ramstage-y += me_status.c |
| 37 | ramstage-y += reset.c |
| 38 | ramstage-y += watchdog.c |
| 39 | ramstage-y += acpi.c |
| 40 | |
| 41 | ramstage-$(CONFIG_ELOG) += elog.c |
| 42 | ramstage-y += spi.c |
| 43 | smm-$(CONFIG_SPI_FLASH_SMM) += spi.c |
| 44 | |
| 45 | ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c |
| 46 | smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c |
| 47 | |
Duncan Laurie | 045f153 | 2012-12-17 11:29:10 -0800 | [diff] [blame^] | 48 | romstage-y += early_usb.c early_smbus.c early_me.c me_status.c |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 49 | romstage-$(CONFIG_USBDEBUG) += usb_debug.c |
| 50 | romstage-y += reset.c early_spi.c |
| 51 | |
Duncan Laurie | 045f153 | 2012-12-17 11:29:10 -0800 | [diff] [blame^] | 52 | ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y) |
| 53 | romstage-y += lp_gpio.c |
| 54 | ramstage-y += lp_gpio.c |
| 55 | else |
| 56 | romstage-y += gpio.c |
| 57 | ramstage-y += gpio.c |
| 58 | endif |
| 59 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 60 | lynxpoint_add_me: $(obj)/coreboot.pre $(IFDTOOL) |
| 61 | printf " DD Adding Intel Firmware Descriptor\n" |
| 62 | dd if=3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin \ |
| 63 | of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 |
| 64 | printf " IFDTOOL me.bin -> coreboot.pre\n" |
| 65 | $(objutil)/ifdtool/ifdtool \ |
| 66 | -i ME:3rdparty/mainboard/$(MAINBOARDDIR)/me.bin \ |
| 67 | $(obj)/coreboot.pre |
| 68 | mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre |
| 69 | ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y) |
| 70 | printf " IFDTOOL Locking Management Engine\n" |
| 71 | $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre |
| 72 | mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre |
| 73 | else |
| 74 | printf " IFDTOOL Unlocking Management Engine\n" |
| 75 | $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre |
| 76 | mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre |
| 77 | endif |
| 78 | |
| 79 | PHONY += lynxpoint_add_me |