Angel Pons | 0612b27 | 2020-04-05 15:46:56 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 2 | |
| 3 | #include <device/device.h> |
| 4 | #include <device/path.h> |
| 5 | #include <device/smbus.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 8 | #include <soc/smbus.h> |
Kyösti Mälkki | 1cae454 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 9 | #include <device/smbus_host.h> |
Subrata Banik | f48b843 | 2022-04-14 19:05:52 +0530 | [diff] [blame] | 10 | #include <intelblocks/tco.h> |
Angel Pons | c2461a1 | 2022-05-17 20:29:46 +0200 | [diff] [blame] | 11 | #include <southbridge/intel/common/smbus_ops.h> |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 12 | #include "smbuslib.h" |
| 13 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 14 | static void pch_smbus_init(struct device *dev) |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 15 | { |
| 16 | struct resource *res; |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 17 | |
| 18 | /* Enable clock gating */ |
Nico Huber | 6278867 | 2017-08-17 16:08:00 +0200 | [diff] [blame] | 19 | pci_update_config32(dev, 0x80, |
| 20 | ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 21 | |
| 22 | /* Set Receive Slave Address */ |
Angel Pons | c1bfbe0 | 2021-11-03 13:18:53 +0100 | [diff] [blame] | 23 | res = probe_resource(dev, PCI_BASE_ADDRESS_4); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 24 | if (res) |
Kyösti Mälkki | 73451fd | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 25 | smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 26 | } |
| 27 | |
Subrata Banik | f48b843 | 2022-04-14 19:05:52 +0530 | [diff] [blame] | 28 | /* |
| 29 | * `finalize_smbus` function is native implementation of equivalent events |
| 30 | * performed by each FSP NotifyPhase() API invocations. |
| 31 | * |
| 32 | * Operations are: |
| 33 | * 1. TCO Lock. |
| 34 | */ |
| 35 | static void finalize_smbus(struct device *dev) |
| 36 | { |
| 37 | if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) |
| 38 | tco_lockdown(); |
| 39 | } |
| 40 | |
Nico Huber | 5768619 | 2022-08-06 19:11:55 +0200 | [diff] [blame] | 41 | struct device_operations smbus_ops = { |
Elyes HAOUAS | 1d19127 | 2018-11-27 12:23:48 +0100 | [diff] [blame] | 42 | .read_resources = smbus_read_resources, |
| 43 | .set_resources = pci_dev_set_resources, |
| 44 | .enable_resources = pci_dev_enable_resources, |
| 45 | .scan_bus = scan_smbus, |
| 46 | .init = pch_smbus_init, |
Subrata Banik | 6bbc91a | 2017-12-07 14:55:51 +0530 | [diff] [blame] | 47 | .ops_pci = &pci_dev_ops_pci, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 48 | .ops_smbus_bus = &lops_smbus_bus, |
Subrata Banik | f48b843 | 2022-04-14 19:05:52 +0530 | [diff] [blame] | 49 | .final = finalize_smbus, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 50 | }; |
| 51 | |
| 52 | static const unsigned short pci_device_ids[] = { |
Wonkyu Kim | 9f40107 | 2020-11-13 15:16:32 -0800 | [diff] [blame] | 53 | PCI_DID_INTEL_MTL_SMBUS, |
Bora Guvendik | a15b25f | 2022-02-28 14:43:49 -0800 | [diff] [blame] | 54 | PCI_DID_INTEL_RPP_P_SMBUS, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 55 | PCI_DID_INTEL_APL_SMBUS, |
Sean Rhodes | f251660 | 2022-09-07 13:30:05 +0100 | [diff] [blame] | 56 | PCI_DID_INTEL_GLK_SMBUS, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 57 | PCI_DID_INTEL_CNL_SMBUS, |
| 58 | PCI_DID_INTEL_CNP_H_SMBUS, |
Tim Chu | 2ccbcc5 | 2022-12-08 11:05:36 +0000 | [diff] [blame^] | 59 | PCI_DID_INTEL_EBG_SMBUS, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 60 | PCI_DID_INTEL_LWB_SMBUS_SUPER, |
| 61 | PCI_DID_INTEL_LWB_SMBUS, |
| 62 | PCI_DID_INTEL_ICP_LP_SMBUS, |
| 63 | PCI_DID_INTEL_CMP_SMBUS, |
| 64 | PCI_DID_INTEL_CMP_H_SMBUS, |
| 65 | PCI_DID_INTEL_TGP_LP_SMBUS, |
| 66 | PCI_DID_INTEL_TGP_H_SMBUS, |
| 67 | PCI_DID_INTEL_MCC_SMBUS, |
| 68 | PCI_DID_INTEL_JSP_SMBUS, |
| 69 | PCI_DID_INTEL_ADP_P_SMBUS, |
| 70 | PCI_DID_INTEL_ADP_S_SMBUS, |
| 71 | PCI_DID_INTEL_ADP_M_N_SMBUS, |
| 72 | PCI_DID_INTEL_DNV_SMBUS_LEGACY, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 73 | 0 |
| 74 | }; |
| 75 | |
| 76 | static const struct pci_driver pch_smbus __pci_driver = { |
| 77 | .ops = &smbus_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 78 | .vendor = PCI_VID_INTEL, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 79 | .devices = pci_device_ids, |
| 80 | }; |