blob: dc4c43ee5fe22b5b7220fb3509c07b1b8ecd74e0 [file] [log] [blame]
Angel Pons0612b272020-04-05 15:46:56 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Aamir Bohra52f29742017-04-19 18:19:14 +05303
4#include <device/device.h>
5#include <device/path.h>
6#include <device/smbus.h>
7#include <device/pci.h>
8#include <device/pci_ids.h>
Aamir Bohra52f29742017-04-19 18:19:14 +05309#include <soc/smbus.h>
Kyösti Mälkki1cae4542020-01-06 12:31:34 +020010#include <device/smbus_host.h>
Aamir Bohra52f29742017-04-19 18:19:14 +053011#include "smbuslib.h"
12
Elyes HAOUAS4a131262018-09-16 17:35:48 +020013static int lsmbus_read_byte(struct device *dev, u8 address)
Aamir Bohra52f29742017-04-19 18:19:14 +053014{
15 u16 device;
16 struct resource *res;
17 struct bus *pbus;
18 device = dev->path.i2c.device;
19 pbus = get_pbus_smbus(dev);
20 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
Kyösti Mälkki4ae9f1e2020-01-01 17:42:45 +020021 return do_smbus_read_byte(res->base, device, address);
Aamir Bohra52f29742017-04-19 18:19:14 +053022}
23
Elyes HAOUAS4a131262018-09-16 17:35:48 +020024static int lsmbus_write_byte(struct device *dev, u8 address, u8 data)
Aamir Bohra52f29742017-04-19 18:19:14 +053025{
26 u16 device;
27 struct resource *res;
28 struct bus *pbus;
29
30 device = dev->path.i2c.device;
31 pbus = get_pbus_smbus(dev);
32 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
Kyösti Mälkki4ae9f1e2020-01-01 17:42:45 +020033 return do_smbus_write_byte(res->base, device, address, data);
Aamir Bohra52f29742017-04-19 18:19:14 +053034}
35
36static struct smbus_bus_operations lops_smbus_bus = {
37 .read_byte = lsmbus_read_byte,
38 .write_byte = lsmbus_write_byte,
39};
40
Elyes HAOUAS4a131262018-09-16 17:35:48 +020041static void pch_smbus_init(struct device *dev)
Aamir Bohra52f29742017-04-19 18:19:14 +053042{
43 struct resource *res;
Aamir Bohra52f29742017-04-19 18:19:14 +053044
45 /* Enable clock gating */
Nico Huber62788672017-08-17 16:08:00 +020046 pci_update_config32(dev, 0x80,
47 ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0);
Aamir Bohra52f29742017-04-19 18:19:14 +053048
49 /* Set Receive Slave Address */
50 res = find_resource(dev, PCI_BASE_ADDRESS_4);
51 if (res)
Kyösti Mälkki73451fd2020-01-06 19:00:31 +020052 smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
Aamir Bohra52f29742017-04-19 18:19:14 +053053}
54
Elyes HAOUAS4a131262018-09-16 17:35:48 +020055static void smbus_read_resources(struct device *dev)
Aamir Bohra52f29742017-04-19 18:19:14 +053056{
57 struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
58 res->base = SMBUS_IO_BASE;
59 res->size = 32;
60 res->limit = res->base + res->size - 1;
61 res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
62 IORESOURCE_STORED | IORESOURCE_ASSIGNED;
63
64 /* Also add MMIO resource */
65 res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
66}
67
68static struct device_operations smbus_ops = {
Elyes HAOUAS1d191272018-11-27 12:23:48 +010069 .read_resources = smbus_read_resources,
70 .set_resources = pci_dev_set_resources,
71 .enable_resources = pci_dev_enable_resources,
72 .scan_bus = scan_smbus,
73 .init = pch_smbus_init,
Subrata Banik6bbc91a2017-12-07 14:55:51 +053074 .ops_pci = &pci_dev_ops_pci,
Aamir Bohra52f29742017-04-19 18:19:14 +053075 .ops_smbus_bus = &lops_smbus_bus,
76};
77
78static const unsigned short pci_device_ids[] = {
Lijian Zhaobbedef92017-07-29 16:38:38 -070079 PCI_DEVICE_ID_INTEL_CNL_SMBUS,
Aamir Bohra52f29742017-04-19 18:19:14 +053080 PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS,
81 PCI_DEVICE_ID_INTEL_SPT_H_SMBUS,
Maxim Polyakov571d07d2019-08-22 13:11:32 +030082 PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER,
Jonathan Zhangc9ece502019-11-25 12:41:15 -080083 PCI_DEVICE_ID_INTEL_LWB_SMBUS,
Aamir Bohra9eac0392018-06-30 12:07:04 +053084 PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS,
Ronak Kanabarda7ffb482019-02-05 01:51:13 +053085 PCI_DEVICE_ID_INTEL_CMP_SMBUS,
Gaggery Tsai12a651c2019-12-05 11:23:20 -080086 PCI_DEVICE_ID_INTEL_CMP_H_SMBUS,
Ravi Sarawadi6b5bf402019-10-21 22:25:04 -070087 PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS,
Tan, Lean Sheng26136092020-01-20 19:13:56 -080088 PCI_DEVICE_ID_INTEL_MCC_SMBUS,
Meera Ravindranath3f4af0d2020-02-12 16:01:22 +053089 PCI_DEVICE_ID_INTEL_JSP_SMBUS,
Aamir Bohra52f29742017-04-19 18:19:14 +053090 0
91};
92
93static const struct pci_driver pch_smbus __pci_driver = {
94 .ops = &smbus_ops,
95 .vendor = PCI_VENDOR_ID_INTEL,
96 .devices = pci_device_ids,
97};