Angel Pons | 0612b27 | 2020-04-05 15:46:56 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 3 | |
| 4 | #include <device/device.h> |
| 5 | #include <device/path.h> |
| 6 | #include <device/smbus.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <device/pci_ids.h> |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 9 | #include <soc/smbus.h> |
Kyösti Mälkki | 1cae454 | 2020-01-06 12:31:34 +0200 | [diff] [blame] | 10 | #include <device/smbus_host.h> |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 11 | #include "smbuslib.h" |
| 12 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 13 | static int lsmbus_read_byte(struct device *dev, u8 address) |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 14 | { |
| 15 | u16 device; |
| 16 | struct resource *res; |
| 17 | struct bus *pbus; |
| 18 | device = dev->path.i2c.device; |
| 19 | pbus = get_pbus_smbus(dev); |
| 20 | res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4); |
Kyösti Mälkki | 4ae9f1e | 2020-01-01 17:42:45 +0200 | [diff] [blame] | 21 | return do_smbus_read_byte(res->base, device, address); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 22 | } |
| 23 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 24 | static int lsmbus_write_byte(struct device *dev, u8 address, u8 data) |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 25 | { |
| 26 | u16 device; |
| 27 | struct resource *res; |
| 28 | struct bus *pbus; |
| 29 | |
| 30 | device = dev->path.i2c.device; |
| 31 | pbus = get_pbus_smbus(dev); |
| 32 | res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4); |
Kyösti Mälkki | 4ae9f1e | 2020-01-01 17:42:45 +0200 | [diff] [blame] | 33 | return do_smbus_write_byte(res->base, device, address, data); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 34 | } |
| 35 | |
| 36 | static struct smbus_bus_operations lops_smbus_bus = { |
| 37 | .read_byte = lsmbus_read_byte, |
| 38 | .write_byte = lsmbus_write_byte, |
| 39 | }; |
| 40 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 41 | static void pch_smbus_init(struct device *dev) |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 42 | { |
| 43 | struct resource *res; |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 44 | |
| 45 | /* Enable clock gating */ |
Nico Huber | 6278867 | 2017-08-17 16:08:00 +0200 | [diff] [blame] | 46 | pci_update_config32(dev, 0x80, |
| 47 | ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 48 | |
| 49 | /* Set Receive Slave Address */ |
| 50 | res = find_resource(dev, PCI_BASE_ADDRESS_4); |
| 51 | if (res) |
Kyösti Mälkki | 73451fd | 2020-01-06 19:00:31 +0200 | [diff] [blame] | 52 | smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 53 | } |
| 54 | |
Elyes HAOUAS | 4a13126 | 2018-09-16 17:35:48 +0200 | [diff] [blame] | 55 | static void smbus_read_resources(struct device *dev) |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 56 | { |
| 57 | struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4); |
| 58 | res->base = SMBUS_IO_BASE; |
| 59 | res->size = 32; |
| 60 | res->limit = res->base + res->size - 1; |
| 61 | res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | |
| 62 | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 63 | |
| 64 | /* Also add MMIO resource */ |
| 65 | res = pci_get_resource(dev, PCI_BASE_ADDRESS_0); |
| 66 | } |
| 67 | |
| 68 | static struct device_operations smbus_ops = { |
Elyes HAOUAS | 1d19127 | 2018-11-27 12:23:48 +0100 | [diff] [blame] | 69 | .read_resources = smbus_read_resources, |
| 70 | .set_resources = pci_dev_set_resources, |
| 71 | .enable_resources = pci_dev_enable_resources, |
| 72 | .scan_bus = scan_smbus, |
| 73 | .init = pch_smbus_init, |
Subrata Banik | 6bbc91a | 2017-12-07 14:55:51 +0530 | [diff] [blame] | 74 | .ops_pci = &pci_dev_ops_pci, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 75 | .ops_smbus_bus = &lops_smbus_bus, |
| 76 | }; |
| 77 | |
| 78 | static const unsigned short pci_device_ids[] = { |
Lijian Zhao | bbedef9 | 2017-07-29 16:38:38 -0700 | [diff] [blame] | 79 | PCI_DEVICE_ID_INTEL_CNL_SMBUS, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 80 | PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS, |
| 81 | PCI_DEVICE_ID_INTEL_SPT_H_SMBUS, |
Maxim Polyakov | 571d07d | 2019-08-22 13:11:32 +0300 | [diff] [blame] | 82 | PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER, |
Jonathan Zhang | c9ece50 | 2019-11-25 12:41:15 -0800 | [diff] [blame] | 83 | PCI_DEVICE_ID_INTEL_LWB_SMBUS, |
Aamir Bohra | 9eac039 | 2018-06-30 12:07:04 +0530 | [diff] [blame] | 84 | PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS, |
Ronak Kanabar | da7ffb48 | 2019-02-05 01:51:13 +0530 | [diff] [blame] | 85 | PCI_DEVICE_ID_INTEL_CMP_SMBUS, |
Gaggery Tsai | 12a651c | 2019-12-05 11:23:20 -0800 | [diff] [blame] | 86 | PCI_DEVICE_ID_INTEL_CMP_H_SMBUS, |
Ravi Sarawadi | 6b5bf40 | 2019-10-21 22:25:04 -0700 | [diff] [blame] | 87 | PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS, |
Tan, Lean Sheng | 2613609 | 2020-01-20 19:13:56 -0800 | [diff] [blame] | 88 | PCI_DEVICE_ID_INTEL_MCC_SMBUS, |
Meera Ravindranath | 3f4af0d | 2020-02-12 16:01:22 +0530 | [diff] [blame] | 89 | PCI_DEVICE_ID_INTEL_JSP_SMBUS, |
Aamir Bohra | 52f2974 | 2017-04-19 18:19:14 +0530 | [diff] [blame] | 90 | 0 |
| 91 | }; |
| 92 | |
| 93 | static const struct pci_driver pch_smbus __pci_driver = { |
| 94 | .ops = &smbus_ops, |
| 95 | .vendor = PCI_VENDOR_ID_INTEL, |
| 96 | .devices = pci_device_ids, |
| 97 | }; |