blob: 254486cf6ec01f64885aed81f589fa56e167987b [file] [log] [blame]
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +02001chip soc/intel/skylake
2
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +02003 # FSP Configuration
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +02004 register "SkipExtGfxScan" = "1"
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +02005
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +02006 # SATA configuration
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +02007 register "SataSalpSupport" = "1"
Felix Singer21b5a9a2023-10-23 07:26:28 +02008 register "SataPortsEnable" = "{
9 [0] = 1,
10 [1] = 1,
11 [2] = 1,
12 [3] = 1,
13 [4] = 1,
14 [5] = 1,
15 [6] = 1,
16 [7] = 1,
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +020017 }"
18
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +020019 # LPC
20 register "serirq_mode" = "SERIRQ_CONTINUOUS"
21
Michael Niewöhner1b79b862019-10-20 00:01:58 +020022 # Enabling SLP_S0, SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
Felix Singer743242b2023-06-16 01:33:25 +020023 register "s0ix_enable" = true
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +020024 register "PmConfigSlpS3MinAssert" = "SLP_S3_MIN_ASSERT_50MS"
25 register "PmConfigSlpS4MinAssert" = "SLP_S4_MIN_ASSERT_4S"
26 register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S"
27 register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S"
28
Arthur Heymans69cd7292022-11-07 13:52:11 +010029 device cpu_cluster 0 on end
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +020030 device domain 0 on
Felix Singera03999b2023-10-23 09:01:05 +020031 device ref sa_thermal on end
32 device ref south_xhci on end
33 device ref thermal on end
34 device ref heci1 on end
35 device ref sata on end
36 device ref lpc_espi on
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +020037 chip superio/common
38 device pnp 2e.0 on end
39 end
40 chip drivers/pc80/tpm # TPM
41 device pnp 0c31.0 on end
42 end
43 end
Felix Singera03999b2023-10-23 09:01:05 +020044 device ref smbus on end
45 device ref fast_spi on end
Michael Niewöhner0a6c62f2019-09-18 16:31:50 +020046 end
47end