Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * This is a ramstage driver for the Intel Management Engine found in the |
| 5 | * 6-series chipset. It handles the required boot-time messages over the |
| 6 | * MMIO-based Management Engine Interface to tell the ME that the BIOS is |
| 7 | * finished with POST. Additional messages are defined for debug but are |
| 8 | * not used unless the console loglevel is high enough. |
| 9 | */ |
| 10 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 11 | #include <acpi/acpi.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 12 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 13 | #include <device/pci_ops.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 14 | #include <console/console.h> |
Stefan Reinauer | 24d1d4b | 2013-03-21 11:51:41 -0700 | [diff] [blame] | 15 | #include <device/device.h> |
| 16 | #include <device/pci.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 17 | #include <device/pci_ids.h> |
| 18 | #include <device/pci_def.h> |
| 19 | #include <string.h> |
| 20 | #include <delay.h> |
| 21 | #include <elog.h> |
Elyes HAOUAS | 400f9ca | 2019-06-23 07:01:22 +0200 | [diff] [blame] | 22 | #include <stdlib.h> |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 23 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 24 | #include "chip.h" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 25 | #include "me.h" |
| 26 | #include "pch.h" |
| 27 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 28 | #if CONFIG(CHROMEOS) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 29 | #include <vendorcode/google/chromeos/chromeos.h> |
| 30 | #include <vendorcode/google/chromeos/gnvs.h> |
| 31 | #endif |
| 32 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 33 | /* Path that the BIOS should take based on ME state */ |
Angel Pons | f01884e | 2020-06-21 12:48:48 +0200 | [diff] [blame] | 34 | static const char *const me_bios_path_values[] __unused = { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 35 | [ME_NORMAL_BIOS_PATH] = "Normal", |
| 36 | [ME_S3WAKE_BIOS_PATH] = "S3 Wake", |
| 37 | [ME_ERROR_BIOS_PATH] = "Error", |
| 38 | [ME_RECOVERY_BIOS_PATH] = "Recovery", |
| 39 | [ME_DISABLE_BIOS_PATH] = "Disable", |
| 40 | [ME_FIRMWARE_UPDATE_BIOS_PATH] = "Firmware Update", |
| 41 | }; |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 42 | static int intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 43 | |
| 44 | /* MMIO base address for MEI interface */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 45 | static u32 *mei_base_address; |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 46 | #ifdef __SIMPLE_DEVICE__ |
| 47 | void intel_me_mbp_clear(pci_devfn_t dev); |
| 48 | #else |
| 49 | void intel_me_mbp_clear(struct device *dev); |
| 50 | #endif |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 51 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 52 | static void mei_dump(void *ptr, int dword, int offset, const char *type) |
| 53 | { |
| 54 | struct mei_csr *csr; |
| 55 | |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 56 | if (!CONFIG(DEBUG_INTEL_ME)) |
| 57 | return; |
| 58 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 59 | printk(BIOS_SPEW, "%-9s[%02x] : ", type, offset); |
| 60 | |
| 61 | switch (offset) { |
| 62 | case MEI_H_CSR: |
| 63 | case MEI_ME_CSR_HA: |
| 64 | csr = ptr; |
| 65 | if (!csr) { |
| 66 | printk(BIOS_SPEW, "ERROR: 0x%08x\n", dword); |
| 67 | break; |
| 68 | } |
| 69 | printk(BIOS_SPEW, "cbd=%u cbrp=%02u cbwp=%02u ready=%u " |
| 70 | "reset=%u ig=%u is=%u ie=%u\n", csr->buffer_depth, |
| 71 | csr->buffer_read_ptr, csr->buffer_write_ptr, |
| 72 | csr->ready, csr->reset, csr->interrupt_generate, |
| 73 | csr->interrupt_status, csr->interrupt_enable); |
| 74 | break; |
| 75 | case MEI_ME_CB_RW: |
| 76 | case MEI_H_CB_WW: |
| 77 | printk(BIOS_SPEW, "CB: 0x%08x\n", dword); |
| 78 | break; |
| 79 | default: |
| 80 | printk(BIOS_SPEW, "0x%08x\n", offset); |
| 81 | break; |
| 82 | } |
| 83 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 84 | |
| 85 | /* |
| 86 | * ME/MEI access helpers using memcpy to avoid aliasing. |
| 87 | */ |
| 88 | |
| 89 | static inline void mei_read_dword_ptr(void *ptr, int offset) |
| 90 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 91 | u32 dword = read32(mei_base_address + (offset/sizeof(u32))); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 92 | memcpy(ptr, &dword, sizeof(dword)); |
| 93 | mei_dump(ptr, dword, offset, "READ"); |
| 94 | } |
| 95 | |
| 96 | static inline void mei_write_dword_ptr(void *ptr, int offset) |
| 97 | { |
| 98 | u32 dword = 0; |
| 99 | memcpy(&dword, ptr, sizeof(dword)); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 100 | write32(mei_base_address + (offset/sizeof(u32)), dword); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 101 | mei_dump(ptr, dword, offset, "WRITE"); |
| 102 | } |
| 103 | |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 104 | #ifdef __SIMPLE_DEVICE__ |
| 105 | static inline void pci_read_dword_ptr(pci_devfn_t dev, void *ptr, int offset) |
| 106 | #else |
| 107 | static inline void pci_read_dword_ptr(struct device *dev, void *ptr, int offset) |
| 108 | #endif |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 109 | { |
| 110 | u32 dword = pci_read_config32(dev, offset); |
| 111 | memcpy(ptr, &dword, sizeof(dword)); |
| 112 | mei_dump(ptr, dword, offset, "PCI READ"); |
| 113 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 114 | |
| 115 | static inline void read_host_csr(struct mei_csr *csr) |
| 116 | { |
| 117 | mei_read_dword_ptr(csr, MEI_H_CSR); |
| 118 | } |
| 119 | |
| 120 | static inline void write_host_csr(struct mei_csr *csr) |
| 121 | { |
| 122 | mei_write_dword_ptr(csr, MEI_H_CSR); |
| 123 | } |
| 124 | |
| 125 | static inline void read_me_csr(struct mei_csr *csr) |
| 126 | { |
| 127 | mei_read_dword_ptr(csr, MEI_ME_CSR_HA); |
| 128 | } |
| 129 | |
| 130 | static inline void write_cb(u32 dword) |
| 131 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 132 | write32(mei_base_address + (MEI_H_CB_WW/sizeof(u32)), dword); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 133 | mei_dump(NULL, dword, MEI_H_CB_WW, "WRITE"); |
| 134 | } |
| 135 | |
| 136 | static inline u32 read_cb(void) |
| 137 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 138 | u32 dword = read32(mei_base_address + (MEI_ME_CB_RW/sizeof(u32))); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 139 | mei_dump(NULL, dword, MEI_ME_CB_RW, "READ"); |
| 140 | return dword; |
| 141 | } |
| 142 | |
| 143 | /* Wait for ME ready bit to be asserted */ |
| 144 | static int mei_wait_for_me_ready(void) |
| 145 | { |
| 146 | struct mei_csr me; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 147 | unsigned int try = ME_RETRY; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 148 | |
| 149 | while (try--) { |
| 150 | read_me_csr(&me); |
| 151 | if (me.ready) |
| 152 | return 0; |
| 153 | udelay(ME_DELAY); |
| 154 | } |
| 155 | |
| 156 | printk(BIOS_ERR, "ME: failed to become ready\n"); |
| 157 | return -1; |
| 158 | } |
| 159 | |
| 160 | static void mei_reset(void) |
| 161 | { |
| 162 | struct mei_csr host; |
| 163 | |
| 164 | if (mei_wait_for_me_ready() < 0) |
| 165 | return; |
| 166 | |
| 167 | /* Reset host and ME circular buffers for next message */ |
| 168 | read_host_csr(&host); |
| 169 | host.reset = 1; |
| 170 | host.interrupt_generate = 1; |
| 171 | write_host_csr(&host); |
| 172 | |
| 173 | if (mei_wait_for_me_ready() < 0) |
| 174 | return; |
| 175 | |
| 176 | /* Re-init and indicate host is ready */ |
| 177 | read_host_csr(&host); |
| 178 | host.interrupt_generate = 1; |
| 179 | host.ready = 1; |
| 180 | host.reset = 0; |
| 181 | write_host_csr(&host); |
| 182 | } |
| 183 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 184 | static int mei_send_packet(struct mei_header *mei, void *req_data) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 185 | { |
| 186 | struct mei_csr host; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 187 | unsigned int ndata, n; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 188 | u32 *data; |
| 189 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 190 | /* Number of dwords to write */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 191 | ndata = mei->length >> 2; |
| 192 | |
| 193 | /* Pad non-dword aligned request message length */ |
| 194 | if (mei->length & 3) |
| 195 | ndata++; |
| 196 | if (!ndata) { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 197 | printk(BIOS_DEBUG, "ME: request has no data\n"); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 198 | return -1; |
| 199 | } |
| 200 | ndata++; /* Add MEI header */ |
| 201 | |
| 202 | /* |
| 203 | * Make sure there is still room left in the circular buffer. |
| 204 | * Reset the buffer pointers if the requested message will not fit. |
| 205 | */ |
| 206 | read_host_csr(&host); |
| 207 | if ((host.buffer_depth - host.buffer_write_ptr) < ndata) { |
| 208 | printk(BIOS_ERR, "ME: circular buffer full, resetting...\n"); |
| 209 | mei_reset(); |
| 210 | read_host_csr(&host); |
| 211 | } |
| 212 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 213 | /* Ensure the requested length will fit in the circular buffer. */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 214 | if ((host.buffer_depth - host.buffer_write_ptr) < ndata) { |
| 215 | printk(BIOS_ERR, "ME: message (%u) too large for buffer (%u)\n", |
| 216 | ndata + 2, host.buffer_depth); |
| 217 | return -1; |
| 218 | } |
| 219 | |
| 220 | /* Write MEI header */ |
| 221 | mei_write_dword_ptr(mei, MEI_H_CB_WW); |
| 222 | ndata--; |
| 223 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 224 | /* Write message data */ |
| 225 | data = req_data; |
| 226 | for (n = 0; n < ndata; ++n) |
| 227 | write_cb(*data++); |
| 228 | |
| 229 | /* Generate interrupt to the ME */ |
| 230 | read_host_csr(&host); |
| 231 | host.interrupt_generate = 1; |
| 232 | write_host_csr(&host); |
| 233 | |
| 234 | /* Make sure ME is ready after sending request data */ |
| 235 | return mei_wait_for_me_ready(); |
| 236 | } |
| 237 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 238 | static int mei_send_data(u8 me_address, u8 host_address, |
| 239 | void *req_data, int req_bytes) |
| 240 | { |
| 241 | struct mei_header header = { |
| 242 | .client_address = me_address, |
| 243 | .host_address = host_address, |
| 244 | }; |
| 245 | struct mei_csr host; |
| 246 | int current = 0; |
| 247 | u8 *req_ptr = req_data; |
| 248 | |
| 249 | while (!header.is_complete) { |
| 250 | int remain = req_bytes - current; |
| 251 | int buf_len; |
| 252 | |
| 253 | read_host_csr(&host); |
| 254 | buf_len = host.buffer_depth - host.buffer_write_ptr; |
| 255 | |
| 256 | if (buf_len > remain) { |
| 257 | /* Send all remaining data as final message */ |
| 258 | header.length = req_bytes - current; |
| 259 | header.is_complete = 1; |
| 260 | } else { |
| 261 | /* Send as much data as the buffer can hold */ |
| 262 | header.length = buf_len; |
| 263 | } |
| 264 | |
| 265 | mei_send_packet(&header, req_ptr); |
| 266 | |
| 267 | req_ptr += header.length; |
| 268 | current += header.length; |
| 269 | } |
| 270 | |
| 271 | return 0; |
| 272 | } |
| 273 | |
| 274 | static int mei_send_header(u8 me_address, u8 host_address, |
| 275 | void *header, int header_len, int complete) |
| 276 | { |
| 277 | struct mei_header mei = { |
| 278 | .client_address = me_address, |
| 279 | .host_address = host_address, |
| 280 | .length = header_len, |
| 281 | .is_complete = complete, |
| 282 | }; |
| 283 | return mei_send_packet(&mei, header); |
| 284 | } |
| 285 | |
| 286 | static int mei_recv_msg(void *header, int header_bytes, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 287 | void *rsp_data, int rsp_bytes) |
| 288 | { |
| 289 | struct mei_header mei_rsp; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 290 | struct mei_csr me, host; |
Martin Roth | ff744bf | 2019-10-23 21:46:03 -0600 | [diff] [blame] | 291 | unsigned int ndata, n; |
| 292 | unsigned int expected; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 293 | u32 *data; |
| 294 | |
| 295 | /* Total number of dwords to read from circular buffer */ |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 296 | expected = (rsp_bytes + sizeof(mei_rsp) + header_bytes) >> 2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 297 | if (rsp_bytes & 3) |
| 298 | expected++; |
| 299 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 300 | if (mei_wait_for_me_ready() < 0) |
| 301 | return -1; |
| 302 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 303 | /* |
| 304 | * The interrupt status bit does not appear to indicate that the |
| 305 | * message has actually been received. Instead we wait until the |
| 306 | * expected number of dwords are present in the circular buffer. |
| 307 | */ |
| 308 | for (n = ME_RETRY; n; --n) { |
| 309 | read_me_csr(&me); |
| 310 | if ((me.buffer_write_ptr - me.buffer_read_ptr) >= expected) |
| 311 | break; |
| 312 | udelay(ME_DELAY); |
| 313 | } |
| 314 | if (!n) { |
| 315 | printk(BIOS_ERR, "ME: timeout waiting for data: expected " |
| 316 | "%u, available %u\n", expected, |
| 317 | me.buffer_write_ptr - me.buffer_read_ptr); |
| 318 | return -1; |
| 319 | } |
| 320 | |
| 321 | /* Read and verify MEI response header from the ME */ |
| 322 | mei_read_dword_ptr(&mei_rsp, MEI_ME_CB_RW); |
| 323 | if (!mei_rsp.is_complete) { |
| 324 | printk(BIOS_ERR, "ME: response is not complete\n"); |
| 325 | return -1; |
| 326 | } |
| 327 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 328 | /* Handle non-dword responses and expect at least the header */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 329 | ndata = mei_rsp.length >> 2; |
| 330 | if (mei_rsp.length & 3) |
| 331 | ndata++; |
| 332 | if (ndata != (expected - 1)) { |
| 333 | printk(BIOS_ERR, "ME: response is missing data %d != %d\n", |
| 334 | ndata, (expected - 1)); |
| 335 | return -1; |
| 336 | } |
| 337 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 338 | /* Read response header from the ME */ |
| 339 | data = header; |
| 340 | for (n = 0; n < (header_bytes >> 2); ++n) |
| 341 | *data++ = read_cb(); |
| 342 | ndata -= header_bytes >> 2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 343 | |
| 344 | /* Make sure caller passed a buffer with enough space */ |
| 345 | if (ndata != (rsp_bytes >> 2)) { |
| 346 | printk(BIOS_ERR, "ME: not enough room in response buffer: " |
| 347 | "%u != %u\n", ndata, rsp_bytes >> 2); |
| 348 | return -1; |
| 349 | } |
| 350 | |
| 351 | /* Read response data from the circular buffer */ |
| 352 | data = rsp_data; |
| 353 | for (n = 0; n < ndata; ++n) |
| 354 | *data++ = read_cb(); |
| 355 | |
| 356 | /* Tell the ME that we have consumed the response */ |
| 357 | read_host_csr(&host); |
| 358 | host.interrupt_status = 1; |
| 359 | host.interrupt_generate = 1; |
| 360 | write_host_csr(&host); |
| 361 | |
| 362 | return mei_wait_for_me_ready(); |
| 363 | } |
| 364 | |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 365 | static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi, |
| 366 | void *req_data, int req_bytes, |
| 367 | void *rsp_data, int rsp_bytes) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 368 | { |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 369 | struct mkhi_header mkhi_rsp; |
| 370 | |
| 371 | /* Send header */ |
| 372 | if (mei_send_header(MEI_ADDRESS_MKHI, MEI_HOST_ADDRESS, |
| 373 | mkhi, sizeof(*mkhi), req_bytes ? 0 : 1) < 0) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 374 | return -1; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 375 | |
| 376 | /* Send data if available */ |
| 377 | if (req_bytes && mei_send_data(MEI_ADDRESS_MKHI, MEI_HOST_ADDRESS, |
| 378 | req_data, req_bytes) < 0) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 379 | return -1; |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 380 | |
| 381 | /* Return now if no response expected */ |
| 382 | if (!rsp_bytes) |
| 383 | return 0; |
| 384 | |
| 385 | /* Read header and data */ |
| 386 | if (mei_recv_msg(&mkhi_rsp, sizeof(mkhi_rsp), |
| 387 | rsp_data, rsp_bytes) < 0) |
| 388 | return -1; |
| 389 | |
| 390 | if (!mkhi_rsp.is_response || |
| 391 | mkhi->group_id != mkhi_rsp.group_id || |
| 392 | mkhi->command != mkhi_rsp.command) { |
| 393 | printk(BIOS_ERR, "ME: invalid response, group %u ?= %u," |
| 394 | "command %u ?= %u, is_response %u\n", mkhi->group_id, |
| 395 | mkhi_rsp.group_id, mkhi->command, mkhi_rsp.command, |
| 396 | mkhi_rsp.is_response); |
| 397 | return -1; |
| 398 | } |
| 399 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 400 | return 0; |
| 401 | } |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 402 | |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 403 | /* |
| 404 | * mbp give up routine. This path is taken if hfs.mpb_rdy is 0 or the read |
| 405 | * state machine on the BIOS end doesn't match the ME's state machine. |
| 406 | */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 407 | #ifdef __SIMPLE_DEVICE__ |
| 408 | static void intel_me_mbp_give_up(pci_devfn_t dev) |
| 409 | #else |
| 410 | static void intel_me_mbp_give_up(struct device *dev) |
| 411 | #endif |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 412 | { |
| 413 | struct mei_csr csr; |
| 414 | |
| 415 | pci_write_config32(dev, PCI_ME_H_GS2, PCI_ME_MBP_GIVE_UP); |
| 416 | |
| 417 | read_host_csr(&csr); |
| 418 | csr.reset = 1; |
| 419 | csr.interrupt_generate = 1; |
| 420 | write_host_csr(&csr); |
| 421 | } |
| 422 | |
| 423 | /* |
| 424 | * mbp clear routine. This will wait for the ME to indicate that |
| 425 | * the MBP has been read and cleared. |
| 426 | */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 427 | #ifdef __SIMPLE_DEVICE__ |
| 428 | void intel_me_mbp_clear(pci_devfn_t dev) |
| 429 | #else |
| 430 | void intel_me_mbp_clear(struct device *dev) |
| 431 | #endif |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 432 | { |
| 433 | int count; |
| 434 | struct me_hfs2 hfs2; |
| 435 | |
| 436 | /* Wait for the mbp_cleared indicator */ |
| 437 | for (count = ME_RETRY; count > 0; --count) { |
| 438 | pci_read_dword_ptr(dev, &hfs2, PCI_ME_HFS2); |
| 439 | if (hfs2.mbp_cleared) |
| 440 | break; |
| 441 | udelay(ME_DELAY); |
| 442 | } |
| 443 | |
| 444 | if (count == 0) { |
| 445 | printk(BIOS_WARNING, "ME: Timeout waiting for mbp_cleared\n"); |
| 446 | intel_me_mbp_give_up(dev); |
| 447 | } else { |
| 448 | printk(BIOS_INFO, "ME: MBP cleared\n"); |
| 449 | } |
| 450 | } |
| 451 | |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 452 | static void __unused me_print_fw_version(mbp_fw_version_name *vers_name) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 453 | { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 454 | if (!vers_name) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 455 | printk(BIOS_ERR, "ME: mbp missing version report\n"); |
| 456 | return; |
| 457 | } |
| 458 | |
| 459 | printk(BIOS_DEBUG, "ME: found version %d.%d.%d.%d\n", |
| 460 | vers_name->major_version, vers_name->minor_version, |
| 461 | vers_name->hotfix_version, vers_name->build_version); |
| 462 | } |
| 463 | |
Edward O'Callaghan | 7bf4f48 | 2014-06-17 15:12:09 +1000 | [diff] [blame] | 464 | static inline void print_cap(const char *name, int state) |
| 465 | { |
| 466 | printk(BIOS_DEBUG, "ME Capability: %-41s : %sabled\n", |
| 467 | name, state ? " en" : "dis"); |
| 468 | } |
| 469 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 470 | /* Get ME Firmware Capabilities */ |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 471 | static int mkhi_get_fwcaps(mbp_mefwcaps *cap) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 472 | { |
| 473 | u32 rule_id = 0; |
| 474 | struct me_fwcaps cap_msg; |
| 475 | struct mkhi_header mkhi = { |
| 476 | .group_id = MKHI_GROUP_ID_FWCAPS, |
| 477 | .command = MKHI_FWCAPS_GET_RULE, |
| 478 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 479 | |
| 480 | /* Send request and wait for response */ |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 481 | if (mei_sendrecv_mkhi(&mkhi, &rule_id, sizeof(u32), |
| 482 | &cap_msg, sizeof(cap_msg)) < 0) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 483 | printk(BIOS_ERR, "ME: GET FWCAPS message failed\n"); |
| 484 | return -1; |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 485 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 486 | *cap = cap_msg.caps_sku; |
| 487 | return 0; |
| 488 | } |
| 489 | |
| 490 | /* Get ME Firmware Capabilities */ |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 491 | static void __unused me_print_fwcaps(mbp_mefwcaps *cap) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 492 | { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 493 | mbp_mefwcaps local_caps; |
| 494 | if (!cap) { |
| 495 | cap = &local_caps; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 496 | printk(BIOS_ERR, "ME: mbp missing fwcaps report\n"); |
| 497 | if (mkhi_get_fwcaps(cap)) |
| 498 | return; |
| 499 | } |
| 500 | |
| 501 | print_cap("Full Network manageability", cap->full_net); |
| 502 | print_cap("Regular Network manageability", cap->std_net); |
| 503 | print_cap("Manageability", cap->manageability); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 504 | print_cap("IntelR Anti-Theft (AT)", cap->intel_at); |
| 505 | print_cap("IntelR Capability Licensing Service (CLS)", cap->intel_cls); |
| 506 | print_cap("IntelR Power Sharing Technology (MPC)", cap->intel_mpc); |
| 507 | print_cap("ICC Over Clocking", cap->icc_over_clocking); |
Edward O'Callaghan | 7bf4f48 | 2014-06-17 15:12:09 +1000 | [diff] [blame] | 508 | print_cap("Protected Audio Video Path (PAVP)", cap->pavp); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 509 | print_cap("IPV6", cap->ipv6); |
| 510 | print_cap("KVM Remote Control (KVM)", cap->kvm); |
| 511 | print_cap("Outbreak Containment Heuristic (OCH)", cap->och); |
| 512 | print_cap("Virtual LAN (VLAN)", cap->vlan); |
| 513 | print_cap("TLS", cap->tls); |
| 514 | print_cap("Wireless LAN (WLAN)", cap->wlan); |
| 515 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 516 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 517 | /* Send END OF POST message to the ME */ |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 518 | static int __unused mkhi_end_of_post(void) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 519 | { |
| 520 | struct mkhi_header mkhi = { |
| 521 | .group_id = MKHI_GROUP_ID_GEN, |
| 522 | .command = MKHI_END_OF_POST, |
| 523 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 524 | u32 eop_ack; |
| 525 | |
| 526 | /* Send request and wait for response */ |
Angel Pons | 08e8cab | 2020-06-18 15:20:37 +0200 | [diff] [blame] | 527 | printk(BIOS_NOTICE, "ME: %s\n", __func__); |
Duncan Laurie | 2017b4a | 2013-08-08 15:07:12 -0700 | [diff] [blame] | 528 | if (mei_sendrecv_mkhi(&mkhi, NULL, 0, &eop_ack, sizeof(eop_ack)) < 0) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 529 | printk(BIOS_ERR, "ME: END OF POST message failed\n"); |
| 530 | return -1; |
| 531 | } |
| 532 | |
| 533 | printk(BIOS_INFO, "ME: END OF POST message successful (%d)\n", eop_ack); |
| 534 | return 0; |
| 535 | } |
| 536 | |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 537 | #ifdef __SIMPLE_DEVICE__ |
| 538 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 539 | void intel_me_finalize_smm(void) |
| 540 | { |
| 541 | struct me_hfs hfs; |
| 542 | u32 reg32; |
| 543 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 544 | mei_base_address = (u32 *) |
| 545 | (pci_read_config32(PCH_ME_DEV, PCI_BASE_ADDRESS_0) & ~0xf); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 546 | |
| 547 | /* S3 path will have hidden this device already */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 548 | if (!mei_base_address || mei_base_address == (u32 *)0xfffffff0) |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 549 | return; |
| 550 | |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 551 | /* Wait for ME MBP Cleared indicator */ |
| 552 | intel_me_mbp_clear(PCH_ME_DEV); |
Duncan Laurie | 3d299c4 | 2013-07-19 08:48:05 -0700 | [diff] [blame] | 553 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 554 | /* Make sure ME is in a mode that expects EOP */ |
| 555 | reg32 = pci_read_config32(PCH_ME_DEV, PCI_ME_HFS); |
| 556 | memcpy(&hfs, ®32, sizeof(u32)); |
| 557 | |
| 558 | /* Abort and leave device alone if not normal mode */ |
| 559 | if (hfs.fpt_bad || |
| 560 | hfs.working_state != ME_HFS_CWS_NORMAL || |
| 561 | hfs.operation_mode != ME_HFS_MODE_NORMAL) |
| 562 | return; |
| 563 | |
| 564 | /* Try to send EOP command so ME stops accepting other commands */ |
| 565 | mkhi_end_of_post(); |
| 566 | |
| 567 | /* Make sure IO is disabled */ |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 568 | pci_and_config16(PCH_ME_DEV, PCI_COMMAND, |
| 569 | ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 570 | |
| 571 | /* Hide the PCI device */ |
| 572 | RCBA32_OR(FD2, PCH_DISABLE_MEI1); |
| 573 | } |
| 574 | |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 575 | #else /* !__SIMPLE_DEVICE__ */ |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 576 | |
Edward O'Callaghan | 97ccefd | 2015-01-07 15:53:00 +1100 | [diff] [blame] | 577 | static inline int mei_sendrecv_icc(struct icc_header *icc, |
| 578 | void *req_data, int req_bytes, |
| 579 | void *rsp_data, int rsp_bytes) |
| 580 | { |
| 581 | struct icc_header icc_rsp; |
| 582 | |
| 583 | /* Send header */ |
| 584 | if (mei_send_header(MEI_ADDRESS_ICC, MEI_HOST_ADDRESS, |
| 585 | icc, sizeof(*icc), req_bytes ? 0 : 1) < 0) |
| 586 | return -1; |
| 587 | |
| 588 | /* Send data if available */ |
| 589 | if (req_bytes && mei_send_data(MEI_ADDRESS_ICC, MEI_HOST_ADDRESS, |
| 590 | req_data, req_bytes) < 0) |
| 591 | return -1; |
| 592 | |
| 593 | /* Read header and data, if needed */ |
| 594 | if (rsp_bytes && mei_recv_msg(&icc_rsp, sizeof(icc_rsp), |
| 595 | rsp_data, rsp_bytes) < 0) |
| 596 | return -1; |
| 597 | |
| 598 | return 0; |
| 599 | } |
| 600 | |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 601 | static int me_icc_set_clock_enables(u32 mask) |
| 602 | { |
| 603 | struct icc_clock_enables_msg clk = { |
| 604 | .clock_enables = 0, /* Turn off specified clocks */ |
| 605 | .clock_mask = mask, |
| 606 | .no_response = 1, /* Do not expect response */ |
| 607 | }; |
| 608 | struct icc_header icc = { |
| 609 | .api_version = ICC_API_VERSION_LYNXPOINT, |
| 610 | .icc_command = ICC_SET_CLOCK_ENABLES, |
| 611 | .length = sizeof(clk), |
| 612 | }; |
| 613 | |
| 614 | /* Send request and wait for response */ |
| 615 | if (mei_sendrecv_icc(&icc, &clk, sizeof(clk), NULL, 0) < 0) { |
| 616 | printk(BIOS_ERR, "ME: ICC SET CLOCK ENABLES message failed\n"); |
| 617 | return -1; |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 618 | } |
| 619 | |
Elyes HAOUAS | 54f9424 | 2018-10-25 10:57:39 +0200 | [diff] [blame] | 620 | printk(BIOS_INFO, "ME: ICC SET CLOCK ENABLES 0x%08x\n", mask); |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 621 | return 0; |
| 622 | } |
| 623 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 624 | /* Determine the path that we should take based on ME status */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 625 | static me_bios_path intel_me_path(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 626 | { |
| 627 | me_bios_path path = ME_DISABLE_BIOS_PATH; |
| 628 | struct me_hfs hfs; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 629 | struct me_hfs2 hfs2; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 630 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 631 | pci_read_dword_ptr(dev, &hfs, PCI_ME_HFS); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 632 | pci_read_dword_ptr(dev, &hfs2, PCI_ME_HFS2); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 633 | |
| 634 | /* Check and dump status */ |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 635 | intel_me_status(&hfs, &hfs2); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 636 | |
| 637 | /* Check Current Working State */ |
| 638 | switch (hfs.working_state) { |
| 639 | case ME_HFS_CWS_NORMAL: |
| 640 | path = ME_NORMAL_BIOS_PATH; |
| 641 | break; |
| 642 | case ME_HFS_CWS_REC: |
| 643 | path = ME_RECOVERY_BIOS_PATH; |
| 644 | break; |
| 645 | default: |
| 646 | path = ME_DISABLE_BIOS_PATH; |
| 647 | break; |
| 648 | } |
| 649 | |
| 650 | /* Check Current Operation Mode */ |
| 651 | switch (hfs.operation_mode) { |
| 652 | case ME_HFS_MODE_NORMAL: |
| 653 | break; |
| 654 | case ME_HFS_MODE_DEBUG: |
| 655 | case ME_HFS_MODE_DIS: |
| 656 | case ME_HFS_MODE_OVER_JMPR: |
| 657 | case ME_HFS_MODE_OVER_MEI: |
| 658 | default: |
| 659 | path = ME_DISABLE_BIOS_PATH; |
| 660 | break; |
| 661 | } |
| 662 | |
| 663 | /* Check for any error code and valid firmware and MBP */ |
| 664 | if (hfs.error_code || hfs.fpt_bad) |
| 665 | path = ME_ERROR_BIOS_PATH; |
| 666 | |
| 667 | /* Check if the MBP is ready */ |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 668 | if (!hfs2.mbp_rdy) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 669 | printk(BIOS_CRIT, "%s: mbp is not ready!\n", |
Angel Pons | 08e8cab | 2020-06-18 15:20:37 +0200 | [diff] [blame] | 670 | __func__); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 671 | path = ME_ERROR_BIOS_PATH; |
| 672 | } |
| 673 | |
Kyösti Mälkki | be5317f | 2019-11-06 12:07:21 +0200 | [diff] [blame] | 674 | if (CONFIG(ELOG) && path != ME_NORMAL_BIOS_PATH) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 675 | struct elog_event_data_me_extended data = { |
| 676 | .current_working_state = hfs.working_state, |
| 677 | .operation_state = hfs.operation_state, |
| 678 | .operation_mode = hfs.operation_mode, |
| 679 | .error_code = hfs.error_code, |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 680 | .progress_code = hfs2.progress_code, |
| 681 | .current_pmevent = hfs2.current_pmevent, |
| 682 | .current_state = hfs2.current_state, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 683 | }; |
| 684 | elog_add_event_byte(ELOG_TYPE_MANAGEMENT_ENGINE, path); |
| 685 | elog_add_event_raw(ELOG_TYPE_MANAGEMENT_ENGINE_EXT, |
| 686 | &data, sizeof(data)); |
| 687 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 688 | |
| 689 | return path; |
| 690 | } |
| 691 | |
| 692 | /* Prepare ME for MEI messages */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 693 | static int intel_mei_setup(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 694 | { |
| 695 | struct resource *res; |
| 696 | struct mei_csr host; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 697 | |
| 698 | /* Find the MMIO base for the ME interface */ |
| 699 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 700 | if (!res || res->base == 0 || res->size == 0) { |
| 701 | printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); |
| 702 | return -1; |
| 703 | } |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 704 | mei_base_address = (u32 *)(uintptr_t)res->base; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 705 | |
| 706 | /* Ensure Memory and Bus Master bits are set */ |
Angel Pons | d5d4fbc | 2020-05-31 01:03:59 +0200 | [diff] [blame] | 707 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 708 | |
| 709 | /* Clean up status for next message */ |
| 710 | read_host_csr(&host); |
| 711 | host.interrupt_generate = 1; |
| 712 | host.ready = 1; |
| 713 | host.reset = 0; |
| 714 | write_host_csr(&host); |
| 715 | |
| 716 | return 0; |
| 717 | } |
| 718 | |
| 719 | /* Read the Extend register hash of ME firmware */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 720 | static int intel_me_extend_valid(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 721 | { |
| 722 | struct me_heres status; |
| 723 | u32 extend[8] = {0}; |
| 724 | int i, count = 0; |
| 725 | |
| 726 | pci_read_dword_ptr(dev, &status, PCI_ME_HERES); |
| 727 | if (!status.extend_feature_present) { |
| 728 | printk(BIOS_ERR, "ME: Extend Feature not present\n"); |
| 729 | return -1; |
| 730 | } |
| 731 | |
| 732 | if (!status.extend_reg_valid) { |
| 733 | printk(BIOS_ERR, "ME: Extend Register not valid\n"); |
| 734 | return -1; |
| 735 | } |
| 736 | |
| 737 | switch (status.extend_reg_algorithm) { |
| 738 | case PCI_ME_EXT_SHA1: |
| 739 | count = 5; |
| 740 | printk(BIOS_DEBUG, "ME: Extend SHA-1: "); |
| 741 | break; |
| 742 | case PCI_ME_EXT_SHA256: |
| 743 | count = 8; |
| 744 | printk(BIOS_DEBUG, "ME: Extend SHA-256: "); |
| 745 | break; |
| 746 | default: |
| 747 | printk(BIOS_ERR, "ME: Extend Algorithm %d unknown\n", |
| 748 | status.extend_reg_algorithm); |
| 749 | return -1; |
| 750 | } |
| 751 | |
| 752 | for (i = 0; i < count; ++i) { |
| 753 | extend[i] = pci_read_config32(dev, PCI_ME_HER(i)); |
| 754 | printk(BIOS_DEBUG, "%08x", extend[i]); |
| 755 | } |
| 756 | printk(BIOS_DEBUG, "\n"); |
| 757 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 758 | #if CONFIG(CHROMEOS) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 759 | /* Save hash in NVS for the OS to verify */ |
| 760 | chromeos_set_me_hash(extend, count); |
| 761 | #endif |
| 762 | |
| 763 | return 0; |
| 764 | } |
| 765 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 766 | /* Check whether ME is present and do basic init */ |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 767 | static void intel_me_init(struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 768 | { |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 769 | struct southbridge_intel_lynxpoint_config *config = dev->chip_info; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 770 | me_bios_path path = intel_me_path(dev); |
| 771 | me_bios_payload mbp_data; |
| 772 | |
| 773 | /* Do initial setup and determine the BIOS path */ |
| 774 | printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_bios_path_values[path]); |
| 775 | |
Duncan Laurie | 8056dc6 | 2013-07-22 08:47:43 -0700 | [diff] [blame] | 776 | if (path == ME_NORMAL_BIOS_PATH) { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 777 | /* Validate the extend register */ |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 778 | intel_me_extend_valid(dev); |
| 779 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 780 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 781 | memset(&mbp_data, 0, sizeof(mbp_data)); |
| 782 | |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 783 | /* |
| 784 | * According to the ME9 BWG, BIOS is required to fetch MBP data in |
| 785 | * all boot flows except S3 Resume. |
| 786 | */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 787 | |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 788 | /* Prepare MEI MMIO interface */ |
| 789 | if (intel_mei_setup(dev) < 0) |
| 790 | return; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 791 | |
Duncan Laurie | 144f7b2 | 2013-05-01 11:27:58 -0700 | [diff] [blame] | 792 | if (intel_me_read_mbp(&mbp_data, dev)) |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 793 | return; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 794 | |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 795 | if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) { |
| 796 | me_print_fw_version(mbp_data.fw_version_name); |
Duncan Laurie | 144f7b2 | 2013-05-01 11:27:58 -0700 | [diff] [blame] | 797 | |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 798 | if (CONFIG(DEBUG_INTEL_ME)) |
| 799 | me_print_fwcaps(mbp_data.fw_capabilities); |
| 800 | |
| 801 | if (mbp_data.plat_time) { |
| 802 | printk(BIOS_DEBUG, "ME: Wake Event to ME Reset: %u ms\n", |
| 803 | mbp_data.plat_time->wake_event_mrst_time_ms); |
| 804 | printk(BIOS_DEBUG, "ME: ME Reset to Platform Reset: %u ms\n", |
| 805 | mbp_data.plat_time->mrst_pltrst_time_ms); |
| 806 | printk(BIOS_DEBUG, "ME: Platform Reset to CPU Reset: %u ms\n", |
| 807 | mbp_data.plat_time->pltrst_cpurst_time_ms); |
| 808 | } |
Duncan Laurie | 144f7b2 | 2013-05-01 11:27:58 -0700 | [diff] [blame] | 809 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 810 | |
Duncan Laurie | 0dc0d13 | 2013-08-08 15:31:51 -0700 | [diff] [blame] | 811 | /* Set clock enables according to devicetree */ |
| 812 | if (config && config->icc_clock_disable) |
| 813 | me_icc_set_clock_enables(config->icc_clock_disable); |
| 814 | |
Duncan Laurie | af98062 | 2013-07-18 23:02:18 -0700 | [diff] [blame] | 815 | /* |
| 816 | * Leave the ME unlocked. It will be locked via SMI command later. |
| 817 | */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 818 | } |
| 819 | |
Elyes HAOUAS | 1dcd8db | 2018-12-05 10:59:42 +0100 | [diff] [blame] | 820 | static void intel_me_enable(struct device *dev) |
Duncan Laurie | 8056dc6 | 2013-07-22 08:47:43 -0700 | [diff] [blame] | 821 | { |
Duncan Laurie | 8056dc6 | 2013-07-22 08:47:43 -0700 | [diff] [blame] | 822 | /* Avoid talking to the device in S3 path */ |
Kyösti Mälkki | c3ed886 | 2014-06-19 19:50:51 +0300 | [diff] [blame] | 823 | if (acpi_is_wakeup_s3()) { |
Duncan Laurie | 8056dc6 | 2013-07-22 08:47:43 -0700 | [diff] [blame] | 824 | dev->enabled = 0; |
| 825 | pch_disable_devfn(dev); |
| 826 | } |
Duncan Laurie | 8056dc6 | 2013-07-22 08:47:43 -0700 | [diff] [blame] | 827 | } |
| 828 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 829 | static struct device_operations device_ops = { |
| 830 | .read_resources = pci_dev_read_resources, |
| 831 | .set_resources = pci_dev_set_resources, |
| 832 | .enable_resources = pci_dev_enable_resources, |
Duncan Laurie | 8056dc6 | 2013-07-22 08:47:43 -0700 | [diff] [blame] | 833 | .enable = intel_me_enable, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 834 | .init = intel_me_init, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 835 | .ops_pci = &pci_dev_ops_pci, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 836 | }; |
| 837 | |
Duncan Laurie | 26e7dd7 | 2012-12-19 09:12:31 -0800 | [diff] [blame] | 838 | static const unsigned short pci_device_ids[] = { |
Felix Singer | 4ea08f9 | 2020-11-20 12:56:44 +0000 | [diff] [blame] | 839 | PCI_DEVICE_ID_INTEL_LPT_H_MEI, |
| 840 | PCI_DEVICE_ID_INTEL_LPT_LP_MEI, |
Duncan Laurie | 26e7dd7 | 2012-12-19 09:12:31 -0800 | [diff] [blame] | 841 | 0 |
| 842 | }; |
| 843 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 844 | static const struct pci_driver intel_me __pci_driver = { |
Angel Pons | b4b4e32 | 2020-06-21 12:47:13 +0200 | [diff] [blame] | 845 | .ops = &device_ops, |
| 846 | .vendor = PCI_VENDOR_ID_INTEL, |
| 847 | .devices = pci_device_ids, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 848 | }; |
| 849 | |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 850 | #endif /* !__SIMPLE_DEVICE__ */ |
| 851 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 852 | /****************************************************************************** |
| 853 | * */ |
| 854 | static u32 me_to_host_words_pending(void) |
| 855 | { |
| 856 | struct mei_csr me; |
| 857 | read_me_csr(&me); |
| 858 | if (!me.ready) |
| 859 | return 0; |
| 860 | return (me.buffer_write_ptr - me.buffer_read_ptr) & |
| 861 | (me.buffer_depth - 1); |
| 862 | } |
| 863 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 864 | struct mbp_payload { |
| 865 | mbp_header header; |
| 866 | u32 data[0]; |
| 867 | }; |
| 868 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 869 | /* |
| 870 | * mbp seems to be following its own flow, let's retrieve it in a dedicated |
| 871 | * function. |
| 872 | */ |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 873 | static int __unused intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 874 | { |
| 875 | mbp_header mbp_hdr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 876 | u32 me2host_pending; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 877 | struct mei_csr host; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 878 | struct me_hfs2 hfs2; |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 879 | struct mbp_payload *mbp; |
| 880 | int i; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 881 | |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 882 | #ifdef __SIMPLE_DEVICE__ |
| 883 | pci_read_dword_ptr(PCI_BDF(dev), &hfs2, PCI_ME_HFS2); |
| 884 | #else |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 885 | pci_read_dword_ptr(dev, &hfs2, PCI_ME_HFS2); |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 886 | #endif |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 887 | |
| 888 | if (!hfs2.mbp_rdy) { |
| 889 | printk(BIOS_ERR, "ME: MBP not ready\n"); |
| 890 | goto mbp_failure; |
| 891 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 892 | |
| 893 | me2host_pending = me_to_host_words_pending(); |
| 894 | if (!me2host_pending) { |
| 895 | printk(BIOS_ERR, "ME: no mbp data!\n"); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 896 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 897 | } |
| 898 | |
| 899 | /* we know for sure that at least the header is there */ |
| 900 | mei_read_dword_ptr(&mbp_hdr, MEI_ME_CB_RW); |
| 901 | |
| 902 | if ((mbp_hdr.num_entries > (mbp_hdr.mbp_size / 2)) || |
| 903 | (me2host_pending < mbp_hdr.mbp_size)) { |
| 904 | printk(BIOS_ERR, "ME: mbp of %d entries, total size %d words" |
| 905 | " buffer contains %d words\n", |
| 906 | mbp_hdr.num_entries, mbp_hdr.mbp_size, |
| 907 | me2host_pending); |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 908 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 909 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 910 | mbp = malloc(mbp_hdr.mbp_size * sizeof(u32)); |
| 911 | if (!mbp) |
| 912 | goto mbp_failure; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 913 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 914 | mbp->header = mbp_hdr; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 915 | me2host_pending--; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 916 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 917 | i = 0; |
| 918 | while (i != me2host_pending) { |
| 919 | mei_read_dword_ptr(&mbp->data[i], MEI_ME_CB_RW); |
| 920 | i++; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 921 | } |
| 922 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 923 | /* Signal to the ME that the host has finished reading the MBP. */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 924 | read_host_csr(&host); |
| 925 | host.interrupt_generate = 1; |
| 926 | write_host_csr(&host); |
| 927 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 928 | /* Dump out the MBP contents. */ |
Kyösti Mälkki | c86fc8e | 2019-11-06 06:32:27 +0200 | [diff] [blame] | 929 | if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) { |
| 930 | printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n", |
| 931 | mbp->header.num_entries, mbp->header.mbp_size); |
| 932 | if (CONFIG(DEBUG_INTEL_ME)) { |
| 933 | for (i = 0; i < mbp->header.mbp_size - 1; i++) { |
| 934 | printk(BIOS_INFO, "ME MBP: %04x: 0x%08x\n", i, mbp->data[i]); |
| 935 | } |
| 936 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 937 | } |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 938 | |
| 939 | #define ASSIGN_FIELD_PTR(field_,val_) \ |
| 940 | { \ |
| 941 | mbp_data->field_ = (typeof(mbp_data->field_))(void *)val_; \ |
| 942 | break; \ |
| 943 | } |
| 944 | /* Setup the pointers in the me_bios_payload structure. */ |
| 945 | for (i = 0; i < mbp->header.mbp_size - 1;) { |
| 946 | mbp_item_header *item = (void *)&mbp->data[i]; |
| 947 | |
Elyes HAOUAS | f9de5a4 | 2018-05-03 17:21:02 +0200 | [diff] [blame] | 948 | switch (MBP_MAKE_IDENT(item->app_id, item->item_id)) { |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 949 | case MBP_IDENT(KERNEL, FW_VER): |
| 950 | ASSIGN_FIELD_PTR(fw_version_name, &mbp->data[i+1]); |
| 951 | |
| 952 | case MBP_IDENT(ICC, PROFILE): |
| 953 | ASSIGN_FIELD_PTR(icc_profile, &mbp->data[i+1]); |
| 954 | |
| 955 | case MBP_IDENT(INTEL_AT, STATE): |
| 956 | ASSIGN_FIELD_PTR(at_state, &mbp->data[i+1]); |
| 957 | |
| 958 | case MBP_IDENT(KERNEL, FW_CAP): |
| 959 | ASSIGN_FIELD_PTR(fw_capabilities, &mbp->data[i+1]); |
| 960 | |
| 961 | case MBP_IDENT(KERNEL, ROM_BIST): |
| 962 | ASSIGN_FIELD_PTR(rom_bist_data, &mbp->data[i+1]); |
| 963 | |
| 964 | case MBP_IDENT(KERNEL, PLAT_KEY): |
| 965 | ASSIGN_FIELD_PTR(platform_key, &mbp->data[i+1]); |
| 966 | |
| 967 | case MBP_IDENT(KERNEL, FW_TYPE): |
| 968 | ASSIGN_FIELD_PTR(fw_plat_type, &mbp->data[i+1]); |
| 969 | |
| 970 | case MBP_IDENT(KERNEL, MFS_FAILURE): |
| 971 | ASSIGN_FIELD_PTR(mfsintegrity, &mbp->data[i+1]); |
| 972 | |
Duncan Laurie | 144f7b2 | 2013-05-01 11:27:58 -0700 | [diff] [blame] | 973 | case MBP_IDENT(KERNEL, PLAT_TIME): |
| 974 | ASSIGN_FIELD_PTR(plat_time, &mbp->data[i+1]); |
| 975 | |
| 976 | case MBP_IDENT(NFC, SUPPORT_DATA): |
| 977 | ASSIGN_FIELD_PTR(nfc_data, &mbp->data[i+1]); |
| 978 | |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 979 | default: |
Duncan Laurie | 0b3cd36 | 2013-08-08 15:40:01 -0700 | [diff] [blame] | 980 | printk(BIOS_ERR, "ME MBP: unknown item 0x%x @ " |
| 981 | "dw offset 0x%x\n", mbp->data[i], i); |
Aaron Durbin | be98524 | 2012-12-12 12:40:33 -0600 | [diff] [blame] | 982 | break; |
| 983 | } |
| 984 | i += item->length; |
| 985 | } |
| 986 | #undef ASSIGN_FIELD_PTR |
| 987 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 988 | return 0; |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 989 | |
| 990 | mbp_failure: |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 991 | #ifdef __SIMPLE_DEVICE__ |
| 992 | intel_me_mbp_give_up(PCI_BDF(dev)); |
| 993 | #else |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 994 | intel_me_mbp_give_up(dev); |
Kyösti Mälkki | 21d6a27 | 2019-11-05 18:50:38 +0200 | [diff] [blame] | 995 | #endif |
Aaron Durbin | 9aa031e | 2012-11-02 09:16:46 -0500 | [diff] [blame] | 996 | return -1; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 997 | } |