blob: 656fa2ee50b39956ad90bf559a5c3c4637503a7a [file] [log] [blame]
Felix Held4a8cd722020-04-18 22:26:39 +02001# SPDX-License-Identifier: BSD-3-Clause
Felix Held4a8cd722020-04-18 22:26:39 +02002
Marshall Dawsond7868432019-11-25 11:47:32 -07003ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
Marc Jones21cde8b2017-05-07 16:47:36 -06004
5subdirs-y += ../../../cpu/amd/mtrr/
Marc Jones24484842017-05-04 21:17:45 -06006
Felix Heldfbfb9062021-12-15 19:35:00 +01007bootblock-y += aoac.c
Felix Held91ef9252021-01-12 23:44:05 +01008bootblock-y += uart.c
Martin Rothc450fbe2017-10-02 13:46:50 -06009bootblock-y += BiosCallOuts.c
Felix Held0aada3c2020-11-24 22:55:53 +010010bootblock-y += bootblock.c
Felix Held2d020e12021-12-15 20:52:10 +010011bootblock-y += early_fch.c
Chris Ching2269a3c2018-02-05 16:46:41 -070012bootblock-y += gpio.c
Chris Ching6fc39d42017-12-20 16:06:03 -070013bootblock-y += i2c.c
Arthur Heymansc63649b2019-11-16 12:13:03 +010014bootblock-y += enable_usbdebug.c
Aaron Durbin24079322018-01-23 10:53:05 -070015bootblock-y += monotonic_timer.c
Marshall Dawson9df969a2017-07-25 18:46:46 -060016bootblock-y += tsc_freq.c
17
Martin Rothc450fbe2017-10-02 13:46:50 -060018romstage-y += BiosCallOuts.c
Chris Ching6fc39d42017-12-20 16:06:03 -070019romstage-y += i2c.c
Marshall Dawson9df969a2017-07-25 18:46:46 -060020romstage-y += romstage.c
Arthur Heymansc63649b2019-11-16 12:13:03 +010021romstage-y += enable_usbdebug.c
Felix Held25aa5602021-12-15 20:52:10 +010022romstage-y += fch_agesa.c
Marc Jonesa1b07932017-06-22 21:39:03 -060023romstage-y += gpio.c
Aaron Durbin24079322018-01-23 10:53:05 -070024romstage-y += monotonic_timer.c
Marc Jones24484842017-05-04 21:17:45 -060025romstage-y += smbus_spd.c
Kyösti Mälkki1dbf3102019-08-03 21:28:40 +030026romstage-y += memmap.c
Felix Held91ef9252021-01-12 23:44:05 +010027romstage-y += uart.c
Marshall Dawson786bd5d2017-06-16 10:10:17 -060028romstage-y += tsc_freq.c
Felix Helddba32292020-03-31 23:54:44 +020029romstage-y += psp.c
Marc Jones24484842017-05-04 21:17:45 -060030
Chris Ching2269a3c2018-02-05 16:46:41 -070031verstage-y += gpio.c
Chris Ching6fc39d42017-12-20 16:06:03 -070032verstage-y += i2c.c
Aaron Durbin24079322018-01-23 10:53:05 -070033verstage-y += monotonic_timer.c
Felix Held91ef9252021-01-12 23:44:05 +010034verstage-y += uart.c
Marshall Dawsone7557de2017-06-09 16:35:14 -060035verstage-y += tsc_freq.c
36
Aaron Durbin24079322018-01-23 10:53:05 -070037postcar-y += monotonic_timer.c
Felix Held91ef9252021-01-12 23:44:05 +010038postcar-y += uart.c
Kyösti Mälkki1dbf3102019-08-03 21:28:40 +030039postcar-y += memmap.c
Philipp Deppenwiese2af17af2018-11-26 15:04:46 +010040postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
Philipp Deppenwiese66f9a092018-11-08 10:59:40 +010041postcar-y += tsc_freq.c
Marshall Dawson18b477e2017-09-21 12:27:12 -060042
Martin Rothc450fbe2017-10-02 13:46:50 -060043ramstage-y += BiosCallOuts.c
Chris Ching6fc39d42017-12-20 16:06:03 -070044ramstage-y += i2c.c
Marc Jones24484842017-05-04 21:17:45 -060045ramstage-y += chip.c
Marshall Dawsona7bfbbe2017-09-13 17:24:53 -060046ramstage-y += cpu.c
Marshall Dawson0b4a1e22018-09-04 13:11:42 -060047ramstage-y += mca.c
Arthur Heymansc63649b2019-11-16 12:13:03 +010048ramstage-y += enable_usbdebug.c
Marc Jones257db582017-06-18 17:33:30 -060049ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
Felix Held2d020e12021-12-15 20:52:10 +010050ramstage-y += fch.c
Felix Held25aa5602021-12-15 20:52:10 +010051ramstage-y += fch_agesa.c
Marc Jones24484842017-05-04 21:17:45 -060052ramstage-y += gpio.c
Felix Held1d66ad12023-03-27 14:39:29 +020053ramstage-y += graphics.c
Aaron Durbin24079322018-01-23 10:53:05 -070054ramstage-y += monotonic_timer.c
Marc Jones1587dc82017-05-15 18:55:11 -060055ramstage-y += northbridge.c
Marc Jones24484842017-05-04 21:17:45 -060056ramstage-y += sata.c
Kyösti Mälkki1dbf3102019-08-03 21:28:40 +030057ramstage-y += memmap.c
Felix Held91ef9252021-01-12 23:44:05 +010058ramstage-y += uart.c
Marc Jones24484842017-05-04 21:17:45 -060059ramstage-y += usb.c
Marshall Dawson786bd5d2017-06-16 10:10:17 -060060ramstage-y += tsc_freq.c
Felix Helddba32292020-03-31 23:54:44 +020061ramstage-y += psp.c
Marc Jones24484842017-05-04 21:17:45 -060062
Kyösti Mälkki9db39872019-12-13 18:11:05 +020063all-y += reset.c
64
Aaron Durbin24079322018-01-23 10:53:05 -070065smm-y += monotonic_timer.c
Marshall Dawson6746d372017-09-27 13:32:00 -060066smm-y += smihandler.c
Marshall Dawson6746d372017-09-27 13:32:00 -060067smm-y += tsc_freq.c
Marshall Dawsonabac64d2017-09-27 13:26:23 -060068smm-$(CONFIG_DEBUG_SMI) += uart.c
Marc Jones85aec312018-07-14 17:08:27 -060069smm-y += gpio.c
Felix Helddba32292020-03-31 23:54:44 +020070smm-y += psp.c
Marc Jones24484842017-05-04 21:17:45 -060071
Marc Jones24484842017-05-04 21:17:45 -060072CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include
73CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/acpi
74
Martin Roth6d8ef242017-09-08 14:39:35 -060075# ROMSIG Normally At ROMBASE + 0x20000
76# Overridden by CONFIG_AMD_FWM_POSITION_INDEX
Marc Jones24484842017-05-04 21:17:45 -060077# +-----------+---------------+----------------+------------+
78# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
79# +-----------+---------------+----------------+------------+
80# |PSPDIR ADDR|
81# +-----------+
82#
83# EC ROM should be 64K aligned.
Martin Roth6d8ef242017-09-08 14:39:35 -060084STONEYRIDGE_FWM_POSITION=$(call int-add, \
85 $(call int-subtract, 0xffffffff \
86 $(call int-shift-left, \
87 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
Marc Jones24484842017-05-04 21:17:45 -060088
89### 0
Zheng Baoc5e28ab2020-10-28 11:38:09 +080090
Zheng Bao3384e4a2020-10-06 12:03:11 +080091FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
Zheng Baoc5e28ab2020-10-28 11:38:09 +080092
Zheng Bao3384e4a2020-10-06 12:03:11 +080093ifneq ($(FIRMWARE_LOCATION),)
Marshall Dawson12294d02019-11-25 07:21:18 -070094
95ifeq ($(CONFIG_AMD_APU_STONEYRIDGE),y)
96FIRMWARE_TYPE=ST
97else
Marshall Dawson12294d02019-11-25 07:21:18 -070098ifeq ($(CONFIG_AMD_APU_MERLINFALCON),y)
Richard Spiegel1bc578a2019-06-18 18:19:47 -070099FIRMWARE_TYPE=CZ
100else
Marshall Dawsone1988f52019-11-25 11:15:35 -0700101ifeq ($(CONFIG_AMD_APU_PRAIRIEFALCON),y)
102FIRMWARE_TYPE=ST
103else
Marshall Dawson91e7fe72019-11-24 17:19:19 -0700104$(error soc/amd/stoneyridge: Unusable FIRMWARE_TYPE)
Marshall Dawson12294d02019-11-25 07:21:18 -0700105
Marshall Dawsone1988f52019-11-25 11:15:35 -0700106endif # CONFIG_AMD_APU_PRAIRIEFALCON
Marshall Dawson12294d02019-11-25 07:21:18 -0700107endif # CONFIG_AMD_APU_MERLINFALCON
108endif # CONFIG_AMD_APU_STONEYRIDGE
Marc Jones24484842017-05-04 21:17:45 -0600109
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800110add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
Marc Jones24484842017-05-04 21:17:45 -0600111
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800112OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
113OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE), --gec)
Marc Jones24484842017-05-04 21:17:45 -0600114
Zheng Bao3384e4a2020-10-06 12:03:11 +0800115SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW1_SUB0_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
116SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW1_SUB1_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
Marc Jones24484842017-05-04 21:17:45 -0600117
Zheng Bao3384e4a2020-10-06 12:03:11 +0800118SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW2_SUB0_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
119SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW2_SUB1_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
Marc Jones24484842017-05-04 21:17:45 -0600120
Richard Spiegel1bc578a2019-06-18 18:19:47 -0700121ifeq ("$(wildcard $(SMUFWM_FN_FILE))","")
122SMUFWM_FN_FILE=
123SMUFIRMWARE2_FN_FILE=
124endif
125
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800126ifeq ($(CONFIG_USE_PSPSECUREOS),y)
127PSP_USE_PSPSECUREOS="--use-pspsecureos"
128endif
129
130OPT_PSP_USE_PSPSECUREOS=$(call strip_quotes, $(PSP_USE_PSPSECUREOS))
131
Zheng Bao570645d2021-11-03 10:25:03 +0800132OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
133OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
134
Marc Jones24484842017-05-04 21:17:45 -0600135$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
Marc Jones24484842017-05-04 21:17:45 -0600136 $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800137 $(DEP_FILES) \
Marc Jones24484842017-05-04 21:17:45 -0600138 $(AMDFWTOOL)
139 rm -f $@
140 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
141 $(AMDFWTOOL) \
142 $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
Marc Jones24484842017-05-04 21:17:45 -0600143 $(OPT_STONEYRIDGE_GEC_FWM_FILE) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800144 $(OPT_PSP_USE_PSPSECUREOS) \
Zheng Bao570645d2021-11-03 10:25:03 +0800145 $(OPT_EFS_SPI_READ_MODE) \
146 $(OPT_EFS_SPI_SPEED) \
Martin Roth0acf59d2023-03-08 15:18:24 -0700147 $(OPT_DEBUG_AMDFWTOOL) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800148 --config $(CONFIG_AMDFW_CONFIG_FILE) \
Marc Jones24484842017-05-04 21:17:45 -0600149 --flashsize $(CONFIG_ROM_SIZE) \
Martin Rotha75d6802017-10-03 14:24:07 -0600150 --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \
Marc Jones24484842017-05-04 21:17:45 -0600151 --output $@
152
153ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
Marc Jones24484842017-05-04 21:17:45 -0600154
Martin Roth30f9b952017-10-03 15:54:45 -0600155# Calculate firmware position inside the ROM
156STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \
157 $(call int-subtract, $(CONFIG_ROM_SIZE) \
158 $(call int-shift-left, \
159 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
160
Patrick Georgi2cc5bcb2021-01-13 09:15:07 +0100161$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
Martin Roth30f9b952017-10-03 15:54:45 -0600162 printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
163 "$(STONEYRIDGE_FWM_ROM_POSITION)"
Patrick Georgi0b7d3a12021-01-13 09:16:41 +0100164 dd if=$(obj)/amdfw.rom \
Arthur Heymans8ceef402021-07-06 16:20:09 +0200165 of=$< conv=notrunc bs=1 \
Martin Roth30f9b952017-10-03 15:54:45 -0600166 seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1
Marc Jones24484842017-05-04 21:17:45 -0600167
168else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
169
170cbfs-files-y += apu/amdfw
171apu/amdfw-file := $(obj)/amdfw.rom
172apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION)
173apu/amdfw-type := raw
174
175endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
176
Marshall Dawson5f0520a2017-10-30 16:11:45 -0600177ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
178
179cbfs-files-y += smu_fw
180cbfs-files-y += smu_fw2
181smu_fw-type := raw
182smu_fw2-type := raw
183
184ifeq ($(CONFIG_SOC_AMD_SMU_FANLESS),y)
185smu_fw-file := $(SMUFWM_FN_FILE)
186smu_fw2-file := $(SMUFIRMWARE2_FN_FILE)
187else ifeq ($(CONFIG_SOC_AMD_SMU_FANNED),y)
188smu_fw-file := $(SMUFWM_FILE)
189smu_fw2-file := $(SMUFIRMWARE2_FILE)
190else
191$(error "Proper SMU Firmware not selected")
192endif
193
194endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
195
Zheng Bao3384e4a2020-10-06 12:03:11 +0800196else # ifneq ($(FIRMWARE_LOCATION),)
Marshall Dawson91e7fe72019-11-24 17:19:19 -0700197
198warn_no_amdfw:
199 printf "\n\t** WARNING **\n"
200 printf "coreboot has been built with no PSP firmware and "
201 printf "a non-booting image has been generated.\n\n"
202
203PHONY+=warn_no_amdfw
204
205files_added:: warn_no_amdfw
206
Zheng Bao3384e4a2020-10-06 12:03:11 +0800207endif # ifneq ($(FIRMWARE_LOCATION),)
Marshall Dawson91e7fe72019-11-24 17:19:19 -0700208
Marshall Dawsond7868432019-11-25 11:47:32 -0700209endif # ($(CONFIG_SOC_AMD_STONEYRIDGE),y)