Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
| 13 | * Copyright (C) 2005-2007 Stefan Reinauer <stepan@openbios.org> |
| 14 | */ |
| 15 | |
| 16 | /* |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 17 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
| 18 | * |
| 19 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 20 | * David Mosberger-Tang |
| 21 | * |
| 22 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 23 | */ |
| 24 | |
| 25 | #include <console/console.h> |
| 26 | #include <stdlib.h> |
| 27 | #include <stdint.h> |
| 28 | #include <bitops.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 29 | #include <string.h> |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 30 | #include <arch/io.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 31 | #include <device/device.h> |
| 32 | #include <device/pci.h> |
| 33 | #include <device/pci_ids.h> |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 34 | #include <part/hard_reset.h> |
Eric Biederman | 30e143a | 2003-09-01 23:45:32 +0000 | [diff] [blame] | 35 | #include <part/fallback_boot.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 36 | #include <delay.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 37 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 38 | #include <device/hypertransport.h> |
| 39 | #endif |
| 40 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 41 | #include <device/pcix.h> |
| 42 | #endif |
| 43 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 44 | #include <device/pciexp.h> |
| 45 | #endif |
Stefan Reinauer | ec75a57 | 2009-03-16 15:27:00 +0000 | [diff] [blame] | 46 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 47 | #include <device/agp.h> |
| 48 | #endif |
| 49 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 50 | #include <device/cardbus.h> |
| 51 | #endif |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 52 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 53 | uint8_t pci_moving_config8(struct device *dev, unsigned reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 54 | { |
| 55 | uint8_t value, ones, zeroes; |
| 56 | value = pci_read_config8(dev, reg); |
| 57 | |
| 58 | pci_write_config8(dev, reg, 0xff); |
| 59 | ones = pci_read_config8(dev, reg); |
| 60 | |
| 61 | pci_write_config8(dev, reg, 0x00); |
| 62 | zeroes = pci_read_config8(dev, reg); |
| 63 | |
| 64 | pci_write_config8(dev, reg, value); |
| 65 | |
| 66 | return ones ^ zeroes; |
| 67 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 68 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 69 | uint16_t pci_moving_config16(struct device *dev, unsigned reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 70 | { |
| 71 | uint16_t value, ones, zeroes; |
| 72 | value = pci_read_config16(dev, reg); |
| 73 | |
| 74 | pci_write_config16(dev, reg, 0xffff); |
| 75 | ones = pci_read_config16(dev, reg); |
| 76 | |
| 77 | pci_write_config16(dev, reg, 0x0000); |
| 78 | zeroes = pci_read_config16(dev, reg); |
| 79 | |
| 80 | pci_write_config16(dev, reg, value); |
| 81 | |
| 82 | return ones ^ zeroes; |
| 83 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 84 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 85 | uint32_t pci_moving_config32(struct device *dev, unsigned reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 86 | { |
| 87 | uint32_t value, ones, zeroes; |
| 88 | value = pci_read_config32(dev, reg); |
| 89 | |
| 90 | pci_write_config32(dev, reg, 0xffffffff); |
| 91 | ones = pci_read_config32(dev, reg); |
| 92 | |
| 93 | pci_write_config32(dev, reg, 0x00000000); |
| 94 | zeroes = pci_read_config32(dev, reg); |
| 95 | |
| 96 | pci_write_config32(dev, reg, value); |
| 97 | |
| 98 | return ones ^ zeroes; |
| 99 | } |
| 100 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 101 | unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 102 | { |
| 103 | unsigned pos; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 104 | unsigned status; |
| 105 | unsigned reps = 48; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 106 | pos = 0; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 107 | status = pci_read_config16(dev, PCI_STATUS); |
| 108 | if (!(status & PCI_STATUS_CAP_LIST)) { |
| 109 | return 0; |
| 110 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 111 | switch(dev->hdr_type & 0x7f) { |
| 112 | case PCI_HEADER_TYPE_NORMAL: |
| 113 | case PCI_HEADER_TYPE_BRIDGE: |
| 114 | pos = PCI_CAPABILITY_LIST; |
| 115 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 116 | case PCI_HEADER_TYPE_CARDBUS: |
| 117 | pos = PCI_CB_CAPABILITY_LIST; |
| 118 | break; |
| 119 | default: |
| 120 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 121 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 122 | pos = pci_read_config8(dev, pos); |
| 123 | while(reps-- && (pos >= 0x40)) { /* loop through the linked list */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 124 | int this_cap; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 125 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 126 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 127 | printk_spew("Capability: 0x%02x @ 0x%02x\n", cap, pos); |
| 128 | if (this_cap == 0xff) { |
| 129 | break; |
| 130 | } |
| 131 | if (!last && (this_cap == cap)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 132 | return pos; |
| 133 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 134 | if (last == pos) { |
| 135 | last = 0; |
| 136 | } |
| 137 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 138 | } |
| 139 | return 0; |
| 140 | } |
| 141 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 142 | unsigned pci_find_capability(device_t dev, unsigned cap) |
| 143 | { |
| 144 | return pci_find_next_capability(dev, cap, 0); |
| 145 | |
| 146 | } |
| 147 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 148 | /** Given a device and register, read the size of the BAR for that register. |
| 149 | * @param dev Pointer to the device structure |
| 150 | * @param resource Pointer to the resource structure |
| 151 | * @param index Address of the pci configuration register |
| 152 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 153 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 154 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 155 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 156 | unsigned long value, attr; |
| 157 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 158 | |
| 159 | /* Initialize the resources to nothing */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 160 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 161 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 162 | /* Get the initial value */ |
| 163 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 164 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 165 | /* See which bits move */ |
| 166 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 167 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 168 | /* Initialize attr to the bits that do not move */ |
| 169 | attr = value & ~moving; |
| 170 | |
| 171 | /* If it is a 64bit resource look at the high half as well */ |
| 172 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 173 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == PCI_BASE_ADDRESS_MEM_LIMIT_64)) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 174 | { |
| 175 | /* Find the high bits that move */ |
| 176 | moving |= ((resource_t)pci_moving_config32(dev, index + 4)) << 32; |
| 177 | } |
| 178 | /* Find the resource constraints. |
| 179 | * |
| 180 | * Start by finding the bits that move. From there: |
| 181 | * - Size is the least significant bit of the bits that move. |
| 182 | * - Limit is all of the bits that move plus all of the lower bits. |
| 183 | * See PCI Spec 6.2.5.1 ... |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 184 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 185 | limit = 0; |
| 186 | if (moving) { |
| 187 | resource->size = 1; |
| 188 | resource->align = resource->gran = 0; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 189 | while(!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 190 | resource->size <<= 1; |
| 191 | resource->align += 1; |
| 192 | resource->gran += 1; |
| 193 | } |
| 194 | resource->limit = limit = moving | (resource->size - 1); |
| 195 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 196 | /* |
| 197 | * some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 198 | * really size correctly. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 199 | * Example: the acer m7229 has BARs 1-4 normally read-only. |
| 200 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
| 201 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- a |
| 202 | * violation of the spec. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 203 | * We catch this case and ignore it by observing which bits move, |
| 204 | * This also catches the common case unimplemented registers |
| 205 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 206 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 207 | if (moving == 0) { |
| 208 | if (value != 0) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 209 | printk_debug( |
Myles Watson | c4ddbff | 2009-02-09 17:52:54 +0000 | [diff] [blame] | 210 | "%s register %02lx(%08lx), read-only ignoring it\n", |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 211 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 212 | } |
| 213 | resource->flags = 0; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 214 | } |
| 215 | else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 216 | /* An I/O mapped base address */ |
| 217 | attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 218 | resource->flags |= IORESOURCE_IO; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 219 | /* I don't want to deal with 32bit I/O resources */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 220 | resource->limit = 0xffff; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 221 | } |
| 222 | else { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 223 | /* A Memory mapped base address */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 224 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 225 | resource->flags |= IORESOURCE_MEM; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 226 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 227 | resource->flags |= IORESOURCE_PREFETCH; |
| 228 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 229 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 230 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 231 | /* 32bit limit */ |
| 232 | resource->limit = 0xffffffffUL; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 233 | } |
| 234 | else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 235 | /* 1MB limit */ |
| 236 | resource->limit = 0x000fffffUL; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 237 | } |
| 238 | else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 239 | /* 64bit limit */ |
| 240 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 241 | resource->flags |= IORESOURCE_PCI64; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 242 | } |
| 243 | else { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 244 | /* Invalid value */ |
| 245 | resource->flags = 0; |
| 246 | } |
| 247 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 248 | /* Don't let the limit exceed which bits can move */ |
| 249 | if (resource->limit > limit) { |
| 250 | resource->limit = limit; |
| 251 | } |
| 252 | #if 0 |
| 253 | if (resource->flags) { |
| 254 | printk_debug("%s %02x ->", |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 255 | dev_path(dev), resource->index); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 256 | printk_debug(" value: 0x%08Lx zeroes: 0x%08Lx ones: 0x%08Lx attr: %08lx\n", |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 257 | value, zeroes, ones, attr); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 258 | printk_debug( |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 259 | "%s %02x -> size: 0x%08Lx max: 0x%08Lx %s\n ", |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 260 | dev_path(dev), |
| 261 | resource->index, |
| 262 | resource->size, resource->limit, |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 263 | resource_type(resource)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 264 | } |
| 265 | #endif |
| 266 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 267 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 268 | } |
| 269 | |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 270 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 271 | { |
| 272 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 273 | unsigned long value; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 274 | resource_t moving, limit; |
| 275 | |
Li-Ta Lo | bec039c | 2005-01-19 23:19:26 +0000 | [diff] [blame] | 276 | if ((dev->on_mainboard) && (dev->rom_address == 0)) { |
| 277 | //skip it if rom_address is not set in MB Config.lb |
Yinghai Lu | bcde161 | 2005-01-14 05:34:09 +0000 | [diff] [blame] | 278 | return; |
| 279 | } |
| 280 | |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 281 | /* Initialize the resources to nothing */ |
| 282 | resource = new_resource(dev, index); |
| 283 | |
| 284 | /* Get the initial value */ |
| 285 | value = pci_read_config32(dev, index); |
| 286 | |
| 287 | /* See which bits move */ |
| 288 | moving = pci_moving_config32(dev, index); |
| 289 | /* clear the Enable bit */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 290 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 291 | |
| 292 | /* Find the resource constraints. |
| 293 | * |
| 294 | * Start by finding the bits that move. From there: |
| 295 | * - Size is the least significant bit of the bits that move. |
| 296 | * - Limit is all of the bits that move plus all of the lower bits. |
| 297 | * See PCI Spec 6.2.5.1 ... |
| 298 | */ |
| 299 | limit = 0; |
| 300 | |
| 301 | if (moving) { |
| 302 | resource->size = 1; |
| 303 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 304 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 305 | resource->size <<= 1; |
| 306 | resource->align += 1; |
| 307 | resource->gran += 1; |
| 308 | } |
| 309 | resource->limit = limit = moving | (resource->size - 1); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 310 | } |
| 311 | |
| 312 | if (moving == 0) { |
| 313 | if (value != 0) { |
Myles Watson | c4ddbff | 2009-02-09 17:52:54 +0000 | [diff] [blame] | 314 | printk_debug("%s register %02lx(%08lx), read-only ignoring it\n", |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 315 | dev_path(dev), index, value); |
| 316 | } |
| 317 | resource->flags = 0; |
| 318 | } else { |
| 319 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 320 | } |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 321 | |
| 322 | /* for on board device with embedded ROM image, the ROM image is at |
| 323 | * fixed address specified in the Config.lb, the dev->rom_address is |
| 324 | * inited by driver_pci_onboard_ops::enable_dev() */ |
Yinghai Lu | bcde161 | 2005-01-14 05:34:09 +0000 | [diff] [blame] | 325 | if ((dev->on_mainboard) && (dev->rom_address != 0)) { |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 326 | resource->base = dev->rom_address; |
| 327 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | |
| 328 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 329 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 330 | |
| 331 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 332 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 333 | |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 334 | /** Read the base address registers for a given device. |
| 335 | * @param dev Pointer to the dev structure |
| 336 | * @param howmany How many registers to read (6 for device, 2 for bridge) |
| 337 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 338 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 339 | { |
| 340 | unsigned long index; |
| 341 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 342 | for(index = PCI_BASE_ADDRESS_0; (index < PCI_BASE_ADDRESS_0 + (howmany << 2)); ) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 343 | struct resource *resource; |
| 344 | resource = pci_get_resource(dev, index); |
| 345 | index += (resource->flags & IORESOURCE_PCI64)?8:4; |
| 346 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 347 | |
| 348 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 349 | } |
| 350 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 351 | static void pci_set_resource(struct device *dev, struct resource *resource); |
| 352 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 353 | static void pci_record_bridge_resource( |
| 354 | struct device *dev, resource_t moving, |
| 355 | unsigned index, unsigned long mask, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 356 | { |
| 357 | /* Initiliaze the constraints on the current bus */ |
| 358 | struct resource *resource; |
| 359 | resource = 0; |
| 360 | if (moving) { |
| 361 | unsigned long gran; |
| 362 | resource_t step; |
| 363 | resource = new_resource(dev, index); |
| 364 | resource->size = 0; |
| 365 | gran = 0; |
| 366 | step = 1; |
| 367 | while((moving & step) == 0) { |
| 368 | gran += 1; |
| 369 | step <<= 1; |
| 370 | } |
| 371 | resource->gran = gran; |
| 372 | resource->align = gran; |
| 373 | resource->limit = moving | (step - 1); |
| 374 | resource->flags = type | IORESOURCE_PCI_BRIDGE; |
| 375 | compute_allocate_resource(&dev->link[0], resource, mask, type); |
| 376 | /* If there is nothing behind the resource, |
| 377 | * clear it and forget it. |
| 378 | */ |
| 379 | if (resource->size == 0) { |
Stefan Reinauer | 532fd2d | 2008-10-29 03:15:42 +0000 | [diff] [blame] | 380 | #if CONFIG_PCI_64BIT_PREF_MEM == 1 |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 381 | resource->base = moving; |
Stefan Reinauer | 532fd2d | 2008-10-29 03:15:42 +0000 | [diff] [blame] | 382 | #else |
| 383 | resource->base = moving & 0xffffffff; |
| 384 | #endif |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 385 | resource->flags |= IORESOURCE_ASSIGNED; |
| 386 | resource->flags &= ~IORESOURCE_STORED; |
| 387 | pci_set_resource(dev, resource); |
| 388 | resource->flags = 0; |
| 389 | } |
| 390 | } |
| 391 | return; |
| 392 | } |
| 393 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 394 | static void pci_bridge_read_bases(struct device *dev) |
| 395 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 396 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 397 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 398 | /* See if the bridge I/O resources are implemented */ |
| 399 | moving_base = ((uint32_t)pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 400 | moving_base |= ((uint32_t)pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
| 401 | |
| 402 | moving_limit = ((uint32_t)pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 403 | moving_limit |= ((uint32_t)pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
| 404 | |
| 405 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 406 | |
| 407 | /* Initialize the io space constraints on the current bus */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 408 | pci_record_bridge_resource( |
| 409 | dev, moving, PCI_IO_BASE, |
| 410 | IORESOURCE_IO, IORESOURCE_IO); |
| 411 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 412 | |
| 413 | /* See if the bridge prefmem resources are implemented */ |
| 414 | moving_base = ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
| 415 | moving_base |= ((resource_t)pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; |
| 416 | |
| 417 | moving_limit = ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; |
| 418 | moving_limit |= ((resource_t)pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; |
| 419 | |
| 420 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 421 | /* Initiliaze the prefetchable memory constraints on the current bus */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 422 | pci_record_bridge_resource( |
| 423 | dev, moving, PCI_PREF_MEMORY_BASE, |
| 424 | IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 425 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
| 426 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 427 | |
| 428 | /* See if the bridge mem resources are implemented */ |
| 429 | moving_base = ((uint32_t)pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 430 | moving_limit = ((uint32_t)pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
| 431 | |
| 432 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 433 | |
| 434 | /* Initialize the memory resources on the current bus */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 435 | pci_record_bridge_resource( |
| 436 | dev, moving, PCI_MEMORY_BASE, |
| 437 | IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 438 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 439 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 440 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 441 | } |
| 442 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 443 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 444 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 445 | pci_read_bases(dev, 6); |
| 446 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 447 | } |
| 448 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 449 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 450 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 451 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 452 | pci_read_bases(dev, 2); |
| 453 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 454 | } |
| 455 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 456 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 457 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 458 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 459 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 460 | /* Make certain the resource has actually been set */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 461 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Myles Watson | c4ddbff | 2009-02-09 17:52:54 +0000 | [diff] [blame] | 462 | printk_err("ERROR: %s %02lx %s size: 0x%010Lx not assigned\n", |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 463 | dev_path(dev), resource->index, |
| 464 | resource_type(resource), |
| 465 | resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 466 | return; |
| 467 | } |
| 468 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 469 | /* If I have already stored this resource don't worry about it */ |
| 470 | if (resource->flags & IORESOURCE_STORED) { |
| 471 | return; |
| 472 | } |
| 473 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 474 | /* If the resources is substractive don't worry about it */ |
| 475 | if (resource->flags & IORESOURCE_SUBTRACTIVE) { |
| 476 | return; |
| 477 | } |
| 478 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 479 | /* Only handle PCI memory and IO resources for now */ |
| 480 | if (!(resource->flags & (IORESOURCE_MEM |IORESOURCE_IO))) |
| 481 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 482 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 483 | /* Enable the resources in the command register */ |
| 484 | if (resource->size) { |
| 485 | if (resource->flags & IORESOURCE_MEM) { |
| 486 | dev->command |= PCI_COMMAND_MEMORY; |
| 487 | } |
| 488 | if (resource->flags & IORESOURCE_IO) { |
| 489 | dev->command |= PCI_COMMAND_IO; |
| 490 | } |
| 491 | if (resource->flags & IORESOURCE_PCI_BRIDGE) { |
| 492 | dev->command |= PCI_COMMAND_MASTER; |
| 493 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 494 | } |
| 495 | /* Get the base address */ |
| 496 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 497 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 498 | /* Get the end */ |
| 499 | end = resource_end(resource); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 500 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 501 | /* Now store the resource */ |
| 502 | resource->flags |= IORESOURCE_STORED; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 503 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 504 | unsigned long base_lo, base_hi; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 505 | /* |
| 506 | * some chipsets allow us to set/clear the IO bit. |
| 507 | * (e.g. VIA 82c686a.) So set it to be safe) |
| 508 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 509 | base_lo = base & 0xffffffff; |
| 510 | base_hi = (base >> 32) & 0xffffffff; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 511 | if (resource->flags & IORESOURCE_IO) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 512 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 513 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 514 | pci_write_config32(dev, resource->index, base_lo); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 515 | if (resource->flags & IORESOURCE_PCI64) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 516 | pci_write_config32(dev, resource->index + 4, base_hi); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 517 | } |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 518 | } |
| 519 | else if (resource->index == PCI_IO_BASE) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 520 | /* set the IO ranges */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 521 | compute_allocate_resource(&dev->link[0], resource, |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 522 | IORESOURCE_IO, IORESOURCE_IO); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 523 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
| 524 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
| 525 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
| 526 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 527 | } |
| 528 | else if (resource->index == PCI_MEMORY_BASE) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 529 | /* set the memory range */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 530 | compute_allocate_resource(&dev->link[0], resource, |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 531 | IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 532 | IORESOURCE_MEM); |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 533 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 534 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 535 | } |
| 536 | else if (resource->index == PCI_PREF_MEMORY_BASE) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 537 | /* set the prefetchable memory range */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 538 | compute_allocate_resource(&dev->link[0], resource, |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 539 | IORESOURCE_MEM | IORESOURCE_PREFETCH, |
| 540 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 541 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 542 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 543 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 544 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 545 | } |
| 546 | else { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 547 | /* Don't let me think I stored the resource */ |
| 548 | resource->flags &= ~IORESOURCE_STORED; |
Myles Watson | c4ddbff | 2009-02-09 17:52:54 +0000 | [diff] [blame] | 549 | printk_err("ERROR: invalid resource->index %lx\n", |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 550 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 551 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 552 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 553 | return; |
| 554 | } |
| 555 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 556 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 557 | { |
| 558 | struct resource *resource, *last; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 559 | unsigned link; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 560 | uint8_t line; |
| 561 | |
| 562 | last = &dev->resource[dev->resources]; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 563 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 564 | for(resource = &dev->resource[0]; resource < last; resource++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 565 | pci_set_resource(dev, resource); |
| 566 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 567 | for(link = 0; link < dev->links; link++) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 568 | struct bus *bus; |
| 569 | bus = &dev->link[link]; |
| 570 | if (bus->children) { |
| 571 | assign_resources(bus); |
| 572 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 573 | } |
| 574 | |
| 575 | /* set a default latency timer */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 576 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 577 | |
| 578 | /* set a default secondary latency timer */ |
| 579 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 580 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 581 | } |
| 582 | |
| 583 | /* zero the irq settings */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 584 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 585 | if (line) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 586 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 587 | } |
| 588 | /* set the cache line size, so far 64 bytes is good for everyone */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 589 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 590 | } |
| 591 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 592 | void pci_dev_enable_resources(struct device *dev) |
| 593 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 594 | const struct pci_operations *ops; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 595 | uint16_t command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 596 | |
| 597 | /* Set the subsystem vendor and device id for mainboard devices */ |
| 598 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 599 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 600 | printk_debug("%s subsystem <- %02x/%02x\n", |
| 601 | dev_path(dev), |
| 602 | MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 603 | MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
| 604 | ops->set_subsystem(dev, |
| 605 | MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 606 | MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
| 607 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 608 | command = pci_read_config16(dev, PCI_COMMAND); |
| 609 | command |= dev->command; |
| 610 | printk_debug("%s cmd <- %02x\n", dev_path(dev), command); |
| 611 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 612 | } |
| 613 | |
| 614 | void pci_bus_enable_resources(struct device *dev) |
| 615 | { |
| 616 | uint16_t ctrl; |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 617 | /* enable IO in command register if there is VGA card |
| 618 | * connected with (even it does not claim IO resource) */ |
| 619 | if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
| 620 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 621 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
| 622 | ctrl |= dev->link[0].bridge_ctrl; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 623 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 624 | printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
| 625 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 626 | |
| 627 | pci_dev_enable_resources(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 628 | |
| 629 | enable_childrens_resources(dev); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 630 | } |
| 631 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 632 | void pci_bus_reset(struct bus *bus) |
| 633 | { |
| 634 | unsigned ctl; |
| 635 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 636 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 637 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 638 | mdelay(10); |
| 639 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 640 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 641 | delay(1); |
| 642 | } |
| 643 | |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 644 | void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 645 | { |
| 646 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 647 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 648 | } |
| 649 | |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 650 | /** default handler: only runs the relevant pci bios. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 651 | void pci_dev_init(struct device *dev) |
| 652 | { |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 653 | #if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1 |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 654 | void run_bios(struct device * dev, unsigned long addr); |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 655 | struct rom_header *rom, *ram; |
| 656 | |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 657 | #if CONFIG_PCI_ROM_RUN != 1 |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 658 | /* We want to execute VGA option ROMs when CONFIG_VGA_ROM_RUN |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 659 | * is set but CONFIG_PCI_ROM_RUN is not. In this case we skip |
| 660 | * all other option ROM types. |
| 661 | */ |
Ronald Hoogenboom | 9b6b63e | 2008-02-28 23:10:38 +0000 | [diff] [blame] | 662 | if ((dev->class>>8)!=PCI_CLASS_DISPLAY_VGA) |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 663 | return; |
| 664 | #endif |
| 665 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 666 | rom = pci_rom_probe(dev); |
| 667 | if (rom == NULL) |
| 668 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 669 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 670 | ram = pci_rom_load(dev, rom); |
Yinghai Lu | 9e4faef | 2005-01-14 22:04:49 +0000 | [diff] [blame] | 671 | if (ram == NULL) |
| 672 | return; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 673 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 674 | run_bios(dev, (unsigned long)ram); |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 675 | |
| 676 | #if CONFIG_CONSOLE_VGA == 1 |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 677 | /* vga_inited is a trigger of the VGA console code. */ |
Ronald Hoogenboom | 9b6b63e | 2008-02-28 23:10:38 +0000 | [diff] [blame] | 678 | if ((dev->class>>8) == PCI_CLASS_DISPLAY_VGA) { |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 679 | extern int vga_inited; |
| 680 | vga_inited = 1; |
| 681 | } |
| 682 | #endif /* CONFIG_CONSOLE_VGA */ |
| 683 | #endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 684 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 685 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 686 | /** Default device operation for PCI devices */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 687 | static struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 688 | .set_subsystem = pci_dev_set_subsystem, |
| 689 | }; |
| 690 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 691 | struct device_operations default_pci_ops_dev = { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 692 | .read_resources = pci_dev_read_resources, |
| 693 | .set_resources = pci_dev_set_resources, |
| 694 | .enable_resources = pci_dev_enable_resources, |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 695 | .init = pci_dev_init, |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 696 | .scan_bus = 0, |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 697 | .enable = 0, |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 698 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 699 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 700 | |
| 701 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 702 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 703 | .set_subsystem = 0, |
| 704 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 705 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 706 | struct device_operations default_pci_ops_bus = { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 707 | .read_resources = pci_bus_read_resources, |
| 708 | .set_resources = pci_dev_set_resources, |
| 709 | .enable_resources = pci_bus_enable_resources, |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 710 | .init = 0, |
| 711 | .scan_bus = pci_scan_bridge, |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 712 | .enable = 0, |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 713 | .reset_bus = pci_bus_reset, |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 714 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 715 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 716 | |
| 717 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 718 | * @brief Detect the type of downstream bridge |
| 719 | * |
| 720 | * This function is a heuristic to detect which type |
| 721 | * of bus is downstream of a pci to pci bridge. This |
| 722 | * functions by looking for various capability blocks |
| 723 | * to figure out the type of downstream bridge. PCI-X |
| 724 | * PCI-E, and Hypertransport all seem to have appropriate |
| 725 | * capabilities. |
| 726 | * |
| 727 | * When only a PCI-Express capability is found the type |
| 728 | * is examined to see which type of bridge we have. |
| 729 | * |
| 730 | * @param dev |
| 731 | * |
| 732 | * @return appropriate bridge operations |
| 733 | */ |
| 734 | static struct device_operations *get_pci_bridge_ops(device_t dev) |
| 735 | { |
| 736 | unsigned pos; |
| 737 | |
| 738 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 739 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 740 | if (pos) { |
| 741 | printk_debug("%s subbordinate bus PCI-X\n", dev_path(dev)); |
| 742 | return &default_pcix_ops_bus; |
| 743 | } |
| 744 | #endif |
| 745 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
| 746 | /* How do I detect an PCI to AGP bridge? */ |
| 747 | #endif |
| 748 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 749 | pos = 0; |
| 750 | while((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) { |
| 751 | unsigned flags; |
| 752 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 753 | if ((flags >> 13) == 1) { |
| 754 | /* Host or Secondary Interface */ |
| 755 | printk_debug("%s subbordinate bus Hypertransport\n", |
| 756 | dev_path(dev)); |
| 757 | return &default_ht_ops_bus; |
| 758 | } |
| 759 | } |
| 760 | #endif |
| 761 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 762 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 763 | if (pos) { |
| 764 | unsigned flags; |
| 765 | flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS); |
| 766 | switch((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
| 767 | case PCI_EXP_TYPE_ROOT_PORT: |
| 768 | case PCI_EXP_TYPE_UPSTREAM: |
| 769 | case PCI_EXP_TYPE_DOWNSTREAM: |
| 770 | printk_debug("%s subbordinate bus PCI Express\n", |
| 771 | dev_path(dev)); |
| 772 | return &default_pciexp_ops_bus; |
| 773 | case PCI_EXP_TYPE_PCI_BRIDGE: |
| 774 | printk_debug("%s subbordinate PCI\n", |
| 775 | dev_path(dev)); |
| 776 | return &default_pci_ops_bus; |
| 777 | default: |
| 778 | break; |
| 779 | } |
| 780 | } |
| 781 | #endif |
| 782 | return &default_pci_ops_bus; |
| 783 | } |
| 784 | |
| 785 | /** |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 786 | * @brief Set up PCI device operation |
| 787 | * |
| 788 | * |
| 789 | * @param dev |
| 790 | * |
| 791 | * @see pci_drivers |
| 792 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 793 | static void set_pci_ops(struct device *dev) |
| 794 | { |
| 795 | struct pci_driver *driver; |
| 796 | if (dev->ops) { |
| 797 | return; |
| 798 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 799 | |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 800 | /* Look through the list of setup drivers and find one for |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 801 | * this pci device |
| 802 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 803 | for(driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 804 | if ((driver->vendor == dev->vendor) && |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 805 | (driver->device == dev->device)) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 806 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 807 | dev->ops = driver->ops; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 808 | printk_spew("%s [%04x/%04x] %sops\n", |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 809 | dev_path(dev), |
| 810 | driver->vendor, driver->device, |
| 811 | (driver->ops->scan_bus?"bus ":"")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 812 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 813 | } |
| 814 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 815 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 816 | /* If I don't have a specific driver use the default operations */ |
| 817 | switch(dev->hdr_type & 0x7f) { /* header type */ |
| 818 | case PCI_HEADER_TYPE_NORMAL: /* standard header */ |
| 819 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 820 | goto bad; |
| 821 | dev->ops = &default_pci_ops_dev; |
| 822 | break; |
| 823 | case PCI_HEADER_TYPE_BRIDGE: |
| 824 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 825 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 826 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 827 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 828 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 829 | case PCI_HEADER_TYPE_CARDBUS: |
| 830 | dev->ops = &default_cardbus_ops_bus; |
| 831 | break; |
| 832 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 833 | default: |
| 834 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 835 | if (dev->enabled) { |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 836 | printk_err("%s [%04x/%04x/%06x] has unknown header " |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 837 | "type %02x, ignoring.\n", |
| 838 | dev_path(dev), |
| 839 | dev->vendor, dev->device, |
| 840 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 841 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 842 | } |
| 843 | return; |
| 844 | } |
| 845 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 846 | |
| 847 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 848 | /** |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 849 | * @brief See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 850 | * |
| 851 | * Given a linked list of PCI device structures and a devfn number, find the |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 852 | * device structure correspond to the devfn, if present. This function also |
| 853 | * removes the device structure from the linked list. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 854 | * |
| 855 | * @param list the device structure list |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 856 | * @param devfn a device/function number |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 857 | * |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 858 | * @return pointer to the device structure found or null of we have not |
| 859 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 860 | */ |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 861 | static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 862 | { |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 863 | struct device *dev; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 864 | dev = 0; |
| 865 | for(; *list; list = &(*list)->sibling) { |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 866 | if ((*list)->path.type != DEVICE_PATH_PCI) { |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 867 | printk_err("child %s not a pci device\n", |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 868 | dev_path(*list)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 869 | continue; |
| 870 | } |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 871 | if ((*list)->path.pci.devfn == devfn) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 872 | /* Unlink from the list */ |
| 873 | dev = *list; |
| 874 | *list = (*list)->sibling; |
| 875 | dev->sibling = 0; |
| 876 | break; |
| 877 | } |
| 878 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 879 | /* Just like alloc_dev add the device to the list of device on the bus. |
| 880 | * When the list of devices was formed we removed all of the parents |
| 881 | * children, and now we are interleaving static and dynamic devices in |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 882 | * order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 883 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 884 | if (dev) { |
| 885 | device_t child; |
| 886 | /* Find the last child of our parent */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 887 | for(child = dev->bus->children; child && child->sibling; ) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 888 | child = child->sibling; |
| 889 | } |
| 890 | /* Place the device on the list of children of it's parent. */ |
| 891 | if (child) { |
| 892 | child->sibling = dev; |
| 893 | } else { |
| 894 | dev->bus->children = dev; |
| 895 | } |
| 896 | } |
| 897 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 898 | return dev; |
| 899 | } |
| 900 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 901 | /** |
| 902 | * @brief Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 903 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 904 | * Determine the existence of a given PCI device. |
| 905 | * |
| 906 | * @param bus pointer to the bus structure |
| 907 | * @param devfn to look at |
| 908 | * |
| 909 | * @return The device structure for hte device (if found) |
| 910 | * or the NULL if no device is found. |
| 911 | */ |
| 912 | device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) |
| 913 | { |
| 914 | uint32_t id, class; |
| 915 | uint8_t hdr_type; |
| 916 | |
| 917 | /* Detect if a device is present */ |
| 918 | if (!dev) { |
| 919 | struct device dummy; |
| 920 | dummy.bus = bus; |
| 921 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 922 | dummy.path.pci.devfn = devfn; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 923 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
| 924 | /* Have we found somthing? |
| 925 | * Some broken boards return 0 if a slot is empty. |
| 926 | */ |
| 927 | if ( (id == 0xffffffff) || (id == 0x00000000) || |
| 928 | (id == 0x0000ffff) || (id == 0xffff0000)) |
| 929 | { |
Stefan Reinauer | f657d75 | 2008-09-11 06:52:22 +0000 | [diff] [blame] | 930 | printk_spew("%s, bad id 0x%x\n", dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 931 | return NULL; |
| 932 | } |
| 933 | dev = alloc_dev(bus, &dummy.path); |
| 934 | } |
| 935 | else { |
| 936 | /* Enable/disable the device. Once we have |
| 937 | * found the device specific operations this |
| 938 | * operations we will disable the device with |
| 939 | * those as well. |
| 940 | * |
| 941 | * This is geared toward devices that have subfunctions |
| 942 | * that do not show up by default. |
| 943 | * |
| 944 | * If a device is a stuff option on the motherboard |
| 945 | * it may be absent and enable_dev must cope. |
| 946 | * |
| 947 | */ |
| 948 | /* Run the magice enable sequence for the device */ |
| 949 | if (dev->chip_ops && dev->chip_ops->enable_dev) { |
| 950 | dev->chip_ops->enable_dev(dev); |
| 951 | } |
| 952 | /* Now read the vendor and device id */ |
| 953 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
| 954 | |
| 955 | |
| 956 | /* If the device does not have a pci id disable it. |
| 957 | * Possibly this is because we have already disabled |
| 958 | * the device. But this also handles optional devices |
| 959 | * that may not always show up. |
| 960 | */ |
| 961 | /* If the chain is fully enumerated quit */ |
| 962 | if ( (id == 0xffffffff) || (id == 0x00000000) || |
| 963 | (id == 0x0000ffff) || (id == 0xffff0000)) |
| 964 | { |
| 965 | if (dev->enabled) { |
| 966 | printk_info("Disabling static device: %s\n", |
| 967 | dev_path(dev)); |
| 968 | dev->enabled = 0; |
| 969 | } |
| 970 | return dev; |
| 971 | } |
| 972 | } |
| 973 | /* Read the rest of the pci configuration information */ |
| 974 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 975 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
| 976 | |
| 977 | /* Store the interesting information in the device structure */ |
| 978 | dev->vendor = id & 0xffff; |
| 979 | dev->device = (id >> 16) & 0xffff; |
| 980 | dev->hdr_type = hdr_type; |
| 981 | /* class code, the upper 3 bytes of PCI_CLASS_REVISION */ |
| 982 | dev->class = class >> 8; |
| 983 | |
| 984 | |
| 985 | /* Architectural/System devices always need to |
| 986 | * be bus masters. |
| 987 | */ |
| 988 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) { |
| 989 | dev->command |= PCI_COMMAND_MASTER; |
| 990 | } |
| 991 | /* Look at the vendor and device id, or at least the |
| 992 | * header type and class and figure out which set of |
| 993 | * configuration methods to use. Unless we already |
| 994 | * have some pci ops. |
| 995 | */ |
| 996 | set_pci_ops(dev); |
| 997 | |
| 998 | /* Now run the magic enable/disable sequence for the device */ |
| 999 | if (dev->ops && dev->ops->enable) { |
| 1000 | dev->ops->enable(dev); |
| 1001 | } |
| 1002 | |
| 1003 | |
| 1004 | /* Display the device and error if we don't have some pci operations |
| 1005 | * for it. |
| 1006 | */ |
| 1007 | printk_debug("%s [%04x/%04x] %s%s\n", |
| 1008 | dev_path(dev), |
| 1009 | dev->vendor, dev->device, |
| 1010 | dev->enabled?"enabled": "disabled", |
| 1011 | dev->ops?"" : " No operations" |
| 1012 | ); |
| 1013 | |
| 1014 | return dev; |
| 1015 | } |
| 1016 | |
| 1017 | /** |
| 1018 | * @brief Scan a PCI bus. |
| 1019 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1020 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1021 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1022 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1023 | * This function is the default scan_bus() method for the root device |
| 1024 | * 'dev_root'. |
| 1025 | * |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1026 | * @param bus pointer to the bus structure |
| 1027 | * @param min_devfn minimum devfn to look at in the scan usually 0x00 |
| 1028 | * @param max_devfn maximum devfn to look at in the scan usually 0xff |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1029 | * @param max current bus number |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1030 | * |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1031 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1032 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1033 | unsigned int pci_scan_bus(struct bus *bus, |
| 1034 | unsigned min_devfn, unsigned max_devfn, |
| 1035 | unsigned int max) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1036 | { |
| 1037 | unsigned int devfn; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1038 | device_t old_devices; |
| 1039 | device_t child; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1040 | |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1041 | #if PCI_BUS_SEGN_BITS |
| 1042 | printk_debug("PCI: pci_scan_bus for bus %04x:%02x\n", bus->secondary >> 8, bus->secondary & 0xff); |
| 1043 | #else |
| 1044 | printk_debug("PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
| 1045 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1046 | |
| 1047 | old_devices = bus->children; |
| 1048 | bus->children = 0; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1049 | |
| 1050 | post_code(0x24); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1051 | /* probe all devices/functions on this bus with some optimization for |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1052 | * non-existence and single funcion devices |
| 1053 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1054 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1055 | device_t dev; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1056 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1057 | /* First thing setup the device structure */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1058 | dev = pci_scan_get_dev(&old_devices, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1059 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1060 | /* See if a device is present and setup the device |
| 1061 | * structure. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1062 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1063 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1064 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1065 | /* if this is not a multi function device, |
| 1066 | * or the device is not present don't waste |
| 1067 | * time probing another function. |
| 1068 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1069 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1070 | if ((PCI_FUNC(devfn) == 0x00) && |
| 1071 | (!dev || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) |
| 1072 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1073 | devfn += 0x07; |
| 1074 | } |
| 1075 | } |
| 1076 | post_code(0x25); |
| 1077 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 1078 | /* Die if any left over static devices are are found. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1079 | * There's probably a problem in the Config.lb. |
| 1080 | */ |
| 1081 | if(old_devices) { |
| 1082 | device_t left; |
| 1083 | for(left = old_devices; left; left = left->sibling) { |
Ronald G. Minnich | e800b91 | 2006-01-17 21:12:03 +0000 | [diff] [blame] | 1084 | printk_err("%s\n", dev_path(left)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1085 | } |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 1086 | printk_warning("PCI: Left over static devices. Check your mainboard Config.lb\n"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1087 | } |
| 1088 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1089 | /* For all children that implement scan_bus (i.e. bridges) |
| 1090 | * scan the bus behind that child. |
| 1091 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1092 | for(child = bus->children; child; child = child->sibling) { |
| 1093 | max = scan_bus(child, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1094 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1095 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1096 | /* |
| 1097 | * We've scanned the bus and so we know all about what's on |
| 1098 | * the other side of any bridges that may be on this bus plus |
| 1099 | * any devices. |
| 1100 | * |
| 1101 | * Return how far we've got finding sub-buses. |
| 1102 | */ |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1103 | printk_debug("PCI: pci_scan_bus returning with max=%03x\n", max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1104 | post_code(0x55); |
| 1105 | return max; |
| 1106 | } |
| 1107 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1108 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1109 | /** |
| 1110 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1111 | * |
| 1112 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1113 | * according to the result of the scan. |
| 1114 | * |
| 1115 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1116 | * |
| 1117 | * @param dev pointer to the bridge device |
| 1118 | * @param max the highest bus number assgined up to now |
| 1119 | * |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1120 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1121 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1122 | unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, |
| 1123 | unsigned int (*do_scan_bus)(struct bus *bus, |
| 1124 | unsigned min_devfn, unsigned max_devfn, unsigned int max)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1125 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1126 | struct bus *bus; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1127 | uint32_t buses; |
| 1128 | uint16_t cr; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1129 | |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1130 | printk_spew("%s for %s\n", __func__, dev_path(dev)); |
| 1131 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1132 | bus = &dev->link[0]; |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 1133 | bus->dev = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1134 | dev->links = 1; |
| 1135 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1136 | /* Set up the primary, secondary and subordinate bus numbers. We have |
| 1137 | * no idea how many buses are behind this bridge yet, so we set the |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1138 | * subordinate bus number to 0xff for the moment. |
| 1139 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1140 | bus->secondary = ++max; |
| 1141 | bus->subordinate = 0xff; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1142 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1143 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1144 | cr = pci_read_config16(dev, PCI_COMMAND); |
| 1145 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1146 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1147 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1148 | /* |
| 1149 | * Read the existing primary/secondary/subordinate bus |
| 1150 | * number configuration. |
| 1151 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1152 | buses = pci_read_config32(dev, PCI_PRIMARY_BUS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1153 | |
| 1154 | /* Configure the bus numbers for this bridge: the configuration |
| 1155 | * transactions will not be propagated by the bridge if it is not |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1156 | * correctly configured. |
| 1157 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1158 | buses &= 0xff000000; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1159 | buses |= (((unsigned int) (dev->bus->secondary) << 0) | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1160 | ((unsigned int) (bus->secondary) << 8) | |
| 1161 | ((unsigned int) (bus->subordinate) << 16)); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1162 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1163 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1164 | /* Now we can scan all subordinate buses |
| 1165 | * i.e. the bus behind the bridge. |
| 1166 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1167 | max = do_scan_bus(bus, 0x00, 0xff, max); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1168 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1169 | /* We know the number of buses behind this bridge. Set the subordinate |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1170 | * bus number to its real value. |
| 1171 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1172 | bus->subordinate = max; |
| 1173 | buses = (buses & 0xff00ffff) | |
| 1174 | ((unsigned int) (bus->subordinate) << 16); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1175 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
| 1176 | pci_write_config16(dev, PCI_COMMAND, cr); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1177 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1178 | printk_spew("%s returns max %d\n", __func__, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1179 | return max; |
| 1180 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1181 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1182 | /** |
| 1183 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1184 | * |
| 1185 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1186 | * according to the result of the scan. |
| 1187 | * |
| 1188 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1189 | * |
| 1190 | * @param dev pointer to the bridge device |
| 1191 | * @param max the highest bus number assgined up to now |
| 1192 | * |
| 1193 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1194 | */ |
| 1195 | unsigned int pci_scan_bridge(struct device *dev, unsigned int max) |
| 1196 | { |
| 1197 | return do_pci_scan_bridge(dev, max, pci_scan_bus); |
| 1198 | } |
| 1199 | |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1200 | /* |
| 1201 | Tell the EISA int controller this int must be level triggered |
| 1202 | THIS IS A KLUDGE -- sorry, this needs to get cleaned up. |
| 1203 | */ |
Ronald G. Minnich | 88fb1a6 | 2006-06-22 04:37:27 +0000 | [diff] [blame] | 1204 | void pci_level_irq(unsigned char intNum) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1205 | { |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1206 | unsigned short intBits = inb(0x4d0) | (((unsigned) inb(0x4d1)) << 8); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1207 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1208 | printk_spew("%s: current ints are 0x%x\n", __func__, intBits); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1209 | intBits |= (1 << intNum); |
| 1210 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1211 | printk_spew("%s: try to set ints 0x%x\n", __func__, intBits); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1212 | |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1213 | // Write new values |
| 1214 | outb((unsigned char) intBits, 0x4d0); |
| 1215 | outb((unsigned char) (intBits >> 8), 0x4d1); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1216 | |
Ronald G. Minnich | b56ef07 | 2003-10-15 20:05:11 +0000 | [diff] [blame] | 1217 | /* this seems like an error but is not ... */ |
Ronald G. Minnich | 02fa3b2 | 2004-10-06 17:33:54 +0000 | [diff] [blame] | 1218 | #if 1 |
Ronald G. Minnich | 2cf779d | 2006-09-18 22:50:51 +0000 | [diff] [blame] | 1219 | if (inb(0x4d0) != (intBits & 0xff)) { |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1220 | printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n", |
Ronald G. Minnich | 2cf779d | 2006-09-18 22:50:51 +0000 | [diff] [blame] | 1221 | __func__, intBits &0xff, inb(0x4d0)); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1222 | } |
Ronald G. Minnich | 2cf779d | 2006-09-18 22:50:51 +0000 | [diff] [blame] | 1223 | if (inb(0x4d1) != ((intBits >> 8) & 0xff)) { |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1224 | printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n", |
Ronald G. Minnich | 2cf779d | 2006-09-18 22:50:51 +0000 | [diff] [blame] | 1225 | __func__, (intBits>>8) &0xff, inb(0x4d1)); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1226 | } |
Ronald G. Minnich | b56ef07 | 2003-10-15 20:05:11 +0000 | [diff] [blame] | 1227 | #endif |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1228 | } |
| 1229 | |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1230 | /* |
| 1231 | This function assigns IRQs for all functions contained within |
| 1232 | the indicated device address. If the device does not exist or does |
| 1233 | not require interrupts then this function has no effect. |
| 1234 | |
| 1235 | This function should be called for each PCI slot in your system. |
| 1236 | |
| 1237 | pIntAtoD is an array of IRQ #s that are assigned to PINTA through PINTD of |
| 1238 | this slot. |
| 1239 | The particular irq #s that are passed in depend on the routing inside |
| 1240 | your southbridge and on your motherboard. |
| 1241 | |
| 1242 | -kevinh@ispiri.com |
| 1243 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1244 | void pci_assign_irqs(unsigned bus, unsigned slot, |
| 1245 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1246 | { |
| 1247 | unsigned functNum; |
| 1248 | device_t pdev; |
| 1249 | unsigned char line; |
| 1250 | unsigned char irq; |
| 1251 | unsigned char readback; |
| 1252 | |
| 1253 | /* Each slot may contain up to eight functions */ |
| 1254 | for (functNum = 0; functNum < 8; functNum++) { |
| 1255 | pdev = dev_find_slot(bus, (slot << 3) + functNum); |
| 1256 | |
| 1257 | if (pdev) { |
| 1258 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
| 1259 | |
| 1260 | // PCI spec says all other values are reserved |
| 1261 | if ((line >= 1) && (line <= 4)) { |
| 1262 | irq = pIntAtoD[line - 1]; |
| 1263 | |
| 1264 | printk_debug("Assigning IRQ %d to %d:%x.%d\n", \ |
| 1265 | irq, bus, slot, functNum); |
| 1266 | |
| 1267 | pci_write_config8(pdev, PCI_INTERRUPT_LINE,\ |
| 1268 | pIntAtoD[line - 1]); |
| 1269 | |
| 1270 | readback = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
| 1271 | printk_debug(" Readback = %d\n", readback); |
| 1272 | |
| 1273 | // Change to level triggered |
| 1274 | pci_level_irq(pIntAtoD[line - 1]); |
| 1275 | } |
| 1276 | } |
| 1277 | } |
| 1278 | } |