| Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Martin Roth | 5474eb1 | 2018-05-26 19:22:33 -0600 | [diff] [blame] | 2 | |
| Kyösti Mälkki | de64078 | 2019-12-03 07:30:26 +0200 | [diff] [blame] | 3 | #include <arch/bootblock.h> |
| Angel Pons | 1318ab4 | 2021-01-20 13:31:09 +0100 | [diff] [blame^] | 4 | #include <assert.h> |
| Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
| Angel Pons | 1318ab4 | 2021-01-20 13:31:09 +0100 | [diff] [blame^] | 6 | #include <types.h> |
| Arthur Heymans | 99e578e | 2019-01-15 20:14:33 +0100 | [diff] [blame] | 7 | #include "pineview.h" |
| 8 | |
| Angel Pons | 1318ab4 | 2021-01-20 13:31:09 +0100 | [diff] [blame^] | 9 | static uint32_t encode_pciexbar_length(void) |
| 10 | { |
| 11 | switch (CONFIG_MMCONF_BUS_NUMBER) { |
| 12 | case 256: return 0 << 1; |
| 13 | case 128: return 1 << 1; |
| 14 | case 64: return 2 << 1; |
| 15 | default: return dead_code_t(uint32_t); |
| 16 | } |
| 17 | } |
| Damien Zammit | 6247793 | 2015-05-03 21:34:38 +1000 | [diff] [blame] | 18 | |
| Arthur Heymans | 99e578e | 2019-01-15 20:14:33 +0100 | [diff] [blame] | 19 | void bootblock_early_northbridge_init(void) |
| Damien Zammit | 6247793 | 2015-05-03 21:34:38 +1000 | [diff] [blame] | 20 | { |
| Angel Pons | 1318ab4 | 2021-01-20 13:31:09 +0100 | [diff] [blame^] | 21 | const uint32_t reg32 = CONFIG_MMCONF_BASE_ADDRESS | encode_pciexbar_length() | 1; |
| 22 | pci_io_write_config32(HOST_BRIDGE, PCIEXBAR, reg32); |
| Damien Zammit | 6247793 | 2015-05-03 21:34:38 +1000 | [diff] [blame] | 23 | } |