Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include <acpi/acpigen.h> |
Felix Held | 4b2464f | 2022-02-23 17:54:20 +0100 | [diff] [blame] | 4 | #include <arch/hpet.h> |
Patrick Rudolph | 57ddd68 | 2023-02-28 09:17:40 +0100 | [diff] [blame] | 5 | #include <arch/ioapic.h> |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 6 | #include <assert.h> |
Naresh Solanki | 559f9ed | 2023-01-20 19:38:07 +0100 | [diff] [blame] | 7 | #include <cpu/x86/lapic.h> |
Arthur Heymans | 36e6f9b | 2022-10-27 15:11:05 +0200 | [diff] [blame] | 8 | #include <commonlib/sort.h> |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 9 | #include <device/mmio.h> |
| 10 | #include <device/pci.h> |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 11 | #include <device/pciexp.h> |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 12 | #include <device/pci_ids.h> |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 13 | #include <soc/acpi.h> |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 14 | #include <soc/chip_common.h> |
Rocky Phagura | d4db36e | 2021-04-03 08:49:32 -0700 | [diff] [blame] | 15 | #include <soc/hest.h> |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 16 | #include <soc/iomap.h> |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 17 | #include <soc/numa.h> |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 18 | #include <soc/pci_devs.h> |
| 19 | #include <soc/soc_util.h> |
Marc Jones | 18960ce | 2020-11-02 12:41:12 -0700 | [diff] [blame] | 20 | #include <soc/util.h> |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 21 | #include "chip.h" |
| 22 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 23 | /* NUMA related ACPI table generation. SRAT, SLIT, etc */ |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 24 | |
Arthur Heymans | 36e6f9b | 2022-10-27 15:11:05 +0200 | [diff] [blame] | 25 | /* Increase if necessary. Currently all x86 CPUs only have 2 SMP threads */ |
| 26 | #define MAX_THREAD 2 |
| 27 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 28 | unsigned long acpi_create_srat_lapics(unsigned long current) |
| 29 | { |
| 30 | struct device *cpu; |
Arthur Heymans | 36e6f9b | 2022-10-27 15:11:05 +0200 | [diff] [blame] | 31 | unsigned int num_cpus = 0; |
| 32 | int apic_ids[CONFIG_MAX_CPUS] = {}; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 33 | |
Arthur Heymans | 36e6f9b | 2022-10-27 15:11:05 +0200 | [diff] [blame] | 34 | unsigned int sort_start = 0; |
| 35 | for (unsigned int thread_id = 0; thread_id < MAX_THREAD; thread_id++) { |
| 36 | for (cpu = all_devices; cpu; cpu = cpu->next) { |
| 37 | if (!is_enabled_cpu(cpu)) |
| 38 | continue; |
| 39 | if (num_cpus >= ARRAY_SIZE(apic_ids)) |
| 40 | break; |
| 41 | if (cpu->path.apic.thread_id != thread_id) |
| 42 | continue; |
| 43 | apic_ids[num_cpus++] = cpu->path.apic.apic_id; |
| 44 | } |
| 45 | bubblesort(&apic_ids[sort_start], num_cpus - sort_start, NUM_ASCENDING); |
| 46 | sort_start = num_cpus; |
| 47 | } |
| 48 | |
| 49 | for (unsigned int i = 0; i < num_cpus; i++) { |
| 50 | /* Match the sorted apic_ids to a struct device */ |
| 51 | for (cpu = all_devices; cpu; cpu = cpu->next) { |
| 52 | if (!is_enabled_cpu(cpu)) |
| 53 | continue; |
| 54 | if (cpu->path.apic.apic_id == apic_ids[i]) |
| 55 | break; |
| 56 | } |
| 57 | if (!cpu) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 58 | continue; |
Naresh Solanki | 559f9ed | 2023-01-20 19:38:07 +0100 | [diff] [blame] | 59 | |
| 60 | if (is_x2apic_mode()) { |
Arthur Heymans | 36e6f9b | 2022-10-27 15:11:05 +0200 | [diff] [blame] | 61 | printk(BIOS_DEBUG, "SRAT: x2apic cpu_index=%04x, node_id=%02x, apic_id=%08x\n", |
Shuo Liu | 5ed9fe9 | 2024-03-26 21:27:52 +0800 | [diff] [blame] | 62 | i, device_to_pd(cpu), cpu->path.apic.apic_id); |
Naresh Solanki | 559f9ed | 2023-01-20 19:38:07 +0100 | [diff] [blame] | 63 | |
| 64 | current += acpi_create_srat_x2apic((acpi_srat_x2apic_t *)current, |
Shuo Liu | 5ed9fe9 | 2024-03-26 21:27:52 +0800 | [diff] [blame] | 65 | device_to_pd(cpu), cpu->path.apic.apic_id); |
Naresh Solanki | 559f9ed | 2023-01-20 19:38:07 +0100 | [diff] [blame] | 66 | } else { |
| 67 | printk(BIOS_DEBUG, "SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", |
Shuo Liu | 5ed9fe9 | 2024-03-26 21:27:52 +0800 | [diff] [blame] | 68 | i, device_to_pd(cpu), cpu->path.apic.apic_id); |
Naresh Solanki | 559f9ed | 2023-01-20 19:38:07 +0100 | [diff] [blame] | 69 | |
| 70 | current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, |
Shuo Liu | 5ed9fe9 | 2024-03-26 21:27:52 +0800 | [diff] [blame] | 71 | device_to_pd(cpu), cpu->path.apic.apic_id); |
Naresh Solanki | 559f9ed | 2023-01-20 19:38:07 +0100 | [diff] [blame] | 72 | } |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 73 | } |
| 74 | return current; |
| 75 | } |
| 76 | |
| 77 | static unsigned int get_srat_memory_entries(acpi_srat_mem_t *srat_mem) |
| 78 | { |
| 79 | const struct SystemMemoryMapHob *memory_map; |
| 80 | unsigned int mmap_index; |
| 81 | |
| 82 | memory_map = get_system_memory_map(); |
Elyes Haouas | f1ba7d6 | 2022-09-13 10:03:44 +0200 | [diff] [blame] | 83 | assert(memory_map); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 84 | printk(BIOS_DEBUG, "memory_map: %p\n", memory_map); |
| 85 | |
| 86 | mmap_index = 0; |
| 87 | for (int e = 0; e < memory_map->numberEntries; ++e) { |
| 88 | const struct SystemMemoryMapElement *mem_element = &memory_map->Element[e]; |
| 89 | uint64_t addr = |
Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 90 | (uint64_t)((uint64_t)mem_element->BaseAddress << |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 91 | MEM_ADDR_64MB_SHIFT_BITS); |
| 92 | uint64_t size = |
Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 93 | (uint64_t)((uint64_t)mem_element->ElementSize << |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 94 | MEM_ADDR_64MB_SHIFT_BITS); |
| 95 | |
| 96 | printk(BIOS_DEBUG, "memory_map %d addr: 0x%llx, BaseAddress: 0x%x, size: 0x%llx, " |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 97 | "ElementSize: 0x%x, type: %d, reserved: %d\n", |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 98 | e, addr, mem_element->BaseAddress, size, |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 99 | mem_element->ElementSize, mem_element->Type, |
Shuo Liu | a5bdf8e | 2024-02-20 01:06:10 +0800 | [diff] [blame] | 100 | is_memtype_reserved(mem_element->Type)); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 101 | |
| 102 | assert(mmap_index < MAX_ACPI_MEMORY_AFFINITY_COUNT); |
| 103 | |
| 104 | /* skip reserved memory region */ |
Shuo Liu | a5bdf8e | 2024-02-20 01:06:10 +0800 | [diff] [blame] | 105 | if (is_memtype_reserved(mem_element->Type)) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 106 | continue; |
Shuo Liu | a5bdf8e | 2024-02-20 01:06:10 +0800 | [diff] [blame] | 107 | /* skip all non processor attached memory regions */ |
| 108 | if (CONFIG(SOC_INTEL_HAS_CXL) && |
| 109 | (!is_memtype_processor_attached(mem_element->Type))) |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 110 | continue; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 111 | |
| 112 | /* skip if this address is already added */ |
| 113 | bool skip = false; |
| 114 | for (int idx = 0; idx < mmap_index; ++idx) { |
| 115 | uint64_t base_addr = ((uint64_t)srat_mem[idx].base_address_high << 32) + |
| 116 | srat_mem[idx].base_address_low; |
| 117 | if (addr == base_addr) { |
| 118 | skip = true; |
| 119 | break; |
| 120 | } |
| 121 | } |
| 122 | if (skip) |
| 123 | continue; |
| 124 | |
| 125 | srat_mem[mmap_index].type = 1; /* Memory affinity structure */ |
| 126 | srat_mem[mmap_index].length = sizeof(acpi_srat_mem_t); |
Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 127 | srat_mem[mmap_index].base_address_low = (uint32_t)(addr & 0xffffffff); |
| 128 | srat_mem[mmap_index].base_address_high = (uint32_t)(addr >> 32); |
| 129 | srat_mem[mmap_index].length_low = (uint32_t)(size & 0xffffffff); |
| 130 | srat_mem[mmap_index].length_high = (uint32_t)(size >> 32); |
Shuo Liu | 5ed9fe9 | 2024-03-26 21:27:52 +0800 | [diff] [blame] | 131 | srat_mem[mmap_index].proximity_domain = memory_to_pd(mem_element); |
Shuo Liu | 3108ba5 | 2022-07-05 22:56:28 +0800 | [diff] [blame] | 132 | srat_mem[mmap_index].flags = ACPI_SRAT_MEMORY_ENABLED; |
Shuo Liu | a5bdf8e | 2024-02-20 01:06:10 +0800 | [diff] [blame] | 133 | if (is_memtype_non_volatile(mem_element->Type)) |
Shuo Liu | 3108ba5 | 2022-07-05 22:56:28 +0800 | [diff] [blame] | 134 | srat_mem[mmap_index].flags |= ACPI_SRAT_MEMORY_NONVOLATILE; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 135 | ++mmap_index; |
| 136 | } |
| 137 | |
| 138 | return mmap_index; |
| 139 | } |
| 140 | |
| 141 | static unsigned long acpi_fill_srat(unsigned long current) |
| 142 | { |
| 143 | acpi_srat_mem_t srat_mem[MAX_ACPI_MEMORY_AFFINITY_COUNT]; |
| 144 | unsigned int mem_count; |
| 145 | |
| 146 | /* create all subtables for processors */ |
| 147 | current = acpi_create_srat_lapics(current); |
| 148 | |
Naresh Solanki | 9fd5c69 | 2023-05-22 16:47:47 +0200 | [diff] [blame] | 149 | memset(srat_mem, 0, sizeof(srat_mem)); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 150 | mem_count = get_srat_memory_entries(srat_mem); |
| 151 | for (int i = 0; i < mem_count; ++i) { |
| 152 | printk(BIOS_DEBUG, "adding srat memory %d entry length: %d, addr: 0x%x%x, " |
| 153 | "length: 0x%x%x, proximity_domain: %d, flags: %x\n", |
| 154 | i, srat_mem[i].length, |
| 155 | srat_mem[i].base_address_high, srat_mem[i].base_address_low, |
| 156 | srat_mem[i].length_high, srat_mem[i].length_low, |
| 157 | srat_mem[i].proximity_domain, srat_mem[i].flags); |
| 158 | memcpy((acpi_srat_mem_t *)current, &srat_mem[i], sizeof(srat_mem[i])); |
| 159 | current += srat_mem[i].length; |
| 160 | } |
| 161 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 162 | if (CONFIG(SOC_INTEL_HAS_CXL)) |
| 163 | current = cxl_fill_srat(current); |
| 164 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 165 | return current; |
| 166 | } |
| 167 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 168 | #if CONFIG(SOC_INTEL_SAPPHIRERAPIDS_SP) |
| 169 | /* |
| 170 | Because pds.num_pds comes from spr/numa.c function fill_pds(). |
| 171 | pds.num_pds = soc_get_num_cpus() + get_cxl_node_count(). |
| 172 | */ |
| 173 | /* SPR-SP platform has Generic Initiator domain in addition to processor domain */ |
| 174 | static unsigned long acpi_fill_slit(unsigned long current) |
| 175 | { |
| 176 | uint8_t *p = (uint8_t *)current; |
| 177 | /* According to table 5.60 of ACPI 6.4 spec, "Number of System Localities" field takes |
| 178 | up 8 bytes. Following that, each matrix entry takes up 1 byte. */ |
| 179 | memset(p, 0, 8 + pds.num_pds * pds.num_pds); |
| 180 | *p = (uint8_t)pds.num_pds; |
| 181 | p += 8; |
| 182 | |
| 183 | for (int i = 0; i < pds.num_pds; i++) { |
| 184 | for (int j = 0; j < pds.num_pds; j++) |
| 185 | p[i * pds.num_pds + j] = pds.pds[i].distances[j]; |
| 186 | } |
| 187 | |
| 188 | current += 8 + pds.num_pds * pds.num_pds; |
| 189 | return current; |
| 190 | } |
| 191 | #else |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 192 | static unsigned long acpi_fill_slit(unsigned long current) |
| 193 | { |
Marc Jones | 70907b0 | 2020-10-28 17:00:31 -0600 | [diff] [blame] | 194 | unsigned int nodes = soc_get_num_cpus(); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 195 | |
| 196 | uint8_t *p = (uint8_t *)current; |
| 197 | memset(p, 0, 8 + nodes * nodes); |
| 198 | *p = (uint8_t)nodes; |
| 199 | p += 8; |
| 200 | |
| 201 | /* this assumes fully connected socket topology */ |
| 202 | for (int i = 0; i < nodes; i++) { |
| 203 | for (int j = 0; j < nodes; j++) { |
| 204 | if (i == j) |
| 205 | p[i*nodes+j] = 10; |
| 206 | else |
| 207 | p[i*nodes+j] = 16; |
| 208 | } |
| 209 | } |
| 210 | |
| 211 | current += 8 + nodes * nodes; |
| 212 | return current; |
| 213 | } |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 214 | #endif |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 215 | |
| 216 | /* |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 217 | * This function adds PCIe bridge device entry in DMAR table. If it is called |
| 218 | * in the context of ATSR subtable, it adds ATSR subtable when it is first called. |
| 219 | */ |
| 220 | static unsigned long acpi_create_dmar_ds_pci_br_for_port(unsigned long current, |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 221 | const struct device *bridge_dev, |
| 222 | uint32_t pcie_seg, |
| 223 | bool is_atsr, bool *first) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 224 | { |
Arthur Heymans | 7fcd4d5 | 2023-08-24 15:12:19 +0200 | [diff] [blame] | 225 | const uint32_t bus = bridge_dev->upstream->secondary; |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 226 | const uint32_t dev = PCI_SLOT(bridge_dev->path.pci.devfn); |
| 227 | const uint32_t func = PCI_FUNC(bridge_dev->path.pci.devfn); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 228 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 229 | if (bus == 0) |
| 230 | return current; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 231 | |
| 232 | unsigned long atsr_size = 0; |
| 233 | unsigned long pci_br_size = 0; |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 234 | if (is_atsr == true && first && *first == true) { |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 235 | printk(BIOS_DEBUG, "[Root Port ATS Capability] Flags: 0x%x, " |
| 236 | "PCI Segment Number: 0x%x\n", 0, pcie_seg); |
| 237 | atsr_size = acpi_create_dmar_atsr(current, 0, pcie_seg); |
| 238 | *first = false; |
| 239 | } |
| 240 | |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 241 | printk(BIOS_DEBUG, " [PCI Bridge Device] %s\n", dev_path(bridge_dev)); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 242 | pci_br_size = acpi_create_dmar_ds_pci_br(current + atsr_size, bus, dev, func); |
| 243 | |
| 244 | return (atsr_size + pci_br_size); |
| 245 | } |
| 246 | |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 247 | static unsigned long acpi_create_drhd(unsigned long current, struct device *iommu, |
| 248 | const IIO_UDS *hob) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 249 | { |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 250 | unsigned long tmp = current; |
Shuo Liu | 6995efb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 251 | |
Shuo Liu | 6747acb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 252 | struct resource *resource; |
| 253 | resource = probe_resource(iommu, VTD_BAR_CSR); |
| 254 | if (!resource) |
| 255 | return current; |
| 256 | |
| 257 | uint32_t reg_base = resource->base; |
Martin L Roth | 092a139 | 2024-03-13 17:03:13 +0000 | [diff] [blame] | 258 | if (!reg_base) |
| 259 | return current; |
| 260 | |
Shuo Liu | 6747acb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 261 | const uint32_t bus = iommu->upstream->secondary; |
| 262 | uint32_t pcie_seg = iommu->upstream->segment_group; |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 263 | int socket = iio_pci_domain_socket_from_dev(iommu); |
| 264 | int stack = iio_pci_domain_stack_from_dev(iommu); |
Shuo Liu | 6747acb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 265 | |
| 266 | printk(BIOS_SPEW, "%s socket: %d, stack: %d, bus: 0x%x, pcie_seg: 0x%x, reg_base: 0x%x\n", |
| 267 | __func__, socket, stack, bus, pcie_seg, reg_base); |
| 268 | |
Arthur Heymans | a1c4ad3 | 2021-05-04 18:40:28 +0200 | [diff] [blame] | 269 | // Add DRHD Hardware Unit |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 270 | |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 271 | if (is_dev_on_domain0(iommu)) { |
Arthur Heymans | a1c4ad3 | 2021-05-04 18:40:28 +0200 | [diff] [blame] | 272 | printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, " |
| 273 | "Register Base Address: 0x%x\n", |
| 274 | DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base); |
| 275 | current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, |
| 276 | pcie_seg, reg_base); |
| 277 | } else { |
| 278 | printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, " |
| 279 | "Register Base Address: 0x%x\n", 0, pcie_seg, reg_base); |
| 280 | current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base); |
| 281 | } |
| 282 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 283 | // Add PCH IOAPIC |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 284 | if (is_dev_on_domain0(iommu)) { |
Shuo Liu | 1043080 | 2024-03-19 02:06:30 +0800 | [diff] [blame] | 285 | union p2sb_bdf ioapic_bdf = soc_get_ioapic_bdf(); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 286 | printk(BIOS_DEBUG, " [IOAPIC Device] Enumeration ID: 0x%x, PCI Bus Number: 0x%x, " |
Felix Held | 0d19289 | 2024-02-06 16:55:29 +0100 | [diff] [blame] | 287 | "PCI Path: 0x%x, 0x%x\n", get_ioapic_id(IO_APIC_ADDR), ioapic_bdf.bus, |
Patrick Rudolph | 57ddd68 | 2023-02-28 09:17:40 +0100 | [diff] [blame] | 288 | ioapic_bdf.dev, ioapic_bdf.fn); |
| 289 | current += acpi_create_dmar_ds_ioapic_from_hw(current, |
| 290 | IO_APIC_ADDR, ioapic_bdf.bus, ioapic_bdf.dev, ioapic_bdf.fn); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 291 | } |
| 292 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 293 | /* SPR has no per stack IOAPIC or CBDMA devices */ |
| 294 | #if CONFIG(SOC_INTEL_SKYLAKE_SP) || CONFIG(SOC_INTEL_COOPERLAKE_SP) |
| 295 | uint32_t enum_id; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 296 | // Add IOAPIC entry |
Arthur Heymans | a1cc557 | 2020-11-06 12:53:33 +0100 | [diff] [blame] | 297 | enum_id = soc_get_iio_ioapicid(socket, stack); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 298 | printk(BIOS_DEBUG, " [IOAPIC Device] Enumeration ID: 0x%x, PCI Bus Number: 0x%x, " |
| 299 | "PCI Path: 0x%x, 0x%x\n", enum_id, bus, APIC_DEV_NUM, APIC_FUNC_NUM); |
| 300 | current += acpi_create_dmar_ds_ioapic(current, enum_id, bus, |
| 301 | APIC_DEV_NUM, APIC_FUNC_NUM); |
| 302 | |
| 303 | // Add CBDMA devices for CSTACK |
| 304 | if (socket != 0 && stack == CSTACK) { |
| 305 | for (int cbdma_func_id = 0; cbdma_func_id < 8; ++cbdma_func_id) { |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 306 | printk(BIOS_DEBUG, " [PCI Endpoint Device] " |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 307 | "PCI Bus Number: 0x%x, PCI Path: 0x%x, 0x%x\n", |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 308 | bus, CBDMA_DEV_NUM, cbdma_func_id); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 309 | current += acpi_create_dmar_ds_pci(current, |
| 310 | bus, CBDMA_DEV_NUM, cbdma_func_id); |
| 311 | } |
| 312 | } |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 313 | #endif |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 314 | |
| 315 | // Add PCIe Ports |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 316 | if (!is_dev_on_domain0(iommu)) { |
Shuo Liu | 271ee07 | 2024-03-29 00:42:28 +0800 | [diff] [blame] | 317 | const struct device *domain = dev_get_domain(iommu); |
Shuo Liu | 6747acb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 318 | struct device *dev = NULL; |
| 319 | while ((dev = dev_bus_each_child(domain->downstream, dev))) |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 320 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) |
| 321 | current += |
| 322 | acpi_create_dmar_ds_pci_br_for_port( |
| 323 | current, dev, pcie_seg, false, NULL); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 324 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 325 | #if CONFIG(SOC_INTEL_SKYLAKE_SP) || CONFIG(SOC_INTEL_COOPERLAKE_SP) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 326 | // Add VMD |
| 327 | if (hob->PlatformData.VMDStackEnable[socket][stack] && |
| 328 | stack >= PSTACK0 && stack <= PSTACK2) { |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 329 | printk(BIOS_DEBUG, " [PCI Endpoint Device] " |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 330 | "PCI Bus Number: 0x%x, PCI Path: 0x%x, 0x%x\n", |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 331 | bus, VMD_DEV_NUM, VMD_FUNC_NUM); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 332 | current += acpi_create_dmar_ds_pci(current, |
| 333 | bus, VMD_DEV_NUM, VMD_FUNC_NUM); |
| 334 | } |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 335 | #endif |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 336 | } |
| 337 | |
Shuo Liu | 08f1f05 | 2024-01-20 02:52:17 +0800 | [diff] [blame] | 338 | // Add IOAT End Points (with memory resources. We don't report every End Point device.) |
Shuo Liu | 6747acb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 339 | if (CONFIG(HAVE_IOAT_DOMAINS) && is_dev_on_ioat_domain(iommu)) { |
| 340 | struct device *dev = NULL; |
| 341 | while ((dev = dev_find_all_devices_on_stack(socket, stack, |
| 342 | XEONSP_VENDOR_MAX, XEONSP_DEVICE_MAX, dev))) |
| 343 | /* This may also require a check for IORESOURCE_PREFETCH, |
| 344 | * but that would not include the FPU (4942/0) */ |
| 345 | if ((dev->resource_list->flags & |
| 346 | (IORESOURCE_MEM | IORESOURCE_PCI64 | IORESOURCE_ASSIGNED)) == |
| 347 | (IORESOURCE_MEM | IORESOURCE_PCI64 | IORESOURCE_ASSIGNED)) { |
| 348 | const uint32_t b = dev->upstream->secondary; |
| 349 | const uint32_t d = PCI_SLOT(dev->path.pci.devfn); |
| 350 | const uint32_t f = PCI_FUNC(dev->path.pci.devfn); |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 351 | printk(BIOS_DEBUG, " [PCIE Endpoint Device] %s\n", dev_path(dev)); |
Shuo Liu | 6747acb | 2024-03-08 19:15:28 +0800 | [diff] [blame] | 352 | current += acpi_create_dmar_ds_pci(current, b, d, f); |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 353 | } |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 354 | } |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 355 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 356 | // Add HPET |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 357 | if (is_dev_on_domain0(iommu)) { |
Elyes Haouas | 167b7fcd | 2022-12-11 10:38:35 +0100 | [diff] [blame] | 358 | uint16_t hpet_capid = read16p(HPET_BASE_ADDRESS); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 359 | uint16_t num_hpets = (hpet_capid >> 0x08) & 0x1F; // Bits [8:12] has hpet count |
| 360 | printk(BIOS_SPEW, "%s hpet_capid: 0x%x, num_hpets: 0x%x\n", |
| 361 | __func__, hpet_capid, num_hpets); |
| 362 | //BIT 15 |
| 363 | if (num_hpets && (num_hpets != 0x1f) && |
Elyes Haouas | 167b7fcd | 2022-12-11 10:38:35 +0100 | [diff] [blame] | 364 | (read32p(HPET_BASE_ADDRESS + 0x100) & (0x00008000))) { |
Shuo Liu | 1043080 | 2024-03-19 02:06:30 +0800 | [diff] [blame] | 365 | union p2sb_bdf hpet_bdf = soc_get_hpet_bdf(); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 366 | printk(BIOS_DEBUG, " [Message-capable HPET Device] Enumeration ID: 0x%x, " |
| 367 | "PCI Bus Number: 0x%x, PCI Path: 0x%x, 0x%x\n", |
Arthur Heymans | 695dd29 | 2020-11-12 21:05:09 +0100 | [diff] [blame] | 368 | 0, hpet_bdf.bus, hpet_bdf.dev, hpet_bdf.fn); |
| 369 | current += acpi_create_dmar_ds_msi_hpet(current, 0, hpet_bdf.bus, |
| 370 | hpet_bdf.dev, hpet_bdf.fn); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 371 | } |
| 372 | } |
| 373 | |
| 374 | acpi_dmar_drhd_fixup(tmp, current); |
| 375 | |
| 376 | return current; |
| 377 | } |
| 378 | |
Patrick Rudolph | abc2744 | 2024-03-12 14:48:16 +0100 | [diff] [blame] | 379 | static unsigned long acpi_create_atsr(unsigned long current) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 380 | { |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 381 | struct device *child, *dev; |
| 382 | struct resource *resource; |
| 383 | |
| 384 | /* |
| 385 | * The assumption made here is that the host bridges on a socket share the |
| 386 | * PCI segment group and thus only one ATSR header needs to be emitted for |
| 387 | * a single socket. |
| 388 | * This is easier than to sort the host bridges by PCI segment group first |
| 389 | * and then generate one ATSR header for every new segment. |
| 390 | */ |
Patrick Rudolph | abc2744 | 2024-03-12 14:48:16 +0100 | [diff] [blame] | 391 | for (int socket = 0; socket < CONFIG_MAX_SOCKET; ++socket) { |
Patrick Rudolph | ac02857 | 2023-07-14 17:44:33 +0200 | [diff] [blame] | 392 | if (!soc_cpu_is_enabled(socket)) |
| 393 | continue; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 394 | unsigned long tmp = current; |
| 395 | bool first = true; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 396 | |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 397 | dev = NULL; |
| 398 | while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { |
| 399 | /* Only add devices for the current socket */ |
| 400 | if (iio_pci_domain_socket_from_dev(dev) != socket) |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 401 | continue; |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 402 | /* See if there is a resource with the appropriate index. */ |
| 403 | resource = probe_resource(dev, VTD_BAR_CSR); |
| 404 | if (!resource) |
| 405 | continue; |
| 406 | int stack = iio_pci_domain_stack_from_dev(dev); |
| 407 | |
| 408 | uint64_t vtd_mmio_cap = read64(res2mmio(resource, VTD_EXT_CAP_LOW, 0)); |
| 409 | printk(BIOS_SPEW, "%s socket: %d, stack: %d, bus: 0x%x, vtd_base: %p, " |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 410 | "vtd_mmio_cap: 0x%llx\n", |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 411 | __func__, socket, stack, dev->upstream->secondary, |
| 412 | res2mmio(resource, 0, 0), vtd_mmio_cap); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 413 | |
| 414 | // ATSR is applicable only for platform supporting device IOTLBs |
| 415 | // through the VT-d extended capability register |
| 416 | assert(vtd_mmio_cap != 0xffffffffffffffff); |
| 417 | if ((vtd_mmio_cap & 0x4) == 0) // BIT 2 |
| 418 | continue; |
| 419 | |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 420 | if (dev->upstream->secondary == 0 && dev->upstream->segment_group == 0) |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 421 | continue; |
| 422 | |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 423 | for (child = dev->upstream->children; child; child = child->sibling) { |
| 424 | if ((child->hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) |
| 425 | continue; |
| 426 | current += |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 427 | acpi_create_dmar_ds_pci_br_for_port( |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 428 | current, child, child->upstream->segment_group, true, &first); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 429 | } |
| 430 | } |
| 431 | if (tmp != current) |
| 432 | acpi_dmar_atsr_fixup(tmp, current); |
| 433 | } |
| 434 | |
| 435 | return current; |
| 436 | } |
| 437 | |
| 438 | static unsigned long acpi_create_rmrr(unsigned long current) |
| 439 | { |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 440 | return current; |
| 441 | } |
| 442 | |
| 443 | static unsigned long acpi_create_rhsa(unsigned long current) |
| 444 | { |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 445 | struct device *dev = NULL; |
| 446 | struct resource *resource; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 447 | |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 448 | while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { |
| 449 | /* See if there is a resource with the appropriate index. */ |
| 450 | resource = probe_resource(dev, VTD_BAR_CSR); |
| 451 | if (!resource) |
Patrick Rudolph | ac02857 | 2023-07-14 17:44:33 +0200 | [diff] [blame] | 452 | continue; |
Patrick Rudolph | ac02857 | 2023-07-14 17:44:33 +0200 | [diff] [blame] | 453 | |
Patrick Rudolph | 425e421 | 2024-02-15 16:30:16 +0100 | [diff] [blame] | 454 | printk(BIOS_DEBUG, "[Remapping Hardware Static Affinity] Base Address: %p, " |
Shuo Liu | 5ed9fe9 | 2024-03-26 21:27:52 +0800 | [diff] [blame] | 455 | "Proximity Domain: 0x%x\n", res2mmio(resource, 0, 0), device_to_pd(dev)); |
| 456 | current += acpi_create_dmar_rhsa(current, (uintptr_t)res2mmio(resource, 0, 0), device_to_pd(dev)); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | return current; |
| 460 | } |
| 461 | |
Shuo Liu | a0b7c06 | 2024-03-06 00:24:02 +0800 | [diff] [blame] | 462 | static unsigned long xeonsp_create_satc(unsigned long current, struct device *domain) |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 463 | { |
Shuo Liu | a0b7c06 | 2024-03-06 00:24:02 +0800 | [diff] [blame] | 464 | struct device *dev = NULL; |
| 465 | while ((dev = dev_bus_each_child(domain->downstream, dev))) { |
| 466 | if (pciexp_find_extended_cap(dev, PCIE_EXT_CAP_ID_ATS, 0)) { |
| 467 | const uint32_t b = domain->downstream->secondary; |
| 468 | const uint32_t d = PCI_SLOT(dev->path.pci.devfn); |
| 469 | const uint32_t f = PCI_FUNC(dev->path.pci.devfn); |
Patrick Rudolph | 686d810 | 2024-03-12 19:34:27 +0100 | [diff] [blame] | 470 | printk(BIOS_DEBUG, " [SATC Endpoint Device] %s\n", dev_path(dev)); |
Shuo Liu | a0b7c06 | 2024-03-06 00:24:02 +0800 | [diff] [blame] | 471 | current += acpi_create_dmar_ds_pci(current, b, d, f); |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 472 | } |
| 473 | } |
| 474 | return current; |
| 475 | } |
| 476 | |
| 477 | /* SoC Integrated Address Translation Cache */ |
Shuo Liu | a0b7c06 | 2024-03-06 00:24:02 +0800 | [diff] [blame] | 478 | static unsigned long acpi_create_satc(unsigned long current) |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 479 | { |
Patrick Rudolph | d425e88 | 2024-03-08 09:49:15 +0100 | [diff] [blame] | 480 | unsigned long tmp = current, seg = ~0; |
| 481 | struct device *dev; |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 482 | |
Patrick Rudolph | d425e88 | 2024-03-08 09:49:15 +0100 | [diff] [blame] | 483 | /* |
| 484 | * Best case only PCI segment group count SATC headers are emitted, worst |
| 485 | * case for every SATC entry a new SATC header is being generated. |
| 486 | * |
| 487 | * The assumption made here is that the host bridges on a socket share the |
| 488 | * PCI segment group and thus only one SATC header needs to be emitted for |
| 489 | * a single socket. |
| 490 | * This is easier than to sort the host bridges by PCI segment group first |
| 491 | * and then generate one SATC header for every new segment. |
| 492 | * |
| 493 | * With this assumption the best case scenario should always be used. |
| 494 | */ |
| 495 | for (int socket = 0; socket < CONFIG_MAX_SOCKET; ++socket) { |
| 496 | if (!soc_cpu_is_enabled(socket)) |
| 497 | continue; |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 498 | |
Patrick Rudolph | d425e88 | 2024-03-08 09:49:15 +0100 | [diff] [blame] | 499 | dev = NULL; |
| 500 | while ((dev = dev_find_path(dev, DEVICE_PATH_DOMAIN))) { |
| 501 | /* Only add devices for the current socket */ |
| 502 | if (iio_pci_domain_socket_from_dev(dev) != socket) |
| 503 | continue; |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 504 | |
Patrick Rudolph | d425e88 | 2024-03-08 09:49:15 +0100 | [diff] [blame] | 505 | if (seg != dev->downstream->segment_group) { |
| 506 | // Close previous header |
| 507 | if (tmp != current) |
| 508 | acpi_dmar_satc_fixup(tmp, current); |
| 509 | |
| 510 | seg = dev->downstream->segment_group; |
| 511 | tmp = current; |
| 512 | printk(BIOS_DEBUG, "[SATC Segment Header] " |
| 513 | "Flags: 0x%x, PCI segment group: %lx\n", 0, seg); |
| 514 | // Add the SATC header |
| 515 | current += acpi_create_dmar_satc(current, 0, seg); |
| 516 | } |
| 517 | current = xeonsp_create_satc(current, dev); |
| 518 | } |
| 519 | } |
| 520 | if (tmp != current) |
| 521 | acpi_dmar_satc_fixup(tmp, current); |
| 522 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 523 | return current; |
| 524 | } |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 525 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 526 | static unsigned long acpi_fill_dmar(unsigned long current) |
| 527 | { |
Arthur Heymans | 83b2622 | 2020-11-06 11:50:55 +0100 | [diff] [blame] | 528 | const IIO_UDS *hob = get_iio_uds(); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 529 | |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 530 | // DRHD - iommu0 must be the last DRHD entry. |
| 531 | struct device *dev = NULL; |
| 532 | struct device *iommu0 = NULL; |
| 533 | while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { |
Shuo Liu | 271ee07 | 2024-03-29 00:42:28 +0800 | [diff] [blame] | 534 | if (is_domain0(dev_get_domain(dev))) { |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 535 | iommu0 = dev; |
Patrick Rudolph | ac02857 | 2023-07-14 17:44:33 +0200 | [diff] [blame] | 536 | continue; |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 537 | } |
| 538 | current = acpi_create_drhd(current, dev, hob); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 539 | } |
Shuo Liu | 8627112 | 2024-03-12 02:02:05 +0800 | [diff] [blame] | 540 | assert(iommu0); |
| 541 | current = acpi_create_drhd(current, iommu0, hob); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 542 | |
| 543 | // RMRR |
| 544 | current = acpi_create_rmrr(current); |
| 545 | |
| 546 | // Root Port ATS Capability |
Patrick Rudolph | abc2744 | 2024-03-12 14:48:16 +0100 | [diff] [blame] | 547 | current = acpi_create_atsr(current); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 548 | |
| 549 | // RHSA |
| 550 | current = acpi_create_rhsa(current); |
| 551 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 552 | // SATC |
Shuo Liu | a0b7c06 | 2024-03-06 00:24:02 +0800 | [diff] [blame] | 553 | current = acpi_create_satc(current); |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 554 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 555 | return current; |
| 556 | } |
| 557 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 558 | unsigned long northbridge_write_acpi_tables(const struct device *device, unsigned long current, |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 559 | struct acpi_rsdp *rsdp) |
| 560 | { |
Shuo Liu | 255f927 | 2023-03-29 20:14:11 +0800 | [diff] [blame] | 561 | /* Only write uncore ACPI tables for domain0 */ |
| 562 | if (device->path.domain.domain != 0) |
| 563 | return current; |
| 564 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 565 | acpi_srat_t *srat; |
| 566 | acpi_slit_t *slit; |
| 567 | acpi_dmar_t *dmar; |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 568 | acpi_hmat_t *hmat; |
| 569 | acpi_cedt_t *cedt; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 570 | |
| 571 | const config_t *const config = config_of(device); |
| 572 | |
| 573 | /* SRAT */ |
Elyes Haouas | d6b6b22 | 2022-10-10 12:34:21 +0200 | [diff] [blame] | 574 | current = ALIGN_UP(current, 8); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 575 | printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); |
Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 576 | srat = (acpi_srat_t *)current; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 577 | acpi_create_srat(srat, acpi_fill_srat); |
| 578 | current += srat->header.length; |
| 579 | acpi_add_table(rsdp, srat); |
| 580 | |
| 581 | /* SLIT */ |
Elyes Haouas | d6b6b22 | 2022-10-10 12:34:21 +0200 | [diff] [blame] | 582 | current = ALIGN_UP(current, 8); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 583 | printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); |
Elyes Haouas | 9018dee | 2022-11-18 15:07:33 +0100 | [diff] [blame] | 584 | slit = (acpi_slit_t *)current; |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 585 | acpi_create_slit(slit, acpi_fill_slit); |
| 586 | current += slit->header.length; |
| 587 | acpi_add_table(rsdp, slit); |
| 588 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 589 | if (CONFIG(SOC_INTEL_HAS_CXL)) { |
| 590 | /* HMAT*/ |
| 591 | current = ALIGN_UP(current, 8); |
| 592 | printk(BIOS_DEBUG, "ACPI: * HMAT at %lx\n", current); |
| 593 | hmat = (acpi_hmat_t *)current; |
| 594 | acpi_create_hmat(hmat, acpi_fill_hmat); |
| 595 | current += hmat->header.length; |
| 596 | acpi_add_table(rsdp, hmat); |
| 597 | } |
| 598 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 599 | /* DMAR */ |
| 600 | if (config->vtd_support) { |
Elyes Haouas | d6b6b22 | 2022-10-10 12:34:21 +0200 | [diff] [blame] | 601 | current = ALIGN_UP(current, 8); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 602 | dmar = (acpi_dmar_t *)current; |
Marc Jones | b7e591e | 2020-11-13 15:55:31 -0700 | [diff] [blame] | 603 | enum dmar_flags flags = DMAR_INTR_REMAP; |
| 604 | |
| 605 | /* SKX FSP doesn't support X2APIC, but CPX FSP does */ |
| 606 | if (CONFIG(SOC_INTEL_SKYLAKE_SP)) |
| 607 | flags |= DMAR_X2APIC_OPT_OUT; |
| 608 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 609 | printk(BIOS_DEBUG, "ACPI: * DMAR at %lx\n", current); |
Marc Jones | b7e591e | 2020-11-13 15:55:31 -0700 | [diff] [blame] | 610 | printk(BIOS_DEBUG, "[DMA Remapping table] Flags: 0x%x\n", flags); |
| 611 | acpi_create_dmar(dmar, flags, acpi_fill_dmar); |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 612 | current += dmar->header.length; |
| 613 | current = acpi_align_current(current); |
| 614 | acpi_add_table(rsdp, dmar); |
| 615 | } |
| 616 | |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 617 | if (CONFIG(SOC_INTEL_HAS_CXL)) { |
| 618 | /* CEDT: CXL Early Discovery Table */ |
| 619 | if (get_cxl_node_count() > 0) { |
| 620 | current = ALIGN_UP(current, 8); |
| 621 | printk(BIOS_DEBUG, "ACPI: * CEDT at %lx\n", current); |
| 622 | cedt = (acpi_cedt_t *)current; |
| 623 | acpi_create_cedt(cedt, acpi_fill_cedt); |
| 624 | current += cedt->header.length; |
| 625 | acpi_add_table(rsdp, cedt); |
| 626 | } |
| 627 | } |
| 628 | |
| 629 | if (CONFIG(SOC_ACPI_HEST)) { |
| 630 | printk(BIOS_DEBUG, "ACPI: * HEST at %lx\n", current); |
Rocky Phagura | d4db36e | 2021-04-03 08:49:32 -0700 | [diff] [blame] | 631 | current = hest_create(current, rsdp); |
Tim Chu | 5c19640 | 2022-12-13 12:09:44 +0000 | [diff] [blame] | 632 | } |
Rocky Phagura | d4db36e | 2021-04-03 08:49:32 -0700 | [diff] [blame] | 633 | |
Marc Jones | 97321db | 2020-09-28 23:35:08 -0600 | [diff] [blame] | 634 | return current; |
| 635 | } |