soc/intel/xeon_sp: Use fixed BDF for IBL
Integrated Boot Logic (IBL) codes doesn't support bootloader
controlled Primary-to-Sideband Bridge (P2SB) hidden and unhidden.
Hence, dynamically read IBL HPET/IOAPIC Bus:Device.Function (BDF)
by bootloader is not supported, because when P2SB is hidden the
register access is denied.
TEST=Build and boot on intel/archercity CRB
TEST=Build on intel/avenuecity CRB
TEST=Build on intel/beechnutcity CRB
Change-Id: I3975cb00e215c4984c63bb8510e8aef7d4cc85a4
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81321
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c
index c9e8ccb..95f1492 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi.c
@@ -18,7 +18,6 @@
#include <soc/pci_devs.h>
#include <soc/soc_util.h>
#include <soc/util.h>
-#include <intelblocks/p2sb.h>
#include "chip.h"
/* NUMA related ACPI table generation. SRAT, SLIT, etc */
@@ -283,7 +282,7 @@
// Add PCH IOAPIC
if (is_dev_on_domain0(iommu)) {
- union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf();
+ union p2sb_bdf ioapic_bdf = soc_get_ioapic_bdf();
printk(BIOS_DEBUG, " [IOAPIC Device] Enumeration ID: 0x%x, PCI Bus Number: 0x%x, "
"PCI Path: 0x%x, 0x%x\n", get_ioapic_id(IO_APIC_ADDR), ioapic_bdf.bus,
ioapic_bdf.dev, ioapic_bdf.fn);
@@ -363,7 +362,7 @@
//BIT 15
if (num_hpets && (num_hpets != 0x1f) &&
(read32p(HPET_BASE_ADDRESS + 0x100) & (0x00008000))) {
- union p2sb_bdf hpet_bdf = p2sb_get_hpet_bdf();
+ union p2sb_bdf hpet_bdf = soc_get_hpet_bdf();
printk(BIOS_DEBUG, " [Message-capable HPET Device] Enumeration ID: 0x%x, "
"PCI Bus Number: 0x%x, PCI Path: 0x%x, 0x%x\n",
0, hpet_bdf.bus, hpet_bdf.dev, hpet_bdf.fn);