device/device_util: Rename dev_get_pci_domain
In coreboot, domain indicates hardware units that provide/group
resource windows, For Xeon-SP, domains are PCIe compatible and
further function in many aspects, e.g. PCIe, CXL, IOAT, UBOX.
Rename dev_get_pci_domain to dev_get_domain to align with coreboot
concept and distinguish from Xeon-SP concept.
TEST=Build and boot on intel/archercity CRB
Change-Id: I51b18b30fb41038869ea1384b01091da31a895b9
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c
index bf9a44a..bcfb4da 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi.c
@@ -315,7 +315,7 @@
// Add PCIe Ports
if (!is_dev_on_domain0(iommu)) {
- const struct device *domain = dev_get_pci_domain(iommu);
+ const struct device *domain = dev_get_domain(iommu);
struct device *dev = NULL;
while ((dev = dev_bus_each_child(domain->downstream, dev)))
if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE)
@@ -535,7 +535,7 @@
struct device *dev = NULL;
struct device *iommu0 = NULL;
while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) {
- if (is_domain0(dev_get_pci_domain(dev))) {
+ if (is_domain0(dev_get_domain(dev))) {
iommu0 = dev;
continue;
}