Martin Roth | 7d86f34 | 2024-02-16 11:04:02 -0700 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
Martin Roth | d51141e | 2022-06-22 21:11:59 -0600 | [diff] [blame] | 3 | config INTEL_HAS_TOP_SWAP |
| 4 | bool |
| 5 | help |
| 6 | Set this config if the Intel SoC supports top swap feature |
| 7 | |
| 8 | if INTEL_HAS_TOP_SWAP |
| 9 | |
| 10 | config INTEL_ADD_TOP_SWAP_BOOTBLOCK |
| 11 | bool "Include a Top swap bootblock" |
| 12 | default n |
| 13 | help |
| 14 | Intel PCH/Southbridges have feature that it is possible to have |
| 15 | the southbridge/PCH look for the bootblock at a 64K or |
| 16 | 128K/256K/512K/1MB (in case of newer SoCs) offset |
| 17 | instead of the usual top of flash. |
| 18 | Select this to put a 'second' bootblock. |
| 19 | |
| 20 | config INTEL_TOP_SWAP_BOOTBLOCK_SIZE |
| 21 | hex "Size of top swap boot block" |
| 22 | depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK |
| 23 | default 0x10000 |
| 24 | help |
| 25 | Set this config to a supported topswap size. |
| 26 | Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000 |
| 27 | |
| 28 | config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG |
| 29 | string |
| 30 | depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK |
| 31 | help |
| 32 | Use this config to specify the name of a FMAP region (which should |
| 33 | hold a microcode) whose address as the first entry in the topswap FIT. |
| 34 | This is useful in creating a asymmetric FIT in top swap bootblock |
| 35 | than the one in non-topswap bootblock. This string will be passed |
| 36 | onto ifittool (-A -n option). ifittool will not parse the region for MCU |
| 37 | entries, and only locate the region and insert its address into FIT. |
| 38 | |
| 39 | endif |
| 40 | |
Stefan Reinauer | 9616f3c | 2015-04-29 10:45:22 -0700 | [diff] [blame] | 41 | config SOC_INTEL_COMMON |
| 42 | bool |
Felix Held | bc6a690 | 2023-11-09 14:08:53 +0100 | [diff] [blame] | 43 | select AZALIA_HDA_CODEC_SUPPORT |
Kyösti Mälkki | 3139c8d | 2020-06-28 16:33:33 +0300 | [diff] [blame] | 44 | select ACPI_SOC_NVS |
Stefan Reinauer | 9616f3c | 2015-04-29 10:45:22 -0700 | [diff] [blame] | 45 | help |
| 46 | common code for Intel SOCs |
| 47 | |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 48 | if SOC_INTEL_COMMON |
| 49 | |
Subrata Banik | 0180e43 | 2020-09-18 14:42:03 +0530 | [diff] [blame] | 50 | comment "Intel SoC Common Code for IP blocks" |
Subrata Banik | 9a0245a | 2017-02-22 14:22:44 +0530 | [diff] [blame] | 51 | source "src/soc/intel/common/block/Kconfig" |
| 52 | |
Subrata Banik | 19cd07f | 2018-05-17 13:53:29 +0530 | [diff] [blame] | 53 | comment "Intel SoC Common PCH Code" |
| 54 | source "src/soc/intel/common/pch/Kconfig" |
| 55 | |
Subrata Banik | 0180e43 | 2020-09-18 14:42:03 +0530 | [diff] [blame] | 56 | comment "Intel SoC Common coreboot stages and non-IP blocks" |
Subrata Banik | 90d3b2b | 2018-04-19 10:23:30 +0530 | [diff] [blame] | 57 | source "src/soc/intel/common/basecode/Kconfig" |
| 58 | |
Lee Leahy | 14ecb54 | 2015-02-09 21:16:14 -0800 | [diff] [blame] | 59 | config SOC_INTEL_COMMON_RESET |
| 60 | bool |
| 61 | default n |
Patrick Rudolph | f677d17 | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 62 | select HAVE_CF9_RESET |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 63 | |
Duncan Laurie | 63ebc80 | 2015-09-08 16:09:28 -0700 | [diff] [blame] | 64 | config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE |
| 65 | bool |
| 66 | default n |
| 67 | |
Subrata Banik | c1645fa | 2016-08-05 18:25:55 +0530 | [diff] [blame] | 68 | config ACPI_CONSOLE |
| 69 | bool |
| 70 | default n |
| 71 | help |
| 72 | Provide a mechanism for serial console based ACPI debug. |
| 73 | |
Benjamin Doron | bbb8123 | 2020-06-28 02:43:53 +0000 | [diff] [blame] | 74 | config PAVP |
| 75 | bool "Enable PAVP (Protected Audio-Video Path) support" |
| 76 | default y |
| 77 | help |
| 78 | Protected Audio-Video Path is an Intel technology used to enforce digital |
| 79 | rights protections on multimedia content. Streaming or other media playback |
| 80 | services may require it to be enabled for correct functioning. |
| 81 | |
| 82 | Users might disable PAVP if the concept of digital rights management (DRM) |
| 83 | offends them, or if they have concerns about the security of |
| 84 | the Management Engine, which is where this technology is implemented. |
| 85 | |
| 86 | Set this option to n to disable support. |
| 87 | |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 88 | config MMA |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 89 | bool "Enable MMA (Memory Margin Analysis) support for Intel Core" |
Martin Roth | dde96fb | 2015-11-25 22:33:20 -0700 | [diff] [blame] | 90 | default n |
Pratik Prajapati | ebb7994 | 2017-04-10 15:47:09 -0700 | [diff] [blame] | 91 | depends on SOC_INTEL_KABYLAKE || SOC_INTEL_SKYLAKE |
Martin Roth | dde96fb | 2015-11-25 22:33:20 -0700 | [diff] [blame] | 92 | help |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 93 | Set this option to y to enable MMA (Memory Margin Analysis) support |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 94 | |
| 95 | config MMA_BLOBS_PATH |
Martin Roth | dde96fb | 2015-11-25 22:33:20 -0700 | [diff] [blame] | 96 | string "Path to MMA blobs" |
| 97 | depends on MMA |
Pratik Prajapati | ebb7994 | 2017-04-10 15:47:09 -0700 | [diff] [blame] | 98 | default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE |
| 99 | default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 100 | |
Aaron Durbin | c14a1a9 | 2016-06-28 15:41:07 -0500 | [diff] [blame] | 101 | config SOC_INTEL_COMMON_NHLT |
| 102 | bool |
| 103 | default n |
| 104 | |
Aaron Durbin | 9d9a121 | 2017-04-19 10:02:27 -0500 | [diff] [blame] | 105 | config TPM_TIS_ACPI_INTERRUPT |
| 106 | int |
| 107 | help |
| 108 | acpi_get_gpe() is used to provide interrupt status to TPM layer. |
| 109 | This option specifies the GPE number. |
| 110 | |
Kane Chen | f5e8b29 | 2019-04-17 10:42:00 +0800 | [diff] [blame] | 111 | config SOC_INTEL_DEBUG_CONSENT |
| 112 | bool "Enable SOC debug interface" |
| 113 | default n |
| 114 | help |
| 115 | Set this option to enable default debug interface of SoC such as DBC |
| 116 | or DCI. |
| 117 | |
Jeremy Compostella | 1dc080f | 2022-06-10 17:11:49 -0700 | [diff] [blame] | 118 | config HAVE_INTEL_COMPLIANCE_TEST_MODE |
| 119 | def_bool n |
| 120 | |
| 121 | config SOC_INTEL_COMPLIANCE_TEST_MODE |
| 122 | bool "Enable SoC hardware compliance test mode" |
| 123 | depends on HAVE_INTEL_COMPLIANCE_TEST_MODE |
| 124 | default n |
| 125 | help |
| 126 | Set this option to configure hardware components in a way |
| 127 | that supports compliance testing activities for various |
| 128 | components such PCIe or USB. For example, PCI express |
| 129 | implementation must comply with the hardware PCIe |
| 130 | specification requirements: Electrical, Configuration, Link |
| 131 | Protocol and Transaction Protocol. The hardware must be |
| 132 | configured in a particular state to run the compliance |
| 133 | tests: some feature related to power management needs to be |
| 134 | turned off, hot plug should be enabled... |
| 135 | |
Kane Chen | 7b2a889 | 2019-07-03 10:24:15 +0800 | [diff] [blame] | 136 | config SMM_MODULE_STACK_SIZE |
| 137 | hex |
| 138 | default 0x800 |
| 139 | |
Curtis Chen | b89c798 | 2021-12-07 18:01:57 +0800 | [diff] [blame] | 140 | config SOC_INTEL_CRASHLOG |
| 141 | def_bool n |
| 142 | select SOC_INTEL_COMMON_BLOCK_CRASHLOG |
| 143 | select ACPI_BERT |
| 144 | help |
| 145 | Enables Crashlog. |
| 146 | |
| 147 | config SOC_INTEL_CRASHLOG_ON_RESET |
| 148 | def_bool n |
| 149 | help |
| 150 | Enables the PMC to collect crashlog records on every reset event. NOTE: |
| 151 | This will result in a BERT table being populated containing a PMC |
| 152 | crashlog record on every boot. |
| 153 | |
Pratikkumar Prajapati | e4893d6 | 2023-05-30 12:30:36 -0700 | [diff] [blame] | 154 | config SOC_INTEL_IOE_DIE_SUPPORT |
| 155 | def_bool n |
| 156 | help |
| 157 | Enable this config if the SOC support IOE DIE. |
| 158 | |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 159 | endif # SOC_INTEL_COMMON |