Martin Roth | d51141e | 2022-06-22 21:11:59 -0600 | [diff] [blame] | 1 | config INTEL_HAS_TOP_SWAP |
| 2 | bool |
| 3 | help |
| 4 | Set this config if the Intel SoC supports top swap feature |
| 5 | |
| 6 | if INTEL_HAS_TOP_SWAP |
| 7 | |
| 8 | config INTEL_ADD_TOP_SWAP_BOOTBLOCK |
| 9 | bool "Include a Top swap bootblock" |
| 10 | default n |
| 11 | help |
| 12 | Intel PCH/Southbridges have feature that it is possible to have |
| 13 | the southbridge/PCH look for the bootblock at a 64K or |
| 14 | 128K/256K/512K/1MB (in case of newer SoCs) offset |
| 15 | instead of the usual top of flash. |
| 16 | Select this to put a 'second' bootblock. |
| 17 | |
| 18 | config INTEL_TOP_SWAP_BOOTBLOCK_SIZE |
| 19 | hex "Size of top swap boot block" |
| 20 | depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK |
| 21 | default 0x10000 |
| 22 | help |
| 23 | Set this config to a supported topswap size. |
| 24 | Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000 |
| 25 | |
| 26 | config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG |
| 27 | string |
| 28 | depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK |
| 29 | help |
| 30 | Use this config to specify the name of a FMAP region (which should |
| 31 | hold a microcode) whose address as the first entry in the topswap FIT. |
| 32 | This is useful in creating a asymmetric FIT in top swap bootblock |
| 33 | than the one in non-topswap bootblock. This string will be passed |
| 34 | onto ifittool (-A -n option). ifittool will not parse the region for MCU |
| 35 | entries, and only locate the region and insert its address into FIT. |
| 36 | |
| 37 | endif |
| 38 | |
Stefan Reinauer | 9616f3c | 2015-04-29 10:45:22 -0700 | [diff] [blame] | 39 | config SOC_INTEL_COMMON |
| 40 | bool |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame] | 41 | select AZALIA_PLUGIN_SUPPORT |
Kyösti Mälkki | 3139c8d | 2020-06-28 16:33:33 +0300 | [diff] [blame] | 42 | select ACPI_SOC_NVS |
Stefan Reinauer | 9616f3c | 2015-04-29 10:45:22 -0700 | [diff] [blame] | 43 | help |
| 44 | common code for Intel SOCs |
| 45 | |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 46 | if SOC_INTEL_COMMON |
| 47 | |
Subrata Banik | 0180e43 | 2020-09-18 14:42:03 +0530 | [diff] [blame] | 48 | comment "Intel SoC Common Code for IP blocks" |
Subrata Banik | 9a0245a | 2017-02-22 14:22:44 +0530 | [diff] [blame] | 49 | source "src/soc/intel/common/block/Kconfig" |
| 50 | |
Subrata Banik | 19cd07f | 2018-05-17 13:53:29 +0530 | [diff] [blame] | 51 | comment "Intel SoC Common PCH Code" |
| 52 | source "src/soc/intel/common/pch/Kconfig" |
| 53 | |
Subrata Banik | 0180e43 | 2020-09-18 14:42:03 +0530 | [diff] [blame] | 54 | comment "Intel SoC Common coreboot stages and non-IP blocks" |
Subrata Banik | 90d3b2b | 2018-04-19 10:23:30 +0530 | [diff] [blame] | 55 | source "src/soc/intel/common/basecode/Kconfig" |
| 56 | |
Lee Leahy | 14ecb54 | 2015-02-09 21:16:14 -0800 | [diff] [blame] | 57 | config SOC_INTEL_COMMON_RESET |
| 58 | bool |
| 59 | default n |
Patrick Rudolph | f677d17 | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 60 | select HAVE_CF9_RESET |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 61 | |
Duncan Laurie | 63ebc80 | 2015-09-08 16:09:28 -0700 | [diff] [blame] | 62 | config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE |
| 63 | bool |
| 64 | default n |
| 65 | |
Subrata Banik | c1645fa | 2016-08-05 18:25:55 +0530 | [diff] [blame] | 66 | config ACPI_CONSOLE |
| 67 | bool |
| 68 | default n |
| 69 | help |
| 70 | Provide a mechanism for serial console based ACPI debug. |
| 71 | |
Benjamin Doron | bbb8123 | 2020-06-28 02:43:53 +0000 | [diff] [blame] | 72 | config PAVP |
| 73 | bool "Enable PAVP (Protected Audio-Video Path) support" |
| 74 | default y |
| 75 | help |
| 76 | Protected Audio-Video Path is an Intel technology used to enforce digital |
| 77 | rights protections on multimedia content. Streaming or other media playback |
| 78 | services may require it to be enabled for correct functioning. |
| 79 | |
| 80 | Users might disable PAVP if the concept of digital rights management (DRM) |
| 81 | offends them, or if they have concerns about the security of |
| 82 | the Management Engine, which is where this technology is implemented. |
| 83 | |
| 84 | Set this option to n to disable support. |
| 85 | |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 86 | config MMA |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 87 | bool "Enable MMA (Memory Margin Analysis) support for Intel Core" |
Martin Roth | dde96fb | 2015-11-25 22:33:20 -0700 | [diff] [blame] | 88 | default n |
Pratik Prajapati | ebb7994 | 2017-04-10 15:47:09 -0700 | [diff] [blame] | 89 | depends on SOC_INTEL_KABYLAKE || SOC_INTEL_SKYLAKE |
Martin Roth | dde96fb | 2015-11-25 22:33:20 -0700 | [diff] [blame] | 90 | help |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 91 | Set this option to y to enable MMA (Memory Margin Analysis) support |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 92 | |
| 93 | config MMA_BLOBS_PATH |
Martin Roth | dde96fb | 2015-11-25 22:33:20 -0700 | [diff] [blame] | 94 | string "Path to MMA blobs" |
| 95 | depends on MMA |
Pratik Prajapati | ebb7994 | 2017-04-10 15:47:09 -0700 | [diff] [blame] | 96 | default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE |
| 97 | default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE |
Pratik Prajapati | b90b94d | 2015-09-11 13:51:38 -0700 | [diff] [blame] | 98 | |
Aaron Durbin | c14a1a9 | 2016-06-28 15:41:07 -0500 | [diff] [blame] | 99 | config SOC_INTEL_COMMON_NHLT |
| 100 | bool |
| 101 | default n |
| 102 | |
Aaron Durbin | 9d9a121 | 2017-04-19 10:02:27 -0500 | [diff] [blame] | 103 | config TPM_TIS_ACPI_INTERRUPT |
| 104 | int |
| 105 | help |
| 106 | acpi_get_gpe() is used to provide interrupt status to TPM layer. |
| 107 | This option specifies the GPE number. |
| 108 | |
Kane Chen | f5e8b29 | 2019-04-17 10:42:00 +0800 | [diff] [blame] | 109 | config SOC_INTEL_DEBUG_CONSENT |
| 110 | bool "Enable SOC debug interface" |
| 111 | default n |
| 112 | help |
| 113 | Set this option to enable default debug interface of SoC such as DBC |
| 114 | or DCI. |
| 115 | |
Jeremy Compostella | 1dc080f | 2022-06-10 17:11:49 -0700 | [diff] [blame] | 116 | config HAVE_INTEL_COMPLIANCE_TEST_MODE |
| 117 | def_bool n |
| 118 | |
| 119 | config SOC_INTEL_COMPLIANCE_TEST_MODE |
| 120 | bool "Enable SoC hardware compliance test mode" |
| 121 | depends on HAVE_INTEL_COMPLIANCE_TEST_MODE |
| 122 | default n |
| 123 | help |
| 124 | Set this option to configure hardware components in a way |
| 125 | that supports compliance testing activities for various |
| 126 | components such PCIe or USB. For example, PCI express |
| 127 | implementation must comply with the hardware PCIe |
| 128 | specification requirements: Electrical, Configuration, Link |
| 129 | Protocol and Transaction Protocol. The hardware must be |
| 130 | configured in a particular state to run the compliance |
| 131 | tests: some feature related to power management needs to be |
| 132 | turned off, hot plug should be enabled... |
| 133 | |
Kane Chen | 7b2a889 | 2019-07-03 10:24:15 +0800 | [diff] [blame] | 134 | config SMM_MODULE_STACK_SIZE |
| 135 | hex |
| 136 | default 0x800 |
| 137 | |
Curtis Chen | b89c798 | 2021-12-07 18:01:57 +0800 | [diff] [blame] | 138 | config SOC_INTEL_CRASHLOG |
| 139 | def_bool n |
| 140 | select SOC_INTEL_COMMON_BLOCK_CRASHLOG |
| 141 | select ACPI_BERT |
| 142 | help |
| 143 | Enables Crashlog. |
| 144 | |
| 145 | config SOC_INTEL_CRASHLOG_ON_RESET |
| 146 | def_bool n |
| 147 | help |
| 148 | Enables the PMC to collect crashlog records on every reset event. NOTE: |
| 149 | This will result in a BERT table being populated containing a PMC |
| 150 | crashlog record on every boot. |
| 151 | |
Pratikkumar Prajapati | e4893d6 | 2023-05-30 12:30:36 -0700 | [diff] [blame^] | 152 | config SOC_INTEL_IOE_DIE_SUPPORT |
| 153 | def_bool n |
| 154 | help |
| 155 | Enable this config if the SOC support IOE DIE. |
| 156 | |
Lee Leahy | 0946ec3 | 2015-04-20 15:24:54 -0700 | [diff] [blame] | 157 | endif # SOC_INTEL_COMMON |