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review.coreboot.org / coreboot / 06575901cfd47fb02706f253a7b335aeb70664cd / . / src / soc / nvidia / tegra124 / sdram_lp0.c
blob: 5361780919eab4307fe1f0956923552eba8432c0 [file] [log] [blame]
Angel Ponsa2ee7612020-04-04 18:51:15 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]2
3#include <arch/cache.h>
4#include <console/console.h>
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]5#include <soc/addressmap.h>
Julius Wernerf0d21ff32014-10-20 13:24:14 -0700[diff] [blame]6#include <soc/clk_rst.h>
7#include <soc/pmc.h>
8#include <soc/sdram.h>
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]9
10/*
Elyes HAOUAS809aeee2018-08-07 12:14:33 +0200[diff] [blame]11 * This function reads SDRAM parameters (and a few CLK_RST register values) from
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]12 * the common BCT format and writes them into PMC scratch registers (where the
13 * BootROM expects them on LP0 resume). Since those store the same values in a
14 * different format, we follow a "translation table" taken from Nvidia's U-Boot
15 * implementation to shift bits into the right position.
16 *
17 * Contrary to U-Boot, we transform the same macros directly into hardcoded
18 * assignments (without any pesky function calls or volatile qualifiers) to give
19 * the compiler as much room for optimization as possible. For that reason, we
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]20 * that PMC scratch register accesses should not have side effects and can be
21 * arbitrarily reordered. For the few accesses that do have side-effects, the
22 * code must contain explicit memory barriers.
23 */
24void sdram_lp0_save_params(const struct sdram_params *sdram)
25{
Elyes Haouas06575902024-06-28 10:15:59 +0200[diff] [blame^]26 struct tegra_pmc_regs *pmc = (void *)TEGRA_PMC_BASE;
27 struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]28
29#define pack(src, src_bits, dst, dst_bits) { \
30 _Static_assert((1 ? src_bits) >= (0 ? src_bits) && (1 ? dst_bits) >= \
Elyes HAOUASa342f392018-10-17 10:56:26 +0200[diff] [blame]31 (0 ? dst_bits), "byte range flipped (must be MSB:LSB)"); \
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]32 _Static_assert((1 ? src_bits) - (0 ? src_bits) == (1 ? dst_bits) - \
Elyes HAOUASa342f392018-10-17 10:56:26 +0200[diff] [blame]33 (0 ? dst_bits), "src and dst byte range lengths differ"); \
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]34 u32 mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \
35 dst &= ~(mask << (0 ? dst_bits)); \
36 dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \
37}
38
39#define s(param, src_bits, pmcreg, dst_bits) \
40 pack(sdram->param, src_bits, pmc->pmcreg, dst_bits)
41
42#define m(clkreg, src_bits, pmcreg, dst_bits) \
43 pack(clk_rst->clkreg, src_bits, pmc->pmcreg, dst_bits)
44
45#define c(value, pmcreg, dst_bits) \
46 pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits)
47
48 s(EmcClockSource, 7:0, scratch6, 15:8);
49 s(EmcClockSource, 31:29, scratch6, 18:16);
50 s(EmcClockSource, 26:26, scratch6, 19:19);
51 s(EmcOdtWrite, 5:0, scratch6, 25:20);
52 s(EmcOdtWrite, 11:8, scratch6, 29:26);
53 s(EmcOdtWrite, 30:30, scratch6, 30:30);
54 s(EmcOdtWrite, 31:31, scratch6, 31:31);
55 s(EmcXm2DqPadCtrl2, 18:16, scratch7, 22:20);
56 s(EmcXm2DqPadCtrl2, 22:20, scratch7, 25:23);
57 s(EmcXm2DqPadCtrl2, 26:24, scratch7, 28:26);
58 s(EmcXm2DqPadCtrl2, 30:28, scratch7, 31:29);
59 s(EmcXm2DqPadCtrl3, 18:16, scratch8, 22:20);
60 s(EmcXm2DqPadCtrl3, 22:20, scratch8, 25:23);
61 s(EmcXm2DqPadCtrl3, 26:24, scratch8, 28:26);
62 s(EmcXm2DqPadCtrl3, 30:28, scratch8, 31:29);
63 s(EmcTxsrDll, 11:0, scratch9, 31:20);
64 c(0, scratch10, 31:0);
65 s(EmcDsrVttgenDrv, 5:0, scratch10, 25:20);
66 s(EmcDsrVttgenDrv, 18:16, scratch10, 28:26);
67 s(EmcDsrVttgenDrv, 26:24, scratch10, 31:29);
68 s(EmcFbioSpare, 31:24, scratch11, 7:0);
69 s(EmcFbioSpare, 23:16, scratch11, 15:8);
70 s(EmcFbioSpare, 15:8, scratch11, 23:16);
71 s(EmcFbioSpare, 7:0, scratch11, 31:24);
72 s(EmcCfgRsv, 31:0, scratch12, 31:0);
73 s(EmcCdbCntl2, 31:0, scratch13, 31:0);
74 s(McEmemArbDaTurns, 31:0, scratch14, 31:0);
75 s(EmcCfgDigDll, 0:0, scratch17, 0:0);
76 s(EmcCfgDigDll, 25:2, scratch17, 24:1);
77 s(EmcCfgDigDll, 31:27, scratch17, 29:25);
78 s(EmcCdbCntl1, 29:0, scratch18, 29:0);
79 s(McEmemArbMisc0, 14:0, scratch19, 14:0);
80 s(McEmemArbMisc0, 30:16, scratch19, 29:15);
81 s(EmcXm2DqsPadCtrl, 4:0, scratch22, 4:0);
82 s(EmcXm2DqsPadCtrl, 12:8, scratch22, 9:5);
83 s(EmcXm2DqsPadCtrl, 31:14, scratch22, 27:10);
84 s(EmcRrd, 3:0, scratch22, 31:28);
85 s(EmcXm2DqPadCtrl, 31:4, scratch23, 27:0);
86 s(EmcRext, 3:0, scratch23, 31:28);
87 s(EmcXm2CompPadCtrl, 16:0, scratch24, 16:0);
88 s(EmcXm2CompPadCtrl, 24:20, scratch24, 21:17);
89 s(EmcXm2CompPadCtrl, 27:27, scratch24, 22:22);
90 s(EmcXm2CompPadCtrl, 31:28, scratch24, 26:23);
91 s(EmcR2w, 4:0, scratch24, 31:27);
92 s(EmcCfg, 9:1, scratch25, 8:0);
93 s(EmcCfg, 26:16, scratch25, 19:9);
94 s(EmcCfg, 31:28, scratch25, 23:20);
95 s(EmcXm2VttGenPadCtrl, 0:0, scratch25, 24:24);
96 s(EmcXm2VttGenPadCtrl, 2:2, scratch25, 25:25);
97 s(EmcXm2VttGenPadCtrl, 18:16, scratch25, 28:26);
98 s(EmcXm2VttGenPadCtrl, 26:24, scratch25, 31:29);
99 s(EmcZcalInterval, 23:10, scratch26, 13:0);
100 s(EmcZcalInterval, 9:0, scratch26, 23:14);
101 s(EmcSelDpdCtrl, 5:2, scratch26, 27:24);
102 s(EmcSelDpdCtrl, 8:8, scratch26, 28:28);
103 s(EmcSelDpdCtrl, 18:16, scratch26, 31:29);
104 s(EmcXm2VttGenPadCtrl3, 22:0, scratch27, 22:0);
105 s(EmcXm2VttGenPadCtrl3, 24:24, scratch27, 23:23);
106 s(EmcSwizzleRank0ByteCfg, 1:0, scratch27, 25:24);
107 s(EmcSwizzleRank0ByteCfg, 5:4, scratch27, 27:26);
108 s(EmcSwizzleRank0ByteCfg, 9:8, scratch27, 29:28);
109 s(EmcSwizzleRank0ByteCfg, 13:12, scratch27, 31:30);
110 s(EmcXm2ClkPadCtrl2, 5:0, scratch28, 5:0);
111 s(EmcXm2ClkPadCtrl2, 13:8, scratch28, 11:6);
112 s(EmcXm2ClkPadCtrl2, 20:16, scratch28, 16:12);
113 s(EmcXm2ClkPadCtrl2, 23:23, scratch28, 17:17);
114 s(EmcXm2ClkPadCtrl2, 28:24, scratch28, 22:18);
115 s(EmcXm2ClkPadCtrl2, 31:31, scratch28, 23:23);
116 s(EmcSwizzleRank1ByteCfg, 1:0, scratch28, 25:24);
117 s(EmcSwizzleRank1ByteCfg, 5:4, scratch28, 27:26);
118 s(EmcSwizzleRank1ByteCfg, 9:8, scratch28, 29:28);
119 s(EmcSwizzleRank1ByteCfg, 13:12, scratch28, 31:30);
120 s(McEmemArbDaCovers, 23:0, scratch29, 23:0);
121 s(McEmemArbRsv, 7:0, scratch29, 31:24);
122 s(EmcAutoCalConfig, 4:0, scratch30, 4:0);
123 s(EmcAutoCalConfig, 12:8, scratch30, 9:5);
124 s(EmcAutoCalConfig, 18:16, scratch30, 12:10);
125 s(EmcAutoCalConfig, 25:20, scratch30, 18:13);
126 s(EmcAutoCalConfig, 31:28, scratch30, 22:19);
127 s(EmcRfc, 8:0, scratch30, 31:23);
128 s(EmcXm2DqsPadCtrl2, 21:0, scratch31, 21:0);
129 s(EmcXm2DqsPadCtrl2, 24:24, scratch31, 22:22);
130 s(EmcAr2Pden, 8:0, scratch31, 31:23);
131 s(EmcXm2ClkPadCtrl, 0:0, scratch32, 0:0);
132 s(EmcXm2ClkPadCtrl, 4:2, scratch32, 3:1);
133 s(EmcXm2ClkPadCtrl, 7:7, scratch32, 4:4);
134 s(EmcXm2ClkPadCtrl, 31:14, scratch32, 22:5);
135 s(EmcRfcSlr, 8:0, scratch32, 31:23);
136 s(EmcXm2DqsPadCtrl3, 0:0, scratch33, 0:0);
137 s(EmcXm2DqsPadCtrl3, 5:5, scratch33, 1:1);
138 s(EmcXm2DqsPadCtrl3, 12:8, scratch33, 6:2);
139 s(EmcXm2DqsPadCtrl3, 18:14, scratch33, 11:7);
140 s(EmcXm2DqsPadCtrl3, 24:20, scratch33, 16:12);
141 s(EmcXm2DqsPadCtrl3, 30:26, scratch33, 21:17);
142 s(EmcTxsr, 9:0, scratch33, 31:22);
143 s(McEmemArbCfg, 8:0, scratch40, 8:0);
144 s(McEmemArbCfg, 20:16, scratch40, 13:9);
145 s(McEmemArbCfg, 27:24, scratch40, 17:14);
146 s(McEmemArbCfg, 31:28, scratch40, 21:18);
147 s(EmcMc2EmcQ, 2:0, scratch40, 24:22);
148 s(EmcMc2EmcQ, 10:8, scratch40, 27:25);
149 s(EmcMc2EmcQ, 27:24, scratch40, 31:28);
150 s(EmcAutoCalInterval, 20:0, scratch42, 20:0);
151 s(McEmemArbOutstandingReq, 8:0, scratch42, 29:21);
152 s(McEmemArbOutstandingReq, 31:30, scratch42, 31:30);
153 s(EmcMrsWaitCnt2, 9:0, scratch44, 9:0);
154 s(EmcMrsWaitCnt2, 25:16, scratch44, 19:10);
155 s(EmcTxdsrvttgen, 11:0, scratch44, 31:20);
156 s(EmcMrsWaitCnt, 9:0, scratch45, 9:0);
157 s(EmcMrsWaitCnt, 25:16, scratch45, 19:10);
158 s(EmcCfgPipe, 1:0, scratch45, 21:20);
159 s(EmcCfgPipe, 9:4, scratch45, 27:22);
160 s(EmcCfgPipe, 15:12, scratch45, 31:28);
161 s(EmcXm2DqsPadCtrl4, 22:18, scratch46, 4:0);
162 s(EmcXm2DqsPadCtrl4, 16:12, scratch46, 9:5);
163 s(EmcXm2DqsPadCtrl4, 10:6, scratch46, 14:10);
164 s(EmcXm2DqsPadCtrl4, 4:0, scratch46, 19:15);
165 s(EmcZcalWaitCnt, 9:0, scratch46, 29:20);
166 s(EmcXm2DqsPadCtrl5, 22:18, scratch47, 4:0);
167 s(EmcXm2DqsPadCtrl5, 16:12, scratch47, 9:5);
168 s(EmcXm2DqsPadCtrl5, 10:6, scratch47, 14:10);
169 s(EmcXm2DqsPadCtrl5, 4:0, scratch47, 19:15);
170 s(EmcXm2VttGenPadCtrl2, 5:0, scratch47, 25:20);
171 s(EmcXm2VttGenPadCtrl2, 31:28, scratch47, 29:26);
172 s(EmcXm2DqsPadCtrl6, 12:8, scratch48, 4:0);
173 s(EmcXm2DqsPadCtrl6, 18:14, scratch48, 9:5);
174 s(EmcXm2DqsPadCtrl6, 24:20, scratch48, 14:10);
175 s(EmcXm2DqsPadCtrl6, 30:26, scratch48, 19:15);
176 s(EmcAutoCalConfig3, 4:0, scratch48, 24:20);
177 s(EmcAutoCalConfig3, 12:8, scratch48, 29:25);
178 s(EmcFbioCfg5, 1:0, scratch48, 31:30);
179 s(EmcDllXformQUse8, 4:0, scratch50, 4:0);
180 s(EmcDllXformQUse8, 22:8, scratch50, 19:5);
181 s(McEmemArbRing1Throttle, 4:0, scratch50, 24:20);
182 s(McEmemArbRing1Throttle, 20:16, scratch50, 29:25);
183 s(EmcFbioCfg5, 3:2, scratch50, 31:30);
184 s(EmcDllXformQUse9, 4:0, scratch51, 4:0);
185 s(EmcDllXformQUse9, 22:8, scratch51, 19:5);
186 s(EmcCttTermCtrl, 2:0, scratch51, 22:20);
187 s(EmcCttTermCtrl, 12:8, scratch51, 27:23);
188 s(EmcCttTermCtrl, 31:31, scratch51, 28:28);
189 s(EmcFbioCfg6, 2:0, scratch51, 31:29);
190 s(EmcDllXformQUse10, 4:0, scratch56, 4:0);
191 s(EmcDllXformQUse10, 22:8, scratch56, 19:5);
192 s(EmcXm2CmdPadCtrl, 10:3, scratch56, 27:20);
193 s(EmcXm2CmdPadCtrl, 28:28, scratch56, 28:28);
194 s(EmcPutermAdj, 1:0, scratch56, 30:29);
195 s(EmcPutermAdj, 7:7, scratch56, 31:31);
196 s(EmcDllXformQUse11, 4:0, scratch57, 4:0);
197 s(EmcDllXformQUse11, 22:8, scratch57, 19:5);
198 s(EmcWdv, 3:0, scratch57, 31:28);
199 s(EmcDllXformQUse12, 4:0, scratch58, 4:0);
200 s(EmcDllXformQUse12, 22:8, scratch58, 19:5);
201 s(EmcBurstRefreshNum, 3:0, scratch58, 31:28);
202 s(EmcDllXformQUse13, 4:0, scratch59, 4:0);
203 s(EmcDllXformQUse13, 22:8, scratch59, 19:5);
204 s(EmcWext, 3:0, scratch59, 31:28);
205 s(EmcDllXformQUse14, 4:0, scratch60, 4:0);
206 s(EmcDllXformQUse14, 22:8, scratch60, 19:5);
207 s(EmcClkenOverride, 3:1, scratch60, 30:28);
208 s(EmcClkenOverride, 6:6, scratch60, 31:31);
209 s(EmcDllXformQUse15, 4:0, scratch61, 4:0);
210 s(EmcDllXformQUse15, 22:8, scratch61, 19:5);
211 s(EmcR2r, 3:0, scratch61, 31:28);
212 s(EmcDllXformDq4, 4:0, scratch62, 4:0);
213 s(EmcDllXformDq4, 22:8, scratch62, 19:5);
214 s(EmcRc, 6:0, scratch62, 26:20);
215 s(EmcW2r, 4:0, scratch62, 31:27);
216 s(EmcDllXformDq5, 4:0, scratch63, 4:0);
217 s(EmcDllXformDq5, 22:8, scratch63, 19:5);
218 s(EmcTfaw, 6:0, scratch63, 26:20);
219 s(EmcR2p, 4:0, scratch63, 31:27);
220 s(EmcDllXformDq6, 4:0, scratch64, 4:0);
221 s(EmcDllXformDq6, 22:8, scratch64, 19:5);
222 s(EmcDliTrimTxDqs0, 6:0, scratch64, 26:20);
223 s(EmcQSafe, 4:0, scratch64, 31:27);
224 s(EmcDllXformDq7, 4:0, scratch65, 4:0);
225 s(EmcDllXformDq7, 22:8, scratch65, 19:5);
226 s(EmcDliTrimTxDqs1, 6:0, scratch65, 26:20);
227 s(EmcTClkStable, 4:0, scratch65, 31:27);
228 s(EmcAutoCalConfig2, 4:0, scratch66, 4:0);
229 s(EmcAutoCalConfig2, 12:8, scratch66, 9:5);
230 s(EmcAutoCalConfig2, 20:16, scratch66, 14:10);
231 s(EmcAutoCalConfig2, 28:24, scratch66, 19:15);
232 s(EmcDliTrimTxDqs2, 6:0, scratch66, 26:20);
233 s(EmcTClkStop, 4:0, scratch66, 31:27);
234 s(McEmemArbMisc1, 1:0, scratch67, 1:0);
235 s(McEmemArbMisc1, 12:4, scratch67, 10:2);
236 s(McEmemArbMisc1, 25:21, scratch67, 15:11);
237 s(McEmemArbMisc1, 31:28, scratch67, 19:16);
238 s(EmcDliTrimTxDqs3, 6:0, scratch67, 26:20);
239 s(EmcEInputDuration, 4:0, scratch67, 31:27);
240 s(EmcZcalMrwCmd, 7:0, scratch68, 7:0);
241 s(EmcZcalMrwCmd, 23:16, scratch68, 15:8);
242 s(EmcZcalMrwCmd, 31:30, scratch68, 17:16);
243 s(EmcTRefBw, 13:0, scratch68, 31:18);
244 s(EmcXm2CmdPadCtrl2, 31:14, scratch69, 17:0);
245 s(EmcDliTrimTxDqs4, 6:0, scratch69, 24:18);
246 s(EmcDliTrimTxDqs5, 6:0, scratch69, 31:25);
247 s(EmcXm2CmdPadCtrl3, 31:14, scratch70, 17:0);
248 s(EmcDliTrimTxDqs6, 6:0, scratch70, 24:18);
249 s(EmcDliTrimTxDqs7, 6:0, scratch70, 31:25);
250 s(EmcXm2CmdPadCtrl5, 2:0, scratch71, 2:0);
251 s(EmcXm2CmdPadCtrl5, 6:4, scratch71, 5:3);
252 s(EmcXm2CmdPadCtrl5, 10:8, scratch71, 8:6);
253 s(EmcXm2CmdPadCtrl5, 14:12, scratch71, 11:9);
254 s(EmcXm2CmdPadCtrl5, 18:16, scratch71, 14:12);
255 s(EmcXm2CmdPadCtrl5, 22:20, scratch71, 17:15);
256 s(EmcDliTrimTxDqs8, 6:0, scratch71, 24:18);
257 s(EmcDliTrimTxDqs9, 6:0, scratch71, 31:25);
258 s(EmcCdbCntl3, 17:0, scratch72, 17:0);
259 s(EmcDliTrimTxDqs10, 6:0, scratch72, 24:18);
260 s(EmcDliTrimTxDqs11, 6:0, scratch72, 31:25);
261 s(EmcSwizzleRank0Byte0, 2:0, scratch73, 2:0);
262 s(EmcSwizzleRank0Byte0, 6:4, scratch73, 5:3);
263 s(EmcSwizzleRank0Byte0, 10:8, scratch73, 8:6);
264 s(EmcSwizzleRank0Byte0, 14:12, scratch73, 11:9);
265 s(EmcSwizzleRank0Byte0, 18:16, scratch73, 14:12);
266 s(EmcSwizzleRank0Byte0, 22:20, scratch73, 17:15);
267 s(EmcDliTrimTxDqs12, 6:0, scratch73, 24:18);
268 s(EmcDliTrimTxDqs13, 6:0, scratch73, 31:25);
269 s(EmcSwizzleRank0Byte1, 2:0, scratch74, 2:0);
270 s(EmcSwizzleRank0Byte1, 6:4, scratch74, 5:3);
271 s(EmcSwizzleRank0Byte1, 10:8, scratch74, 8:6);
272 s(EmcSwizzleRank0Byte1, 14:12, scratch74, 11:9);
273 s(EmcSwizzleRank0Byte1, 18:16, scratch74, 14:12);
274 s(EmcSwizzleRank0Byte1, 22:20, scratch74, 17:15);
275 s(EmcDliTrimTxDqs14, 6:0, scratch74, 24:18);
276 s(EmcDliTrimTxDqs15, 6:0, scratch74, 31:25);
277 s(EmcSwizzleRank0Byte2, 2:0, scratch75, 2:0);
278 s(EmcSwizzleRank0Byte2, 6:4, scratch75, 5:3);
279 s(EmcSwizzleRank0Byte2, 10:8, scratch75, 8:6);
280 s(EmcSwizzleRank0Byte2, 14:12, scratch75, 11:9);
281 s(EmcSwizzleRank0Byte2, 18:16, scratch75, 14:12);
282 s(EmcSwizzleRank0Byte2, 22:20, scratch75, 17:15);
283 s(McEmemArbTimingRp, 6:0, scratch75, 24:18);
284 s(McEmemArbTimingRc, 6:0, scratch75, 31:25);
285 s(EmcSwizzleRank0Byte3, 2:0, scratch76, 2:0);
286 s(EmcSwizzleRank0Byte3, 6:4, scratch76, 5:3);
287 s(EmcSwizzleRank0Byte3, 10:8, scratch76, 8:6);
288 s(EmcSwizzleRank0Byte3, 14:12, scratch76, 11:9);
289 s(EmcSwizzleRank0Byte3, 18:16, scratch76, 14:12);
290 s(EmcSwizzleRank0Byte3, 22:20, scratch76, 17:15);
291 s(McEmemArbTimingFaw, 6:0, scratch76, 24:18);
292 s(McEmemArbTimingWap2Pre, 6:0, scratch76, 31:25);
293 s(EmcSwizzleRank1Byte0, 2:0, scratch77, 2:0);
294 s(EmcSwizzleRank1Byte0, 6:4, scratch77, 5:3);
295 s(EmcSwizzleRank1Byte0, 10:8, scratch77, 8:6);
296 s(EmcSwizzleRank1Byte0, 14:12, scratch77, 11:9);
297 s(EmcSwizzleRank1Byte0, 18:16, scratch77, 14:12);
298 s(EmcSwizzleRank1Byte0, 22:20, scratch77, 17:15);
299 s(EmcRas, 5:0, scratch77, 23:18);
300 s(EmcRp, 5:0, scratch77, 29:24);
301 s(EmcCfg2, 9:8, scratch77, 31:30);
302 s(EmcSwizzleRank1Byte1, 2:0, scratch78, 2:0);
303 s(EmcSwizzleRank1Byte1, 6:4, scratch78, 5:3);
304 s(EmcSwizzleRank1Byte1, 10:8, scratch78, 8:6);
305 s(EmcSwizzleRank1Byte1, 14:12, scratch78, 11:9);
306 s(EmcSwizzleRank1Byte1, 18:16, scratch78, 14:12);
307 s(EmcSwizzleRank1Byte1, 22:20, scratch78, 17:15);
308 s(EmcW2p, 5:0, scratch78, 23:18);
309 s(EmcRdRcd, 5:0, scratch78, 29:24);
310 s(EmcCfg2, 27:26, scratch78, 31:30);
311 s(EmcSwizzleRank1Byte2, 2:0, scratch79, 2:0);
312 s(EmcSwizzleRank1Byte2, 6:4, scratch79, 5:3);
313 s(EmcSwizzleRank1Byte2, 10:8, scratch79, 8:6);
314 s(EmcSwizzleRank1Byte2, 14:12, scratch79, 11:9);
315 s(EmcSwizzleRank1Byte2, 18:16, scratch79, 14:12);
316 s(EmcSwizzleRank1Byte2, 22:20, scratch79, 17:15);
317 s(EmcWrRcd, 5:0, scratch79, 23:18);
318 s(EmcQUse, 5:0, scratch79, 29:24);
319 s(EmcFbioCfg5, 4:4, scratch79, 31:31);
320 s(EmcSwizzleRank1Byte3, 2:0, scratch80, 2:0);
321 s(EmcSwizzleRank1Byte3, 6:4, scratch80, 5:3);
322 s(EmcSwizzleRank1Byte3, 10:8, scratch80, 8:6);
323 s(EmcSwizzleRank1Byte3, 14:12, scratch80, 11:9);
324 s(EmcSwizzleRank1Byte3, 18:16, scratch80, 14:12);
325 s(EmcSwizzleRank1Byte3, 22:20, scratch80, 17:15);
326 s(EmcQRst, 5:0, scratch80, 23:18);
327 s(EmcRdv, 5:0, scratch80, 29:24);
328 s(EmcFbioCfg5, 6:5, scratch80, 31:30);
329 s(EmcDynSelfRefControl, 15:0, scratch81, 15:0);
330 s(EmcDynSelfRefControl, 31:31, scratch81, 16:16);
331 s(EmcPdEx2Wr, 5:0, scratch81, 22:17);
332 s(EmcPdEx2Rd, 5:0, scratch81, 28:23);
333 s(EmcRefresh, 5:0, scratch82, 5:0);
334 s(EmcRefresh, 15:6, scratch82, 15:6);
335 s(EmcCmdQ, 4:0, scratch82, 20:16);
336 s(EmcCmdQ, 10:8, scratch82, 23:21);
337 s(EmcCmdQ, 14:12, scratch82, 26:24);
338 s(EmcCmdQ, 28:24, scratch82, 31:27);
339 s(EmcAcpdControl, 15:0, scratch83, 15:0);
340 s(EmcCfgDigDllPeriod, 15:0, scratch83, 31:16);
341 s(EmcDllXformDqs0, 4:0, scratch84, 4:0);
342 s(EmcDllXformDqs0, 22:12, scratch84, 15:5);
343 s(EmcDllXformDqs1, 4:0, scratch84, 20:16);
344 s(EmcDllXformDqs1, 22:12, scratch84, 31:21);
345 s(EmcDllXformDqs2, 4:0, scratch85, 4:0);
346 s(EmcDllXformDqs2, 22:12, scratch85, 15:5);
347 s(EmcDllXformDqs3, 4:0, scratch85, 20:16);
348 s(EmcDllXformDqs3, 22:12, scratch85, 31:21);
349 s(EmcDllXformDqs4, 4:0, scratch86, 4:0);
350 s(EmcDllXformDqs4, 22:12, scratch86, 15:5);
351 s(EmcDllXformDqs5, 4:0, scratch86, 20:16);
352 s(EmcDllXformDqs5, 22:12, scratch86, 31:21);
353 s(EmcDllXformDqs6, 4:0, scratch87, 4:0);
354 s(EmcDllXformDqs6, 22:12, scratch87, 15:5);
355 s(EmcDllXformDqs7, 4:0, scratch87, 20:16);
356 s(EmcDllXformDqs7, 22:12, scratch87, 31:21);
357 s(EmcDllXformDqs8, 4:0, scratch88, 4:0);
358 s(EmcDllXformDqs8, 22:12, scratch88, 15:5);
359 s(EmcDllXformDqs9, 4:0, scratch88, 20:16);
360 s(EmcDllXformDqs9, 22:12, scratch88, 31:21);
361 s(EmcDllXformDqs10, 4:0, scratch89, 4:0);
362 s(EmcDllXformDqs10, 22:12, scratch89, 15:5);
363 s(EmcDllXformDqs11, 4:0, scratch89, 20:16);
364 s(EmcDllXformDqs11, 22:12, scratch89, 31:21);
365 s(EmcDllXformDqs12, 4:0, scratch90, 4:0);
366 s(EmcDllXformDqs12, 22:12, scratch90, 15:5);
367 s(EmcDllXformDqs13, 4:0, scratch90, 20:16);
368 s(EmcDllXformDqs13, 22:12, scratch90, 31:21);
369 s(EmcDllXformDqs14, 4:0, scratch91, 4:0);
370 s(EmcDllXformDqs14, 22:12, scratch91, 15:5);
371 s(EmcDllXformDqs15, 4:0, scratch91, 20:16);
372 s(EmcDllXformDqs15, 22:12, scratch91, 31:21);
373 s(EmcDllXformQUse0, 4:0, scratch92, 4:0);
374 s(EmcDllXformQUse0, 22:12, scratch92, 15:5);
375 s(EmcDllXformQUse1, 4:0, scratch92, 20:16);
376 s(EmcDllXformQUse1, 22:12, scratch92, 31:21);
377 s(EmcDllXformQUse2, 4:0, scratch93, 4:0);
378 s(EmcDllXformQUse2, 22:12, scratch93, 15:5);
379 s(EmcDllXformQUse3, 4:0, scratch93, 20:16);
380 s(EmcDllXformQUse3, 22:12, scratch93, 31:21);
381 s(EmcDllXformQUse4, 4:0, scratch94, 4:0);
382 s(EmcDllXformQUse4, 22:12, scratch94, 15:5);
383 s(EmcDllXformQUse5, 4:0, scratch94, 20:16);
384 s(EmcDllXformQUse5, 22:12, scratch94, 31:21);
385 s(EmcDllXformQUse6, 4:0, scratch95, 4:0);
386 s(EmcDllXformQUse6, 22:12, scratch95, 15:5);
387 s(EmcDllXformQUse7, 4:0, scratch95, 20:16);
388 s(EmcDllXformQUse7, 22:12, scratch95, 31:21);
389 s(EmcDllXformDq0, 4:0, scratch96, 4:0);
390 s(EmcDllXformDq0, 22:12, scratch96, 15:5);
391 s(EmcDllXformDq1, 4:0, scratch96, 20:16);
392 s(EmcDllXformDq1, 22:12, scratch96, 31:21);
393 s(EmcDllXformDq2, 4:0, scratch97, 4:0);
394 s(EmcDllXformDq2, 22:12, scratch97, 15:5);
395 s(EmcDllXformDq3, 4:0, scratch97, 20:16);
396 s(EmcDllXformDq3, 22:12, scratch97, 31:21);
397 s(EmcPreRefreshReqCnt, 15:0, scratch98, 15:0);
398 s(EmcDllXformAddr0, 4:0, scratch98, 20:16);
399 s(EmcDllXformAddr0, 22:12, scratch98, 31:21);
400 s(EmcDllXformAddr1, 4:0, scratch99, 4:0);
401 s(EmcDllXformAddr1, 22:12, scratch99, 15:5);
402 s(EmcDllXformAddr2, 4:0, scratch99, 20:16);
403 s(EmcDllXformAddr2, 22:12, scratch99, 31:21);
404 s(EmcDllXformAddr3, 4:0, scratch100, 4:0);
405 s(EmcDllXformAddr3, 22:12, scratch100, 15:5);
406 s(EmcDllXformAddr4, 4:0, scratch100, 20:16);
407 s(EmcDllXformAddr4, 22:12, scratch100, 31:21);
408 s(EmcDllXformAddr5, 4:0, scratch101, 4:0);
409 s(EmcDllXformAddr5, 22:12, scratch101, 15:5);
410 s(EmcPChg2Pden, 5:0, scratch102, 5:0);
411 s(EmcAct2Pden, 5:0, scratch102, 11:6);
412 s(EmcRw2Pden, 5:0, scratch102, 17:12);
413 s(EmcTcke, 5:0, scratch102, 23:18);
414 s(EmcTrpab, 5:0, scratch102, 29:24);
415 s(EmcFbioCfg5, 8:7, scratch102, 31:30);
416 s(EmcCtt, 5:0, scratch103, 5:0);
417 s(EmcEInput, 5:0, scratch103, 11:6);
418 s(EmcPutermExtra, 21:16, scratch103, 17:12);
419 s(EmcTckesr, 5:0, scratch103, 23:18);
420 s(EmcTpd, 5:0, scratch103, 29:24);
421 s(EmcFbioCfg5, 10:9, scratch103, 31:30);
422 s(EmcRdvMask, 5:0, scratch104, 5:0);
423 s(EmcXm2CmdPadCtrl4, 0:0, scratch104, 6:6);
424 s(EmcXm2CmdPadCtrl4, 2:2, scratch104, 7:7);
425 s(EmcXm2CmdPadCtrl4, 4:4, scratch104, 8:8);
426 s(EmcXm2CmdPadCtrl4, 6:6, scratch104, 9:9);
427 s(EmcXm2CmdPadCtrl4, 8:8, scratch104, 10:10);
428 s(EmcXm2CmdPadCtrl4, 10:10, scratch104, 11:11);
429 s(EmcQpop, 5:0, scratch104, 17:12);
430 s(McEmemArbTimingRcd, 5:0, scratch104, 23:18);
431 s(McEmemArbTimingRas, 5:0, scratch104, 29:24);
432 s(EmcFbioCfg5, 12:11, scratch104, 31:30);
433 s(McEmemArbTimingRap2Pre, 5:0, scratch105, 5:0);
434 s(McEmemArbTimingR2W, 5:0, scratch105, 11:6);
435 s(McEmemArbTimingW2R, 5:0, scratch105, 17:12);
436 s(EmcIbdly, 4:0, scratch105, 22:18);
437 s(McEmemArbTimingR2R, 4:0, scratch105, 27:23);
438 s(EmcW2w, 3:0, scratch105, 31:28);
439 s(McEmemArbTimingW2W, 4:0, scratch106, 4:0);
440 s(McEmemArbOverride, 27:27, scratch106, 5:5);
441 s(McEmemArbOverride, 26:26, scratch106, 6:6);
442 s(McEmemArbOverride, 16:16, scratch106, 7:7);
443 s(McEmemArbOverride, 10:10, scratch106, 8:8);
444 s(McEmemArbOverride, 4:4, scratch106, 9:9);
445 s(EmcWdvMask, 3:0, scratch106, 13:10);
446 s(EmcCttDuration, 3:0, scratch106, 17:14);
447 s(EmcQuseWidth, 3:0, scratch106, 21:18);
448 s(EmcPutermWidth, 3:0, scratch106, 25:22);
449 s(EmcBgbiasCtl0, 3:0, scratch106, 29:26);
450 s(EmcFbioCfg5, 25:24, scratch106, 31:30);
451 s(McEmemArbTimingRrd, 3:0, scratch107, 3:0);
452 s(EmcFbioCfg5, 23:20, scratch107, 10:7);
453 s(EmcFbioCfg5, 15:13, scratch107, 13:11);
454 s(EmcCfg2, 5:3, scratch107, 16:14);
455 s(EmcFbioCfg5, 26:26, scratch107, 17:17);
456 s(EmcFbioCfg5, 28:28, scratch107, 18:18);
457 s(EmcCfg2, 2:0, scratch107, 21:19);
458 s(EmcCfg2, 7:6, scratch107, 23:22);
459 s(EmcCfg2, 15:10, scratch107, 29:24);
460 s(EmcCfg2, 23:22, scratch107, 31:30);
461 s(EmcCfg2, 25:24, scratch108, 1:0);
462 s(EmcCfg2, 31:28, scratch108, 5:2);
463 s(BootRomPatchData, 31:0, scratch15, 31:0);
464 s(BootRomPatchControl, 31:0, scratch16, 31:0);
465 s(EmcDevSelect, 1:0, scratch17, 31:30);
466 s(EmcZcalWarmColdBootEnables, 1:0, scratch18, 31:30);
467 s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch19, 31:30);
468 s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch46, 30:30);
469 s(McClkenOverrideAllWarmBoot, 0:0, scratch46, 31:31);
470 s(EmcClkenOverrideAllWarmBoot, 0:0, scratch47, 30:30);
471 s(EmcMrsWarmBootEnable, 0:0, scratch47, 31:31);
472 s(EmcTimingControlWait, 7:0, scratch57, 27:20);
473 s(EmcZcalWarmBootWait, 7:0, scratch58, 27:20);
474 s(EmcAutoCalWait, 7:0, scratch59, 27:20);
475 s(WarmBootWait, 7:0, scratch60, 27:20);
476 s(EmcPinProgramWait, 7:0, scratch61, 27:20);
477 s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch79, 30:30);
478 s(EmcExtraRefreshNum, 2:0, scratch81, 31:29);
479 s(SwizzleRankByteEncode, 15:0, scratch101, 31:16);
480 s(MemoryType, 2:0, scratch107, 6:4);
481
482 switch (sdram->MemoryType) {
483 case NvBootMemoryType_LpDdr2:
484 s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0);
485 s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8);
486 s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16);
487 s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24);
488 s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0);
489 s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2);
490 s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4);
491 s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6);
492 s(EmcMrw1, 7:0, scratch7, 7:0);
493 s(EmcMrw1, 23:16, scratch7, 15:8);
494 s(EmcMrw1, 27:26, scratch7, 17:16);
495 s(EmcMrw1, 31:30, scratch7, 19:18);
496 s(EmcMrw2, 7:0, scratch8, 7:0);
497 s(EmcMrw2, 23:16, scratch8, 15:8);
498 s(EmcMrw2, 27:26, scratch8, 17:16);
499 s(EmcMrw2, 31:30, scratch8, 19:18);
500 s(EmcMrw3, 7:0, scratch9, 7:0);
501 s(EmcMrw3, 23:16, scratch9, 15:8);
502 s(EmcMrw3, 27:26, scratch9, 17:16);
503 s(EmcMrw3, 31:30, scratch9, 19:18);
504 s(EmcMrw4, 7:0, scratch10, 7:0);
505 s(EmcMrw4, 23:16, scratch10, 15:8);
506 s(EmcMrw4, 27:26, scratch10, 17:16);
507 s(EmcMrw4, 31:30, scratch10, 19:18);
508 break;
509 case NvBootMemoryType_Ddr3:
510 s(EmcMrs, 13:0, scratch5, 13:0);
511 s(EmcEmrs, 13:0, scratch5, 27:14);
512 s(EmcMrs, 21:20, scratch5, 29:28);
513 s(EmcMrs, 31:30, scratch5, 31:30);
514 s(EmcEmrs2, 13:0, scratch7, 13:0);
515 s(EmcEmrs, 21:20, scratch7, 15:14);
516 s(EmcEmrs, 31:30, scratch7, 17:16);
517 s(EmcEmrs2, 21:20, scratch7, 19:18);
518 s(EmcEmrs3, 13:0, scratch8, 13:0);
519 s(EmcEmrs2, 31:30, scratch8, 15:14);
520 s(EmcEmrs3, 21:20, scratch8, 17:16);
521 s(EmcEmrs3, 31:30, scratch8, 19:18);
522 s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0);
523 s(EmcWarmBootMrsExtra, 31:30, scratch9, 15:14);
524 s(EmcWarmBootMrsExtra, 21:20, scratch9, 17:16);
525 s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 19:18);
526 s(EmcMrs, 27:26, scratch10, 1:0);
527 s(EmcEmrs, 27:26, scratch10, 3:2);
528 s(EmcEmrs2, 27:26, scratch10, 5:4);
529 s(EmcEmrs3, 27:26, scratch10, 7:6);
530 s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8);
531 s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9);
532 s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10);
533 s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11);
534 c(0, scratch116, 31:0);
535 c(0, scratch117, 31:0);
536 break;
537 default:
538 printk(BIOS_CRIT, "ERROR: %s() unrecognized MemoryType %d!\n",
539 __func__, sdram->MemoryType);
540 }
541
542 s(McVideoProtectGpuOverride0, 31:0, secure_scratch8, 31:0);
543 s(McVideoProtectVprOverride, 3:0, secure_scratch9, 3:0);
544 s(McVideoProtectVprOverride, 11:6, secure_scratch9, 9:4);
545 s(McVideoProtectVprOverride, 23:14, secure_scratch9, 19:10);
546 s(McVideoProtectVprOverride, 26:26, secure_scratch9, 20:20);
547 s(McVideoProtectVprOverride, 31:29, secure_scratch9, 23:21);
548 s(EmcFbioCfg5, 19:16, secure_scratch9, 27:24);
549 s(McDisplaySnapRing, 1:0, secure_scratch9, 29:28);
550 s(McDisplaySnapRing, 31:31, secure_scratch9, 30:30);
551 s(EmcAdrCfg, 0:0, secure_scratch9, 31:31);
552 s(McVideoProtectGpuOverride1, 15:0, secure_scratch10, 15:0);
553 s(McEmemAdrCfgBankMask0, 15:0, secure_scratch10, 31:16);
554 s(McEmemAdrCfgBankMask1, 15:0, secure_scratch11, 15:0);
555 s(McEmemAdrCfgBankMask2, 15:0, secure_scratch11, 31:16);
556 s(McEmemCfg, 13:0, secure_scratch12, 13:0);
557 s(McEmemCfg, 31:31, secure_scratch12, 14:14);
558 s(McVideoProtectBom, 31:20, secure_scratch12, 26:15);
559 s(McVideoProtectVprOverride1, 1:0, secure_scratch12, 28:27);
560 s(McVideoProtectVprOverride1, 4:4, secure_scratch12, 29:29);
561 s(McVideoProtectBomAdrHi, 1:0, secure_scratch12, 31:30);
562 s(McVideoProtectSizeMb, 11:0, secure_scratch13, 11:0);
563 s(McSecCarveoutBom, 31:20, secure_scratch13, 23:12);
564 s(McEmemAdrCfgBankSwizzle3, 2:0, secure_scratch13, 26:24);
565 s(McVideoProtectWriteAccess, 1:0, secure_scratch13, 28:27);
566 s(McSecCarveoutAdrHi, 1:0, secure_scratch13, 30:29);
567 s(McEmemAdrCfg, 0:0, secure_scratch13, 31:31);
568 s(McSecCarveoutSizeMb, 11:0, secure_scratch14, 11:0);
569 s(McMtsCarveoutBom, 31:20, secure_scratch14, 23:12);
570 s(McMtsCarveoutAdrHi, 1:0, secure_scratch14, 25:24);
571 s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch14, 26:26);
572 s(McMtsCarveoutRegCtrl, 0:0, secure_scratch14, 27:27);
573 s(McMtsCarveoutSizeMb, 11:0, secure_scratch15, 11:0);
574 s(McEmemAdrCfgDev0, 2:0, secure_scratch15, 14:12);
575 s(McEmemAdrCfgDev0, 9:8, secure_scratch15, 16:15);
576 s(McEmemAdrCfgDev0, 19:16, secure_scratch15, 20:17);
577 s(McEmemAdrCfgDev1, 2:0, secure_scratch15, 23:21);
578 s(McEmemAdrCfgDev1, 9:8, secure_scratch15, 25:24);
579 s(McEmemAdrCfgDev1, 19:16, secure_scratch15, 29:26);
580
581 /* Make sure all writes complete before we lock the secure_scratchs. */
582 dmb();
583 c(0x1555555, sec_disable2, 25:0);
584 c(0xff, sec_disable, 19:12);
585
586 c(0, scratch2, 31:0);
587 m(pllm_base, 15:0, scratch2, 15:0);
588 m(pllm_base, 20:20, scratch2, 16:16);
589 m(pllm_misc2, 2:0, scratch2, 19:17);
590 c(0, scratch35, 31:0);
591 m(pllm_misc1, 23:0, scratch35, 23:0);
592 m(pllm_misc1, 30:28, scratch35, 30:28);
593 c(0, scratch3, 31:0);
594 s(PllMInputDivider, 7:0, scratch3, 7:0);
595 c(0x3e, scratch3, 15:8);
596 c(0, scratch3, 19:16);
597 s(PllMKVCO, 0:0, scratch3, 20:20);
598 s(PllMKCP, 1:0, scratch3, 22:21);
599 c(0, scratch36, 31:0);
600 s(PllMSetupControl, 23:0, scratch36, 23:0);
601 c(0, scratch4, 31:0);
602 s(PllMStableTime, 9:0, scratch4, 9:0);
603 s(PllMStableTime, 9:0, scratch4, 19:10);
604
605 s(PllMSelectDiv2, 0:0, pllm_wb0_override2, 27:27);
606 s(PllMKVCO, 0:0, pllm_wb0_override2, 26:26);
607 s(PllMKCP, 1:0, pllm_wb0_override2, 25:24);
608 s(PllMSetupControl, 23:0, pllm_wb0_override2, 23:0);
609 s(PllMFeedbackDivider, 7:0, pllm_wb0_override_freq, 15:8);
610 s(PllMInputDivider, 7:0, pllm_wb0_override_freq, 7:0);
611
612 /* Need to ensure override params are written before we activate it. */
613 dmb();
614 c(3, pllp_wb0_override, 12:11);
615}