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review.coreboot.org / coreboot / 809aeeed98104c016a5ee1cdd5009a84a5611d8e / . / src / soc / nvidia / tegra124 / sdram_lp0.c
blob: 536ad31804de06a16e2b4f8c3d426e6cbbfaddbc [file] [log] [blame]
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]1/*
Martin Rothc5158982018-05-26 18:42:05 -0600[diff] [blame]2 * This file is part of the coreboot project.
3 *
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]4 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
5 * Copyright 2014 Google Inc.
6 *
Martin Rothc5158982018-05-26 18:42:05 -0600[diff] [blame]7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]10 *
Martin Rothc5158982018-05-26 18:42:05 -0600[diff] [blame]11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]15 */
16
17#include <arch/cache.h>
18#include <console/console.h>
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]19#include <soc/addressmap.h>
Julius Wernerf0d21ff32014-10-20 13:24:14 -0700[diff] [blame]20#include <soc/clk_rst.h>
21#include <soc/pmc.h>
22#include <soc/sdram.h>
23#include <stdlib.h>
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]24
25/*
Elyes HAOUAS809aeee2018-08-07 12:14:33 +0200[diff] [blame^]26 * This function reads SDRAM parameters (and a few CLK_RST register values) from
Tom Warren64982c502014-01-23 13:37:50 -0700[diff] [blame]27 * the common BCT format and writes them into PMC scratch registers (where the
28 * BootROM expects them on LP0 resume). Since those store the same values in a
29 * different format, we follow a "translation table" taken from Nvidia's U-Boot
30 * implementation to shift bits into the right position.
31 *
32 * Contrary to U-Boot, we transform the same macros directly into hardcoded
33 * assignments (without any pesky function calls or volatile qualifiers) to give
34 * the compiler as much room for optimization as possible. For that reason, we
35 * also intentionally avoid <arch/io.h> read/write macros, under the assumption
36 * that PMC scratch register accesses should not have side effects and can be
37 * arbitrarily reordered. For the few accesses that do have side-effects, the
38 * code must contain explicit memory barriers.
39 */
40void sdram_lp0_save_params(const struct sdram_params *sdram)
41{
42 struct tegra_pmc_regs * pmc = (void *)TEGRA_PMC_BASE;
43 struct clk_rst_ctlr * clk_rst = (void *)TEGRA_CLK_RST_BASE;
44
45#define pack(src, src_bits, dst, dst_bits) { \
46 _Static_assert((1 ? src_bits) >= (0 ? src_bits) && (1 ? dst_bits) >= \
47 (0 ? dst_bits), "byte range flipped (must be MSB:LSB)" ); \
48 _Static_assert((1 ? src_bits) - (0 ? src_bits) == (1 ? dst_bits) - \
49 (0 ? dst_bits), "src and dst byte range lengths differ" ); \
50 u32 mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \
51 dst &= ~(mask << (0 ? dst_bits)); \
52 dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \
53}
54
55#define s(param, src_bits, pmcreg, dst_bits) \
56 pack(sdram->param, src_bits, pmc->pmcreg, dst_bits)
57
58#define m(clkreg, src_bits, pmcreg, dst_bits) \
59 pack(clk_rst->clkreg, src_bits, pmc->pmcreg, dst_bits)
60
61#define c(value, pmcreg, dst_bits) \
62 pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits)
63
64 s(EmcClockSource, 7:0, scratch6, 15:8);
65 s(EmcClockSource, 31:29, scratch6, 18:16);
66 s(EmcClockSource, 26:26, scratch6, 19:19);
67 s(EmcOdtWrite, 5:0, scratch6, 25:20);
68 s(EmcOdtWrite, 11:8, scratch6, 29:26);
69 s(EmcOdtWrite, 30:30, scratch6, 30:30);
70 s(EmcOdtWrite, 31:31, scratch6, 31:31);
71 s(EmcXm2DqPadCtrl2, 18:16, scratch7, 22:20);
72 s(EmcXm2DqPadCtrl2, 22:20, scratch7, 25:23);
73 s(EmcXm2DqPadCtrl2, 26:24, scratch7, 28:26);
74 s(EmcXm2DqPadCtrl2, 30:28, scratch7, 31:29);
75 s(EmcXm2DqPadCtrl3, 18:16, scratch8, 22:20);
76 s(EmcXm2DqPadCtrl3, 22:20, scratch8, 25:23);
77 s(EmcXm2DqPadCtrl3, 26:24, scratch8, 28:26);
78 s(EmcXm2DqPadCtrl3, 30:28, scratch8, 31:29);
79 s(EmcTxsrDll, 11:0, scratch9, 31:20);
80 c(0, scratch10, 31:0);
81 s(EmcDsrVttgenDrv, 5:0, scratch10, 25:20);
82 s(EmcDsrVttgenDrv, 18:16, scratch10, 28:26);
83 s(EmcDsrVttgenDrv, 26:24, scratch10, 31:29);
84 s(EmcFbioSpare, 31:24, scratch11, 7:0);
85 s(EmcFbioSpare, 23:16, scratch11, 15:8);
86 s(EmcFbioSpare, 15:8, scratch11, 23:16);
87 s(EmcFbioSpare, 7:0, scratch11, 31:24);
88 s(EmcCfgRsv, 31:0, scratch12, 31:0);
89 s(EmcCdbCntl2, 31:0, scratch13, 31:0);
90 s(McEmemArbDaTurns, 31:0, scratch14, 31:0);
91 s(EmcCfgDigDll, 0:0, scratch17, 0:0);
92 s(EmcCfgDigDll, 25:2, scratch17, 24:1);
93 s(EmcCfgDigDll, 31:27, scratch17, 29:25);
94 s(EmcCdbCntl1, 29:0, scratch18, 29:0);
95 s(McEmemArbMisc0, 14:0, scratch19, 14:0);
96 s(McEmemArbMisc0, 30:16, scratch19, 29:15);
97 s(EmcXm2DqsPadCtrl, 4:0, scratch22, 4:0);
98 s(EmcXm2DqsPadCtrl, 12:8, scratch22, 9:5);
99 s(EmcXm2DqsPadCtrl, 31:14, scratch22, 27:10);
100 s(EmcRrd, 3:0, scratch22, 31:28);
101 s(EmcXm2DqPadCtrl, 31:4, scratch23, 27:0);
102 s(EmcRext, 3:0, scratch23, 31:28);
103 s(EmcXm2CompPadCtrl, 16:0, scratch24, 16:0);
104 s(EmcXm2CompPadCtrl, 24:20, scratch24, 21:17);
105 s(EmcXm2CompPadCtrl, 27:27, scratch24, 22:22);
106 s(EmcXm2CompPadCtrl, 31:28, scratch24, 26:23);
107 s(EmcR2w, 4:0, scratch24, 31:27);
108 s(EmcCfg, 9:1, scratch25, 8:0);
109 s(EmcCfg, 26:16, scratch25, 19:9);
110 s(EmcCfg, 31:28, scratch25, 23:20);
111 s(EmcXm2VttGenPadCtrl, 0:0, scratch25, 24:24);
112 s(EmcXm2VttGenPadCtrl, 2:2, scratch25, 25:25);
113 s(EmcXm2VttGenPadCtrl, 18:16, scratch25, 28:26);
114 s(EmcXm2VttGenPadCtrl, 26:24, scratch25, 31:29);
115 s(EmcZcalInterval, 23:10, scratch26, 13:0);
116 s(EmcZcalInterval, 9:0, scratch26, 23:14);
117 s(EmcSelDpdCtrl, 5:2, scratch26, 27:24);
118 s(EmcSelDpdCtrl, 8:8, scratch26, 28:28);
119 s(EmcSelDpdCtrl, 18:16, scratch26, 31:29);
120 s(EmcXm2VttGenPadCtrl3, 22:0, scratch27, 22:0);
121 s(EmcXm2VttGenPadCtrl3, 24:24, scratch27, 23:23);
122 s(EmcSwizzleRank0ByteCfg, 1:0, scratch27, 25:24);
123 s(EmcSwizzleRank0ByteCfg, 5:4, scratch27, 27:26);
124 s(EmcSwizzleRank0ByteCfg, 9:8, scratch27, 29:28);
125 s(EmcSwizzleRank0ByteCfg, 13:12, scratch27, 31:30);
126 s(EmcXm2ClkPadCtrl2, 5:0, scratch28, 5:0);
127 s(EmcXm2ClkPadCtrl2, 13:8, scratch28, 11:6);
128 s(EmcXm2ClkPadCtrl2, 20:16, scratch28, 16:12);
129 s(EmcXm2ClkPadCtrl2, 23:23, scratch28, 17:17);
130 s(EmcXm2ClkPadCtrl2, 28:24, scratch28, 22:18);
131 s(EmcXm2ClkPadCtrl2, 31:31, scratch28, 23:23);
132 s(EmcSwizzleRank1ByteCfg, 1:0, scratch28, 25:24);
133 s(EmcSwizzleRank1ByteCfg, 5:4, scratch28, 27:26);
134 s(EmcSwizzleRank1ByteCfg, 9:8, scratch28, 29:28);
135 s(EmcSwizzleRank1ByteCfg, 13:12, scratch28, 31:30);
136 s(McEmemArbDaCovers, 23:0, scratch29, 23:0);
137 s(McEmemArbRsv, 7:0, scratch29, 31:24);
138 s(EmcAutoCalConfig, 4:0, scratch30, 4:0);
139 s(EmcAutoCalConfig, 12:8, scratch30, 9:5);
140 s(EmcAutoCalConfig, 18:16, scratch30, 12:10);
141 s(EmcAutoCalConfig, 25:20, scratch30, 18:13);
142 s(EmcAutoCalConfig, 31:28, scratch30, 22:19);
143 s(EmcRfc, 8:0, scratch30, 31:23);
144 s(EmcXm2DqsPadCtrl2, 21:0, scratch31, 21:0);
145 s(EmcXm2DqsPadCtrl2, 24:24, scratch31, 22:22);
146 s(EmcAr2Pden, 8:0, scratch31, 31:23);
147 s(EmcXm2ClkPadCtrl, 0:0, scratch32, 0:0);
148 s(EmcXm2ClkPadCtrl, 4:2, scratch32, 3:1);
149 s(EmcXm2ClkPadCtrl, 7:7, scratch32, 4:4);
150 s(EmcXm2ClkPadCtrl, 31:14, scratch32, 22:5);
151 s(EmcRfcSlr, 8:0, scratch32, 31:23);
152 s(EmcXm2DqsPadCtrl3, 0:0, scratch33, 0:0);
153 s(EmcXm2DqsPadCtrl3, 5:5, scratch33, 1:1);
154 s(EmcXm2DqsPadCtrl3, 12:8, scratch33, 6:2);
155 s(EmcXm2DqsPadCtrl3, 18:14, scratch33, 11:7);
156 s(EmcXm2DqsPadCtrl3, 24:20, scratch33, 16:12);
157 s(EmcXm2DqsPadCtrl3, 30:26, scratch33, 21:17);
158 s(EmcTxsr, 9:0, scratch33, 31:22);
159 s(McEmemArbCfg, 8:0, scratch40, 8:0);
160 s(McEmemArbCfg, 20:16, scratch40, 13:9);
161 s(McEmemArbCfg, 27:24, scratch40, 17:14);
162 s(McEmemArbCfg, 31:28, scratch40, 21:18);
163 s(EmcMc2EmcQ, 2:0, scratch40, 24:22);
164 s(EmcMc2EmcQ, 10:8, scratch40, 27:25);
165 s(EmcMc2EmcQ, 27:24, scratch40, 31:28);
166 s(EmcAutoCalInterval, 20:0, scratch42, 20:0);
167 s(McEmemArbOutstandingReq, 8:0, scratch42, 29:21);
168 s(McEmemArbOutstandingReq, 31:30, scratch42, 31:30);
169 s(EmcMrsWaitCnt2, 9:0, scratch44, 9:0);
170 s(EmcMrsWaitCnt2, 25:16, scratch44, 19:10);
171 s(EmcTxdsrvttgen, 11:0, scratch44, 31:20);
172 s(EmcMrsWaitCnt, 9:0, scratch45, 9:0);
173 s(EmcMrsWaitCnt, 25:16, scratch45, 19:10);
174 s(EmcCfgPipe, 1:0, scratch45, 21:20);
175 s(EmcCfgPipe, 9:4, scratch45, 27:22);
176 s(EmcCfgPipe, 15:12, scratch45, 31:28);
177 s(EmcXm2DqsPadCtrl4, 22:18, scratch46, 4:0);
178 s(EmcXm2DqsPadCtrl4, 16:12, scratch46, 9:5);
179 s(EmcXm2DqsPadCtrl4, 10:6, scratch46, 14:10);
180 s(EmcXm2DqsPadCtrl4, 4:0, scratch46, 19:15);
181 s(EmcZcalWaitCnt, 9:0, scratch46, 29:20);
182 s(EmcXm2DqsPadCtrl5, 22:18, scratch47, 4:0);
183 s(EmcXm2DqsPadCtrl5, 16:12, scratch47, 9:5);
184 s(EmcXm2DqsPadCtrl5, 10:6, scratch47, 14:10);
185 s(EmcXm2DqsPadCtrl5, 4:0, scratch47, 19:15);
186 s(EmcXm2VttGenPadCtrl2, 5:0, scratch47, 25:20);
187 s(EmcXm2VttGenPadCtrl2, 31:28, scratch47, 29:26);
188 s(EmcXm2DqsPadCtrl6, 12:8, scratch48, 4:0);
189 s(EmcXm2DqsPadCtrl6, 18:14, scratch48, 9:5);
190 s(EmcXm2DqsPadCtrl6, 24:20, scratch48, 14:10);
191 s(EmcXm2DqsPadCtrl6, 30:26, scratch48, 19:15);
192 s(EmcAutoCalConfig3, 4:0, scratch48, 24:20);
193 s(EmcAutoCalConfig3, 12:8, scratch48, 29:25);
194 s(EmcFbioCfg5, 1:0, scratch48, 31:30);
195 s(EmcDllXformQUse8, 4:0, scratch50, 4:0);
196 s(EmcDllXformQUse8, 22:8, scratch50, 19:5);
197 s(McEmemArbRing1Throttle, 4:0, scratch50, 24:20);
198 s(McEmemArbRing1Throttle, 20:16, scratch50, 29:25);
199 s(EmcFbioCfg5, 3:2, scratch50, 31:30);
200 s(EmcDllXformQUse9, 4:0, scratch51, 4:0);
201 s(EmcDllXformQUse9, 22:8, scratch51, 19:5);
202 s(EmcCttTermCtrl, 2:0, scratch51, 22:20);
203 s(EmcCttTermCtrl, 12:8, scratch51, 27:23);
204 s(EmcCttTermCtrl, 31:31, scratch51, 28:28);
205 s(EmcFbioCfg6, 2:0, scratch51, 31:29);
206 s(EmcDllXformQUse10, 4:0, scratch56, 4:0);
207 s(EmcDllXformQUse10, 22:8, scratch56, 19:5);
208 s(EmcXm2CmdPadCtrl, 10:3, scratch56, 27:20);
209 s(EmcXm2CmdPadCtrl, 28:28, scratch56, 28:28);
210 s(EmcPutermAdj, 1:0, scratch56, 30:29);
211 s(EmcPutermAdj, 7:7, scratch56, 31:31);
212 s(EmcDllXformQUse11, 4:0, scratch57, 4:0);
213 s(EmcDllXformQUse11, 22:8, scratch57, 19:5);
214 s(EmcWdv, 3:0, scratch57, 31:28);
215 s(EmcDllXformQUse12, 4:0, scratch58, 4:0);
216 s(EmcDllXformQUse12, 22:8, scratch58, 19:5);
217 s(EmcBurstRefreshNum, 3:0, scratch58, 31:28);
218 s(EmcDllXformQUse13, 4:0, scratch59, 4:0);
219 s(EmcDllXformQUse13, 22:8, scratch59, 19:5);
220 s(EmcWext, 3:0, scratch59, 31:28);
221 s(EmcDllXformQUse14, 4:0, scratch60, 4:0);
222 s(EmcDllXformQUse14, 22:8, scratch60, 19:5);
223 s(EmcClkenOverride, 3:1, scratch60, 30:28);
224 s(EmcClkenOverride, 6:6, scratch60, 31:31);
225 s(EmcDllXformQUse15, 4:0, scratch61, 4:0);
226 s(EmcDllXformQUse15, 22:8, scratch61, 19:5);
227 s(EmcR2r, 3:0, scratch61, 31:28);
228 s(EmcDllXformDq4, 4:0, scratch62, 4:0);
229 s(EmcDllXformDq4, 22:8, scratch62, 19:5);
230 s(EmcRc, 6:0, scratch62, 26:20);
231 s(EmcW2r, 4:0, scratch62, 31:27);
232 s(EmcDllXformDq5, 4:0, scratch63, 4:0);
233 s(EmcDllXformDq5, 22:8, scratch63, 19:5);
234 s(EmcTfaw, 6:0, scratch63, 26:20);
235 s(EmcR2p, 4:0, scratch63, 31:27);
236 s(EmcDllXformDq6, 4:0, scratch64, 4:0);
237 s(EmcDllXformDq6, 22:8, scratch64, 19:5);
238 s(EmcDliTrimTxDqs0, 6:0, scratch64, 26:20);
239 s(EmcQSafe, 4:0, scratch64, 31:27);
240 s(EmcDllXformDq7, 4:0, scratch65, 4:0);
241 s(EmcDllXformDq7, 22:8, scratch65, 19:5);
242 s(EmcDliTrimTxDqs1, 6:0, scratch65, 26:20);
243 s(EmcTClkStable, 4:0, scratch65, 31:27);
244 s(EmcAutoCalConfig2, 4:0, scratch66, 4:0);
245 s(EmcAutoCalConfig2, 12:8, scratch66, 9:5);
246 s(EmcAutoCalConfig2, 20:16, scratch66, 14:10);
247 s(EmcAutoCalConfig2, 28:24, scratch66, 19:15);
248 s(EmcDliTrimTxDqs2, 6:0, scratch66, 26:20);
249 s(EmcTClkStop, 4:0, scratch66, 31:27);
250 s(McEmemArbMisc1, 1:0, scratch67, 1:0);
251 s(McEmemArbMisc1, 12:4, scratch67, 10:2);
252 s(McEmemArbMisc1, 25:21, scratch67, 15:11);
253 s(McEmemArbMisc1, 31:28, scratch67, 19:16);
254 s(EmcDliTrimTxDqs3, 6:0, scratch67, 26:20);
255 s(EmcEInputDuration, 4:0, scratch67, 31:27);
256 s(EmcZcalMrwCmd, 7:0, scratch68, 7:0);
257 s(EmcZcalMrwCmd, 23:16, scratch68, 15:8);
258 s(EmcZcalMrwCmd, 31:30, scratch68, 17:16);
259 s(EmcTRefBw, 13:0, scratch68, 31:18);
260 s(EmcXm2CmdPadCtrl2, 31:14, scratch69, 17:0);
261 s(EmcDliTrimTxDqs4, 6:0, scratch69, 24:18);
262 s(EmcDliTrimTxDqs5, 6:0, scratch69, 31:25);
263 s(EmcXm2CmdPadCtrl3, 31:14, scratch70, 17:0);
264 s(EmcDliTrimTxDqs6, 6:0, scratch70, 24:18);
265 s(EmcDliTrimTxDqs7, 6:0, scratch70, 31:25);
266 s(EmcXm2CmdPadCtrl5, 2:0, scratch71, 2:0);
267 s(EmcXm2CmdPadCtrl5, 6:4, scratch71, 5:3);
268 s(EmcXm2CmdPadCtrl5, 10:8, scratch71, 8:6);
269 s(EmcXm2CmdPadCtrl5, 14:12, scratch71, 11:9);
270 s(EmcXm2CmdPadCtrl5, 18:16, scratch71, 14:12);
271 s(EmcXm2CmdPadCtrl5, 22:20, scratch71, 17:15);
272 s(EmcDliTrimTxDqs8, 6:0, scratch71, 24:18);
273 s(EmcDliTrimTxDqs9, 6:0, scratch71, 31:25);
274 s(EmcCdbCntl3, 17:0, scratch72, 17:0);
275 s(EmcDliTrimTxDqs10, 6:0, scratch72, 24:18);
276 s(EmcDliTrimTxDqs11, 6:0, scratch72, 31:25);
277 s(EmcSwizzleRank0Byte0, 2:0, scratch73, 2:0);
278 s(EmcSwizzleRank0Byte0, 6:4, scratch73, 5:3);
279 s(EmcSwizzleRank0Byte0, 10:8, scratch73, 8:6);
280 s(EmcSwizzleRank0Byte0, 14:12, scratch73, 11:9);
281 s(EmcSwizzleRank0Byte0, 18:16, scratch73, 14:12);
282 s(EmcSwizzleRank0Byte0, 22:20, scratch73, 17:15);
283 s(EmcDliTrimTxDqs12, 6:0, scratch73, 24:18);
284 s(EmcDliTrimTxDqs13, 6:0, scratch73, 31:25);
285 s(EmcSwizzleRank0Byte1, 2:0, scratch74, 2:0);
286 s(EmcSwizzleRank0Byte1, 6:4, scratch74, 5:3);
287 s(EmcSwizzleRank0Byte1, 10:8, scratch74, 8:6);
288 s(EmcSwizzleRank0Byte1, 14:12, scratch74, 11:9);
289 s(EmcSwizzleRank0Byte1, 18:16, scratch74, 14:12);
290 s(EmcSwizzleRank0Byte1, 22:20, scratch74, 17:15);
291 s(EmcDliTrimTxDqs14, 6:0, scratch74, 24:18);
292 s(EmcDliTrimTxDqs15, 6:0, scratch74, 31:25);
293 s(EmcSwizzleRank0Byte2, 2:0, scratch75, 2:0);
294 s(EmcSwizzleRank0Byte2, 6:4, scratch75, 5:3);
295 s(EmcSwizzleRank0Byte2, 10:8, scratch75, 8:6);
296 s(EmcSwizzleRank0Byte2, 14:12, scratch75, 11:9);
297 s(EmcSwizzleRank0Byte2, 18:16, scratch75, 14:12);
298 s(EmcSwizzleRank0Byte2, 22:20, scratch75, 17:15);
299 s(McEmemArbTimingRp, 6:0, scratch75, 24:18);
300 s(McEmemArbTimingRc, 6:0, scratch75, 31:25);
301 s(EmcSwizzleRank0Byte3, 2:0, scratch76, 2:0);
302 s(EmcSwizzleRank0Byte3, 6:4, scratch76, 5:3);
303 s(EmcSwizzleRank0Byte3, 10:8, scratch76, 8:6);
304 s(EmcSwizzleRank0Byte3, 14:12, scratch76, 11:9);
305 s(EmcSwizzleRank0Byte3, 18:16, scratch76, 14:12);
306 s(EmcSwizzleRank0Byte3, 22:20, scratch76, 17:15);
307 s(McEmemArbTimingFaw, 6:0, scratch76, 24:18);
308 s(McEmemArbTimingWap2Pre, 6:0, scratch76, 31:25);
309 s(EmcSwizzleRank1Byte0, 2:0, scratch77, 2:0);
310 s(EmcSwizzleRank1Byte0, 6:4, scratch77, 5:3);
311 s(EmcSwizzleRank1Byte0, 10:8, scratch77, 8:6);
312 s(EmcSwizzleRank1Byte0, 14:12, scratch77, 11:9);
313 s(EmcSwizzleRank1Byte0, 18:16, scratch77, 14:12);
314 s(EmcSwizzleRank1Byte0, 22:20, scratch77, 17:15);
315 s(EmcRas, 5:0, scratch77, 23:18);
316 s(EmcRp, 5:0, scratch77, 29:24);
317 s(EmcCfg2, 9:8, scratch77, 31:30);
318 s(EmcSwizzleRank1Byte1, 2:0, scratch78, 2:0);
319 s(EmcSwizzleRank1Byte1, 6:4, scratch78, 5:3);
320 s(EmcSwizzleRank1Byte1, 10:8, scratch78, 8:6);
321 s(EmcSwizzleRank1Byte1, 14:12, scratch78, 11:9);
322 s(EmcSwizzleRank1Byte1, 18:16, scratch78, 14:12);
323 s(EmcSwizzleRank1Byte1, 22:20, scratch78, 17:15);
324 s(EmcW2p, 5:0, scratch78, 23:18);
325 s(EmcRdRcd, 5:0, scratch78, 29:24);
326 s(EmcCfg2, 27:26, scratch78, 31:30);
327 s(EmcSwizzleRank1Byte2, 2:0, scratch79, 2:0);
328 s(EmcSwizzleRank1Byte2, 6:4, scratch79, 5:3);
329 s(EmcSwizzleRank1Byte2, 10:8, scratch79, 8:6);
330 s(EmcSwizzleRank1Byte2, 14:12, scratch79, 11:9);
331 s(EmcSwizzleRank1Byte2, 18:16, scratch79, 14:12);
332 s(EmcSwizzleRank1Byte2, 22:20, scratch79, 17:15);
333 s(EmcWrRcd, 5:0, scratch79, 23:18);
334 s(EmcQUse, 5:0, scratch79, 29:24);
335 s(EmcFbioCfg5, 4:4, scratch79, 31:31);
336 s(EmcSwizzleRank1Byte3, 2:0, scratch80, 2:0);
337 s(EmcSwizzleRank1Byte3, 6:4, scratch80, 5:3);
338 s(EmcSwizzleRank1Byte3, 10:8, scratch80, 8:6);
339 s(EmcSwizzleRank1Byte3, 14:12, scratch80, 11:9);
340 s(EmcSwizzleRank1Byte3, 18:16, scratch80, 14:12);
341 s(EmcSwizzleRank1Byte3, 22:20, scratch80, 17:15);
342 s(EmcQRst, 5:0, scratch80, 23:18);
343 s(EmcRdv, 5:0, scratch80, 29:24);
344 s(EmcFbioCfg5, 6:5, scratch80, 31:30);
345 s(EmcDynSelfRefControl, 15:0, scratch81, 15:0);
346 s(EmcDynSelfRefControl, 31:31, scratch81, 16:16);
347 s(EmcPdEx2Wr, 5:0, scratch81, 22:17);
348 s(EmcPdEx2Rd, 5:0, scratch81, 28:23);
349 s(EmcRefresh, 5:0, scratch82, 5:0);
350 s(EmcRefresh, 15:6, scratch82, 15:6);
351 s(EmcCmdQ, 4:0, scratch82, 20:16);
352 s(EmcCmdQ, 10:8, scratch82, 23:21);
353 s(EmcCmdQ, 14:12, scratch82, 26:24);
354 s(EmcCmdQ, 28:24, scratch82, 31:27);
355 s(EmcAcpdControl, 15:0, scratch83, 15:0);
356 s(EmcCfgDigDllPeriod, 15:0, scratch83, 31:16);
357 s(EmcDllXformDqs0, 4:0, scratch84, 4:0);
358 s(EmcDllXformDqs0, 22:12, scratch84, 15:5);
359 s(EmcDllXformDqs1, 4:0, scratch84, 20:16);
360 s(EmcDllXformDqs1, 22:12, scratch84, 31:21);
361 s(EmcDllXformDqs2, 4:0, scratch85, 4:0);
362 s(EmcDllXformDqs2, 22:12, scratch85, 15:5);
363 s(EmcDllXformDqs3, 4:0, scratch85, 20:16);
364 s(EmcDllXformDqs3, 22:12, scratch85, 31:21);
365 s(EmcDllXformDqs4, 4:0, scratch86, 4:0);
366 s(EmcDllXformDqs4, 22:12, scratch86, 15:5);
367 s(EmcDllXformDqs5, 4:0, scratch86, 20:16);
368 s(EmcDllXformDqs5, 22:12, scratch86, 31:21);
369 s(EmcDllXformDqs6, 4:0, scratch87, 4:0);
370 s(EmcDllXformDqs6, 22:12, scratch87, 15:5);
371 s(EmcDllXformDqs7, 4:0, scratch87, 20:16);
372 s(EmcDllXformDqs7, 22:12, scratch87, 31:21);
373 s(EmcDllXformDqs8, 4:0, scratch88, 4:0);
374 s(EmcDllXformDqs8, 22:12, scratch88, 15:5);
375 s(EmcDllXformDqs9, 4:0, scratch88, 20:16);
376 s(EmcDllXformDqs9, 22:12, scratch88, 31:21);
377 s(EmcDllXformDqs10, 4:0, scratch89, 4:0);
378 s(EmcDllXformDqs10, 22:12, scratch89, 15:5);
379 s(EmcDllXformDqs11, 4:0, scratch89, 20:16);
380 s(EmcDllXformDqs11, 22:12, scratch89, 31:21);
381 s(EmcDllXformDqs12, 4:0, scratch90, 4:0);
382 s(EmcDllXformDqs12, 22:12, scratch90, 15:5);
383 s(EmcDllXformDqs13, 4:0, scratch90, 20:16);
384 s(EmcDllXformDqs13, 22:12, scratch90, 31:21);
385 s(EmcDllXformDqs14, 4:0, scratch91, 4:0);
386 s(EmcDllXformDqs14, 22:12, scratch91, 15:5);
387 s(EmcDllXformDqs15, 4:0, scratch91, 20:16);
388 s(EmcDllXformDqs15, 22:12, scratch91, 31:21);
389 s(EmcDllXformQUse0, 4:0, scratch92, 4:0);
390 s(EmcDllXformQUse0, 22:12, scratch92, 15:5);
391 s(EmcDllXformQUse1, 4:0, scratch92, 20:16);
392 s(EmcDllXformQUse1, 22:12, scratch92, 31:21);
393 s(EmcDllXformQUse2, 4:0, scratch93, 4:0);
394 s(EmcDllXformQUse2, 22:12, scratch93, 15:5);
395 s(EmcDllXformQUse3, 4:0, scratch93, 20:16);
396 s(EmcDllXformQUse3, 22:12, scratch93, 31:21);
397 s(EmcDllXformQUse4, 4:0, scratch94, 4:0);
398 s(EmcDllXformQUse4, 22:12, scratch94, 15:5);
399 s(EmcDllXformQUse5, 4:0, scratch94, 20:16);
400 s(EmcDllXformQUse5, 22:12, scratch94, 31:21);
401 s(EmcDllXformQUse6, 4:0, scratch95, 4:0);
402 s(EmcDllXformQUse6, 22:12, scratch95, 15:5);
403 s(EmcDllXformQUse7, 4:0, scratch95, 20:16);
404 s(EmcDllXformQUse7, 22:12, scratch95, 31:21);
405 s(EmcDllXformDq0, 4:0, scratch96, 4:0);
406 s(EmcDllXformDq0, 22:12, scratch96, 15:5);
407 s(EmcDllXformDq1, 4:0, scratch96, 20:16);
408 s(EmcDllXformDq1, 22:12, scratch96, 31:21);
409 s(EmcDllXformDq2, 4:0, scratch97, 4:0);
410 s(EmcDllXformDq2, 22:12, scratch97, 15:5);
411 s(EmcDllXformDq3, 4:0, scratch97, 20:16);
412 s(EmcDllXformDq3, 22:12, scratch97, 31:21);
413 s(EmcPreRefreshReqCnt, 15:0, scratch98, 15:0);
414 s(EmcDllXformAddr0, 4:0, scratch98, 20:16);
415 s(EmcDllXformAddr0, 22:12, scratch98, 31:21);
416 s(EmcDllXformAddr1, 4:0, scratch99, 4:0);
417 s(EmcDllXformAddr1, 22:12, scratch99, 15:5);
418 s(EmcDllXformAddr2, 4:0, scratch99, 20:16);
419 s(EmcDllXformAddr2, 22:12, scratch99, 31:21);
420 s(EmcDllXformAddr3, 4:0, scratch100, 4:0);
421 s(EmcDllXformAddr3, 22:12, scratch100, 15:5);
422 s(EmcDllXformAddr4, 4:0, scratch100, 20:16);
423 s(EmcDllXformAddr4, 22:12, scratch100, 31:21);
424 s(EmcDllXformAddr5, 4:0, scratch101, 4:0);
425 s(EmcDllXformAddr5, 22:12, scratch101, 15:5);
426 s(EmcPChg2Pden, 5:0, scratch102, 5:0);
427 s(EmcAct2Pden, 5:0, scratch102, 11:6);
428 s(EmcRw2Pden, 5:0, scratch102, 17:12);
429 s(EmcTcke, 5:0, scratch102, 23:18);
430 s(EmcTrpab, 5:0, scratch102, 29:24);
431 s(EmcFbioCfg5, 8:7, scratch102, 31:30);
432 s(EmcCtt, 5:0, scratch103, 5:0);
433 s(EmcEInput, 5:0, scratch103, 11:6);
434 s(EmcPutermExtra, 21:16, scratch103, 17:12);
435 s(EmcTckesr, 5:0, scratch103, 23:18);
436 s(EmcTpd, 5:0, scratch103, 29:24);
437 s(EmcFbioCfg5, 10:9, scratch103, 31:30);
438 s(EmcRdvMask, 5:0, scratch104, 5:0);
439 s(EmcXm2CmdPadCtrl4, 0:0, scratch104, 6:6);
440 s(EmcXm2CmdPadCtrl4, 2:2, scratch104, 7:7);
441 s(EmcXm2CmdPadCtrl4, 4:4, scratch104, 8:8);
442 s(EmcXm2CmdPadCtrl4, 6:6, scratch104, 9:9);
443 s(EmcXm2CmdPadCtrl4, 8:8, scratch104, 10:10);
444 s(EmcXm2CmdPadCtrl4, 10:10, scratch104, 11:11);
445 s(EmcQpop, 5:0, scratch104, 17:12);
446 s(McEmemArbTimingRcd, 5:0, scratch104, 23:18);
447 s(McEmemArbTimingRas, 5:0, scratch104, 29:24);
448 s(EmcFbioCfg5, 12:11, scratch104, 31:30);
449 s(McEmemArbTimingRap2Pre, 5:0, scratch105, 5:0);
450 s(McEmemArbTimingR2W, 5:0, scratch105, 11:6);
451 s(McEmemArbTimingW2R, 5:0, scratch105, 17:12);
452 s(EmcIbdly, 4:0, scratch105, 22:18);
453 s(McEmemArbTimingR2R, 4:0, scratch105, 27:23);
454 s(EmcW2w, 3:0, scratch105, 31:28);
455 s(McEmemArbTimingW2W, 4:0, scratch106, 4:0);
456 s(McEmemArbOverride, 27:27, scratch106, 5:5);
457 s(McEmemArbOverride, 26:26, scratch106, 6:6);
458 s(McEmemArbOverride, 16:16, scratch106, 7:7);
459 s(McEmemArbOverride, 10:10, scratch106, 8:8);
460 s(McEmemArbOverride, 4:4, scratch106, 9:9);
461 s(EmcWdvMask, 3:0, scratch106, 13:10);
462 s(EmcCttDuration, 3:0, scratch106, 17:14);
463 s(EmcQuseWidth, 3:0, scratch106, 21:18);
464 s(EmcPutermWidth, 3:0, scratch106, 25:22);
465 s(EmcBgbiasCtl0, 3:0, scratch106, 29:26);
466 s(EmcFbioCfg5, 25:24, scratch106, 31:30);
467 s(McEmemArbTimingRrd, 3:0, scratch107, 3:0);
468 s(EmcFbioCfg5, 23:20, scratch107, 10:7);
469 s(EmcFbioCfg5, 15:13, scratch107, 13:11);
470 s(EmcCfg2, 5:3, scratch107, 16:14);
471 s(EmcFbioCfg5, 26:26, scratch107, 17:17);
472 s(EmcFbioCfg5, 28:28, scratch107, 18:18);
473 s(EmcCfg2, 2:0, scratch107, 21:19);
474 s(EmcCfg2, 7:6, scratch107, 23:22);
475 s(EmcCfg2, 15:10, scratch107, 29:24);
476 s(EmcCfg2, 23:22, scratch107, 31:30);
477 s(EmcCfg2, 25:24, scratch108, 1:0);
478 s(EmcCfg2, 31:28, scratch108, 5:2);
479 s(BootRomPatchData, 31:0, scratch15, 31:0);
480 s(BootRomPatchControl, 31:0, scratch16, 31:0);
481 s(EmcDevSelect, 1:0, scratch17, 31:30);
482 s(EmcZcalWarmColdBootEnables, 1:0, scratch18, 31:30);
483 s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch19, 31:30);
484 s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch46, 30:30);
485 s(McClkenOverrideAllWarmBoot, 0:0, scratch46, 31:31);
486 s(EmcClkenOverrideAllWarmBoot, 0:0, scratch47, 30:30);
487 s(EmcMrsWarmBootEnable, 0:0, scratch47, 31:31);
488 s(EmcTimingControlWait, 7:0, scratch57, 27:20);
489 s(EmcZcalWarmBootWait, 7:0, scratch58, 27:20);
490 s(EmcAutoCalWait, 7:0, scratch59, 27:20);
491 s(WarmBootWait, 7:0, scratch60, 27:20);
492 s(EmcPinProgramWait, 7:0, scratch61, 27:20);
493 s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch79, 30:30);
494 s(EmcExtraRefreshNum, 2:0, scratch81, 31:29);
495 s(SwizzleRankByteEncode, 15:0, scratch101, 31:16);
496 s(MemoryType, 2:0, scratch107, 6:4);
497
498 switch (sdram->MemoryType) {
499 case NvBootMemoryType_LpDdr2:
500 s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0);
501 s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8);
502 s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16);
503 s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24);
504 s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0);
505 s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2);
506 s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4);
507 s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6);
508 s(EmcMrw1, 7:0, scratch7, 7:0);
509 s(EmcMrw1, 23:16, scratch7, 15:8);
510 s(EmcMrw1, 27:26, scratch7, 17:16);
511 s(EmcMrw1, 31:30, scratch7, 19:18);
512 s(EmcMrw2, 7:0, scratch8, 7:0);
513 s(EmcMrw2, 23:16, scratch8, 15:8);
514 s(EmcMrw2, 27:26, scratch8, 17:16);
515 s(EmcMrw2, 31:30, scratch8, 19:18);
516 s(EmcMrw3, 7:0, scratch9, 7:0);
517 s(EmcMrw3, 23:16, scratch9, 15:8);
518 s(EmcMrw3, 27:26, scratch9, 17:16);
519 s(EmcMrw3, 31:30, scratch9, 19:18);
520 s(EmcMrw4, 7:0, scratch10, 7:0);
521 s(EmcMrw4, 23:16, scratch10, 15:8);
522 s(EmcMrw4, 27:26, scratch10, 17:16);
523 s(EmcMrw4, 31:30, scratch10, 19:18);
524 break;
525 case NvBootMemoryType_Ddr3:
526 s(EmcMrs, 13:0, scratch5, 13:0);
527 s(EmcEmrs, 13:0, scratch5, 27:14);
528 s(EmcMrs, 21:20, scratch5, 29:28);
529 s(EmcMrs, 31:30, scratch5, 31:30);
530 s(EmcEmrs2, 13:0, scratch7, 13:0);
531 s(EmcEmrs, 21:20, scratch7, 15:14);
532 s(EmcEmrs, 31:30, scratch7, 17:16);
533 s(EmcEmrs2, 21:20, scratch7, 19:18);
534 s(EmcEmrs3, 13:0, scratch8, 13:0);
535 s(EmcEmrs2, 31:30, scratch8, 15:14);
536 s(EmcEmrs3, 21:20, scratch8, 17:16);
537 s(EmcEmrs3, 31:30, scratch8, 19:18);
538 s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0);
539 s(EmcWarmBootMrsExtra, 31:30, scratch9, 15:14);
540 s(EmcWarmBootMrsExtra, 21:20, scratch9, 17:16);
541 s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 19:18);
542 s(EmcMrs, 27:26, scratch10, 1:0);
543 s(EmcEmrs, 27:26, scratch10, 3:2);
544 s(EmcEmrs2, 27:26, scratch10, 5:4);
545 s(EmcEmrs3, 27:26, scratch10, 7:6);
546 s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8);
547 s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9);
548 s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10);
549 s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11);
550 c(0, scratch116, 31:0);
551 c(0, scratch117, 31:0);
552 break;
553 default:
554 printk(BIOS_CRIT, "ERROR: %s() unrecognized MemoryType %d!\n",
555 __func__, sdram->MemoryType);
556 }
557
558 s(McVideoProtectGpuOverride0, 31:0, secure_scratch8, 31:0);
559 s(McVideoProtectVprOverride, 3:0, secure_scratch9, 3:0);
560 s(McVideoProtectVprOverride, 11:6, secure_scratch9, 9:4);
561 s(McVideoProtectVprOverride, 23:14, secure_scratch9, 19:10);
562 s(McVideoProtectVprOverride, 26:26, secure_scratch9, 20:20);
563 s(McVideoProtectVprOverride, 31:29, secure_scratch9, 23:21);
564 s(EmcFbioCfg5, 19:16, secure_scratch9, 27:24);
565 s(McDisplaySnapRing, 1:0, secure_scratch9, 29:28);
566 s(McDisplaySnapRing, 31:31, secure_scratch9, 30:30);
567 s(EmcAdrCfg, 0:0, secure_scratch9, 31:31);
568 s(McVideoProtectGpuOverride1, 15:0, secure_scratch10, 15:0);
569 s(McEmemAdrCfgBankMask0, 15:0, secure_scratch10, 31:16);
570 s(McEmemAdrCfgBankMask1, 15:0, secure_scratch11, 15:0);
571 s(McEmemAdrCfgBankMask2, 15:0, secure_scratch11, 31:16);
572 s(McEmemCfg, 13:0, secure_scratch12, 13:0);
573 s(McEmemCfg, 31:31, secure_scratch12, 14:14);
574 s(McVideoProtectBom, 31:20, secure_scratch12, 26:15);
575 s(McVideoProtectVprOverride1, 1:0, secure_scratch12, 28:27);
576 s(McVideoProtectVprOverride1, 4:4, secure_scratch12, 29:29);
577 s(McVideoProtectBomAdrHi, 1:0, secure_scratch12, 31:30);
578 s(McVideoProtectSizeMb, 11:0, secure_scratch13, 11:0);
579 s(McSecCarveoutBom, 31:20, secure_scratch13, 23:12);
580 s(McEmemAdrCfgBankSwizzle3, 2:0, secure_scratch13, 26:24);
581 s(McVideoProtectWriteAccess, 1:0, secure_scratch13, 28:27);
582 s(McSecCarveoutAdrHi, 1:0, secure_scratch13, 30:29);
583 s(McEmemAdrCfg, 0:0, secure_scratch13, 31:31);
584 s(McSecCarveoutSizeMb, 11:0, secure_scratch14, 11:0);
585 s(McMtsCarveoutBom, 31:20, secure_scratch14, 23:12);
586 s(McMtsCarveoutAdrHi, 1:0, secure_scratch14, 25:24);
587 s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch14, 26:26);
588 s(McMtsCarveoutRegCtrl, 0:0, secure_scratch14, 27:27);
589 s(McMtsCarveoutSizeMb, 11:0, secure_scratch15, 11:0);
590 s(McEmemAdrCfgDev0, 2:0, secure_scratch15, 14:12);
591 s(McEmemAdrCfgDev0, 9:8, secure_scratch15, 16:15);
592 s(McEmemAdrCfgDev0, 19:16, secure_scratch15, 20:17);
593 s(McEmemAdrCfgDev1, 2:0, secure_scratch15, 23:21);
594 s(McEmemAdrCfgDev1, 9:8, secure_scratch15, 25:24);
595 s(McEmemAdrCfgDev1, 19:16, secure_scratch15, 29:26);
596
597 /* Make sure all writes complete before we lock the secure_scratchs. */
598 dmb();
599 c(0x1555555, sec_disable2, 25:0);
600 c(0xff, sec_disable, 19:12);
601
602 c(0, scratch2, 31:0);
603 m(pllm_base, 15:0, scratch2, 15:0);
604 m(pllm_base, 20:20, scratch2, 16:16);
605 m(pllm_misc2, 2:0, scratch2, 19:17);
606 c(0, scratch35, 31:0);
607 m(pllm_misc1, 23:0, scratch35, 23:0);
608 m(pllm_misc1, 30:28, scratch35, 30:28);
609 c(0, scratch3, 31:0);
610 s(PllMInputDivider, 7:0, scratch3, 7:0);
611 c(0x3e, scratch3, 15:8);
612 c(0, scratch3, 19:16);
613 s(PllMKVCO, 0:0, scratch3, 20:20);
614 s(PllMKCP, 1:0, scratch3, 22:21);
615 c(0, scratch36, 31:0);
616 s(PllMSetupControl, 23:0, scratch36, 23:0);
617 c(0, scratch4, 31:0);
618 s(PllMStableTime, 9:0, scratch4, 9:0);
619 s(PllMStableTime, 9:0, scratch4, 19:10);
620
621 s(PllMSelectDiv2, 0:0, pllm_wb0_override2, 27:27);
622 s(PllMKVCO, 0:0, pllm_wb0_override2, 26:26);
623 s(PllMKCP, 1:0, pllm_wb0_override2, 25:24);
624 s(PllMSetupControl, 23:0, pllm_wb0_override2, 23:0);
625 s(PllMFeedbackDivider, 7:0, pllm_wb0_override_freq, 15:8);
626 s(PllMInputDivider, 7:0, pllm_wb0_override_freq, 7:0);
627
628 /* Need to ensure override params are written before we activate it. */
629 dmb();
630 c(3, pllp_wb0_override, 12:11);
631}