src/soc: Fix typo
Change-Id: I8053d0f0863aa4d93692487f1ca802195c2d475f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27908
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/soc/nvidia/tegra124/sdram_lp0.c b/src/soc/nvidia/tegra124/sdram_lp0.c
index d5019d9..536ad31 100644
--- a/src/soc/nvidia/tegra124/sdram_lp0.c
+++ b/src/soc/nvidia/tegra124/sdram_lp0.c
@@ -23,7 +23,7 @@
#include <stdlib.h>
/*
- * This function reads SDRAM parameters (and a few CLK_RST regsiter values) from
+ * This function reads SDRAM parameters (and a few CLK_RST register values) from
* the common BCT format and writes them into PMC scratch registers (where the
* BootROM expects them on LP0 resume). Since those store the same values in a
* different format, we follow a "translation table" taken from Nvidia's U-Boot