Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 1 | // PCI SD Host Controller Interface |
| 2 | // |
| 3 | // Copyright (C) 2014 Kevin O'Connor <kevin@koconnor.net> |
| 4 | // |
| 5 | // This file may be distributed under the terms of the GNU LGPLv3 license. |
| 6 | |
| 7 | #include "block.h" // struct drive_s |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 8 | #include "malloc.h" // malloc_fseg |
| 9 | #include "output.h" // znprintf |
Kevin O'Connor | 4d8510c | 2016-02-03 01:28:20 -0500 | [diff] [blame] | 10 | #include "pcidevice.h" // foreachpci |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 11 | #include "pci_ids.h" // PCI_CLASS_SYSTEM_SDHCI |
| 12 | #include "pci_regs.h" // PCI_BASE_ADDRESS_0 |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 13 | #include "romfile.h" // romfile_findprefix |
Kevin O'Connor | 46561b0 | 2016-02-02 22:23:55 -0500 | [diff] [blame] | 14 | #include "stacks.h" // yield |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 15 | #include "std/disk.h" // DISK_RET_SUCCESS |
| 16 | #include "string.h" // memset |
| 17 | #include "util.h" // boot_add_hd |
| 18 | #include "x86.h" // writel |
| 19 | |
| 20 | // SDHCI MMIO registers |
| 21 | struct sdhci_s { |
| 22 | u32 sdma_addr; |
| 23 | u16 block_size; |
| 24 | u16 block_count; |
| 25 | u32 arg; |
| 26 | u16 transfer_mode; |
| 27 | u16 cmd; |
| 28 | u32 response[4]; |
| 29 | u32 data; |
| 30 | u32 present_state; |
| 31 | u8 host_control; |
| 32 | u8 power_control; |
| 33 | u8 block_gap_control; |
| 34 | u8 wakeup_control; |
| 35 | u16 clock_control; |
| 36 | u8 timeout_control; |
| 37 | u8 software_reset; |
| 38 | u16 irq_status; |
| 39 | u16 error_irq_status; |
| 40 | u16 irq_enable; |
| 41 | u16 error_irq_enable; |
| 42 | u16 irq_signal; |
| 43 | u16 error_signal; |
| 44 | u16 auto_cmd12; |
Kevin O'Connor | d5b7821 | 2015-08-11 09:34:19 -0400 | [diff] [blame] | 45 | u16 host_control2; |
Kevin O'Connor | 67bb455 | 2015-07-28 13:40:04 -0400 | [diff] [blame] | 46 | u32 cap_lo, cap_hi; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 47 | u64 max_current; |
| 48 | u16 force_auto_cmd12; |
| 49 | u16 force_error; |
| 50 | u8 adma_error; |
| 51 | u8 pad_55[3]; |
| 52 | u64 adma_addr; |
| 53 | u8 pad_60[156]; |
| 54 | u16 slot_irq; |
| 55 | u16 controller_version; |
| 56 | } PACKED; |
| 57 | |
| 58 | // SDHCI commands |
Kevin O'Connor | cfe326b | 2015-08-10 23:40:50 -0400 | [diff] [blame] | 59 | #define SCB_R0 0x00 // No response |
| 60 | #define SCB_R48 0x1a // Response R1 (no data), R5, R6, R7 |
| 61 | #define SCB_R48d 0x3a // Response R1 (with data) |
| 62 | #define SCB_R48b 0x1b // Response R1b, R5b |
| 63 | #define SCB_R48o 0x02 // Response R3, R4 |
| 64 | #define SCB_R136 0x09 // Response R2 |
| 65 | #define SC_GO_IDLE_STATE ((0<<8) | SCB_R0) |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 66 | #define SC_SEND_OP_COND ((1<<8) | SCB_R48o) |
Kevin O'Connor | cfe326b | 2015-08-10 23:40:50 -0400 | [diff] [blame] | 67 | #define SC_ALL_SEND_CID ((2<<8) | SCB_R136) |
| 68 | #define SC_SEND_RELATIVE_ADDR ((3<<8) | SCB_R48) |
| 69 | #define SC_SELECT_DESELECT_CARD ((7<<8) | SCB_R48b) |
| 70 | #define SC_SEND_IF_COND ((8<<8) | SCB_R48) |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 71 | #define SC_SEND_EXT_CSD ((8<<8) | SCB_R48d) |
| 72 | #define SC_SEND_CSD ((9<<8) | SCB_R136) |
Kevin O'Connor | cfe326b | 2015-08-10 23:40:50 -0400 | [diff] [blame] | 73 | #define SC_READ_SINGLE ((17<<8) | SCB_R48d) |
| 74 | #define SC_READ_MULTIPLE ((18<<8) | SCB_R48d) |
| 75 | #define SC_WRITE_SINGLE ((24<<8) | SCB_R48d) |
| 76 | #define SC_WRITE_MULTIPLE ((25<<8) | SCB_R48d) |
| 77 | #define SC_APP_CMD ((55<<8) | SCB_R48) |
| 78 | #define SC_APP_SEND_OP_COND ((41<<8) | SCB_R48o) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 79 | |
| 80 | // SDHCI irqs |
| 81 | #define SI_CMD_COMPLETE (1<<0) |
| 82 | #define SI_TRANS_DONE (1<<1) |
| 83 | #define SI_WRITE_READY (1<<4) |
| 84 | #define SI_READ_READY (1<<5) |
Kevin O'Connor | bf8f266 | 2015-08-12 12:07:17 -0400 | [diff] [blame] | 85 | #define SI_ERROR (1<<15) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 86 | |
| 87 | // SDHCI present_state flags |
Kevin O'Connor | 11198db | 2015-07-28 13:06:41 -0400 | [diff] [blame] | 88 | #define SP_CMD_INHIBIT (1<<0) |
| 89 | #define SP_DAT_INHIBIT (1<<1) |
| 90 | #define SP_CARD_INSERTED (1<<16) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 91 | |
| 92 | // SDHCI transfer_mode flags |
| 93 | #define ST_BLOCKCOUNT (1<<1) |
| 94 | #define ST_AUTO_CMD12 (1<<2) |
| 95 | #define ST_READ (1<<4) |
| 96 | #define ST_MULTIPLE (1<<5) |
| 97 | |
Kevin O'Connor | 67bb455 | 2015-07-28 13:40:04 -0400 | [diff] [blame] | 98 | // SDHCI capabilities flags |
Kevin O'Connor | 86efbb6 | 2015-08-04 09:48:30 -0400 | [diff] [blame] | 99 | #define SD_CAPLO_V33 (1<<24) |
Kevin O'Connor | ad0c9ea | 2015-08-11 11:56:51 -0400 | [diff] [blame] | 100 | #define SD_CAPLO_V30 (1<<25) |
| 101 | #define SD_CAPLO_V18 (1<<26) |
Kevin O'Connor | 67bb455 | 2015-07-28 13:40:04 -0400 | [diff] [blame] | 102 | #define SD_CAPLO_BASECLOCK_SHIFT 8 |
Kevin O'Connor | d5b7821 | 2015-08-11 09:34:19 -0400 | [diff] [blame] | 103 | #define SD_CAPLO_BASECLOCK_MASK 0xff |
Kevin O'Connor | 67bb455 | 2015-07-28 13:40:04 -0400 | [diff] [blame] | 104 | |
| 105 | // SDHCI clock control flags |
| 106 | #define SCC_INTERNAL_ENABLE (1<<0) |
| 107 | #define SCC_STABLE (1<<1) |
| 108 | #define SCC_CLOCK_ENABLE (1<<2) |
Kevin O'Connor | d5b7821 | 2015-08-11 09:34:19 -0400 | [diff] [blame] | 109 | #define SCC_SDCLK_MASK 0xff |
Kevin O'Connor | 67bb455 | 2015-07-28 13:40:04 -0400 | [diff] [blame] | 110 | #define SCC_SDCLK_SHIFT 8 |
Kevin O'Connor | d5b7821 | 2015-08-11 09:34:19 -0400 | [diff] [blame] | 111 | #define SCC_SDCLK_HI_MASK 0x300 |
| 112 | #define SCC_SDCLK_HI_RSHIFT 2 |
Kevin O'Connor | 67bb455 | 2015-07-28 13:40:04 -0400 | [diff] [blame] | 113 | |
Kevin O'Connor | 86efbb6 | 2015-08-04 09:48:30 -0400 | [diff] [blame] | 114 | // SDHCI power control flags |
| 115 | #define SPC_POWER_ON (1<<0) |
Kevin O'Connor | ad0c9ea | 2015-08-11 11:56:51 -0400 | [diff] [blame] | 116 | #define SPC_V18 0x0a |
| 117 | #define SPC_V30 0x0c |
Kevin O'Connor | 86efbb6 | 2015-08-04 09:48:30 -0400 | [diff] [blame] | 118 | #define SPC_V33 0x0e |
| 119 | |
Kevin O'Connor | 9b73aa6 | 2015-08-12 12:02:16 -0400 | [diff] [blame] | 120 | // SDHCI software reset flags |
| 121 | #define SRF_ALL 0x01 |
| 122 | #define SRF_CMD 0x02 |
| 123 | #define SRF_DATA 0x04 |
| 124 | |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 125 | // SDHCI result flags |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 126 | #define SR_OCR_CCS (1<<30) |
| 127 | #define SR_OCR_NOTBUSY (1<<31) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 128 | |
| 129 | // SDHCI timeouts |
Kevin O'Connor | 4c6de9e | 2015-08-04 10:01:02 -0400 | [diff] [blame] | 130 | #define SDHCI_POWER_OFF_TIME 1 |
Kevin O'Connor | e4db8c6 | 2018-09-03 17:32:44 -0400 | [diff] [blame^] | 131 | #define SDHCI_POWER_ON_TIME 5 |
Kevin O'Connor | 4c6de9e | 2015-08-04 10:01:02 -0400 | [diff] [blame] | 132 | #define SDHCI_CLOCK_ON_TIME 1 // 74 clock cycles |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 133 | #define SDHCI_POWERUP_TIMEOUT 1000 |
Kevin O'Connor | 18254b3 | 2015-08-12 12:58:23 -0400 | [diff] [blame] | 134 | #define SDHCI_PIO_TIMEOUT 1000 // XXX - this is just made up |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 135 | |
| 136 | // Internal 'struct drive_s' storage for a detected card |
| 137 | struct sddrive_s { |
| 138 | struct drive_s drive; |
| 139 | struct sdhci_s *regs; |
| 140 | int card_type; |
| 141 | }; |
| 142 | |
| 143 | // SD card types |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 144 | #define SF_MMC (1<<0) |
| 145 | #define SF_HIGHCAPACITY (1<<1) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 146 | |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 147 | // Repeatedly read a u16 register until any bit in a given mask is set |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 148 | static int |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 149 | sdcard_waitw(u16 *reg, u16 mask) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 150 | { |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 151 | u32 end = timer_calc(SDHCI_PIO_TIMEOUT); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 152 | for (;;) { |
| 153 | u16 v = readw(reg); |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 154 | if (v & mask) |
| 155 | return v; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 156 | if (timer_check(end)) { |
Kevin O'Connor | fc0ac95 | 2015-11-17 14:56:04 -0500 | [diff] [blame] | 157 | dprintf(1, "scard_waitw: %p %x %x\n", reg, mask, v); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 158 | warn_timeout(); |
| 159 | return -1; |
| 160 | } |
| 161 | yield(); |
| 162 | } |
| 163 | } |
| 164 | |
Kevin O'Connor | 9b73aa6 | 2015-08-12 12:02:16 -0400 | [diff] [blame] | 165 | // Send an sdhci reset |
| 166 | static int |
| 167 | sdcard_reset(struct sdhci_s *regs, int flags) |
| 168 | { |
| 169 | writeb(®s->software_reset, flags); |
| 170 | u32 end = timer_calc(SDHCI_PIO_TIMEOUT); |
| 171 | while (readb(®s->software_reset)) |
| 172 | if (timer_check(end)) { |
| 173 | warn_timeout(); |
| 174 | return -1; |
| 175 | } |
| 176 | return 0; |
| 177 | } |
| 178 | |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 179 | // Send a command to the card. |
| 180 | static int |
| 181 | sdcard_pio(struct sdhci_s *regs, int cmd, u32 *param) |
| 182 | { |
Kevin O'Connor | 34cc2fd | 2015-08-11 12:59:53 -0400 | [diff] [blame] | 183 | u32 state = readl(®s->present_state); |
| 184 | dprintf(9, "sdcard_pio cmd %x %x %x\n", cmd, *param, state); |
| 185 | if ((state & SP_CMD_INHIBIT) |
| 186 | || ((cmd & 0x03) == 0x03 && state & SP_DAT_INHIBIT)) { |
| 187 | dprintf(1, "sdcard_pio not ready %x\n", state); |
| 188 | return -1; |
| 189 | } |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 190 | // Send command |
| 191 | writel(®s->arg, *param); |
| 192 | writew(®s->cmd, cmd); |
Kevin O'Connor | bf8f266 | 2015-08-12 12:07:17 -0400 | [diff] [blame] | 193 | int ret = sdcard_waitw(®s->irq_status, SI_ERROR|SI_CMD_COMPLETE); |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 194 | if (ret < 0) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 195 | return ret; |
Kevin O'Connor | bf8f266 | 2015-08-12 12:07:17 -0400 | [diff] [blame] | 196 | if (ret & SI_ERROR) { |
| 197 | u16 err = readw(®s->error_irq_status); |
| 198 | dprintf(3, "sdcard_pio command stop (code=%x)\n", err); |
| 199 | sdcard_reset(regs, SRF_CMD|SRF_DATA); |
| 200 | writew(®s->error_irq_status, err); |
| 201 | return -1; |
| 202 | } |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 203 | writew(®s->irq_status, SI_CMD_COMPLETE); |
| 204 | // Read response |
| 205 | memcpy(param, regs->response, sizeof(regs->response)); |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 206 | dprintf(9, "sdcard cmd %x response %x %x %x %x\n" |
| 207 | , cmd, param[0], param[1], param[2], param[3]); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 208 | return 0; |
| 209 | } |
| 210 | |
| 211 | // Send an "app specific" command to the card. |
| 212 | static int |
| 213 | sdcard_pio_app(struct sdhci_s *regs, int cmd, u32 *param) |
| 214 | { |
| 215 | u32 aparam[4] = {}; |
| 216 | int ret = sdcard_pio(regs, SC_APP_CMD, aparam); |
| 217 | if (ret) |
| 218 | return ret; |
| 219 | return sdcard_pio(regs, cmd, param); |
| 220 | } |
| 221 | |
| 222 | // Send a command to the card which transfers data. |
| 223 | static int |
| 224 | sdcard_pio_transfer(struct sddrive_s *drive, int cmd, u32 addr |
| 225 | , void *data, int count) |
| 226 | { |
| 227 | // Send command |
Kevin O'Connor | 8f7dc5a | 2015-11-17 14:54:11 -0500 | [diff] [blame] | 228 | writew(&drive->regs->block_size, DISK_SECTOR_SIZE); |
Kevin O'Connor | 18254b3 | 2015-08-12 12:58:23 -0400 | [diff] [blame] | 229 | writew(&drive->regs->block_count, count); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 230 | int isread = cmd != SC_WRITE_SINGLE && cmd != SC_WRITE_MULTIPLE; |
| 231 | u16 tmode = ((count > 1 ? ST_MULTIPLE|ST_AUTO_CMD12|ST_BLOCKCOUNT : 0) |
| 232 | | (isread ? ST_READ : 0)); |
| 233 | writew(&drive->regs->transfer_mode, tmode); |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 234 | if (!(drive->card_type & SF_HIGHCAPACITY)) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 235 | addr *= DISK_SECTOR_SIZE; |
| 236 | u32 param[4] = { addr }; |
| 237 | int ret = sdcard_pio(drive->regs, cmd, param); |
| 238 | if (ret) |
| 239 | return ret; |
| 240 | // Read/write data |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 241 | u16 cbit = isread ? SI_READ_READY : SI_WRITE_READY; |
| 242 | while (count--) { |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 243 | ret = sdcard_waitw(&drive->regs->irq_status, cbit); |
| 244 | if (ret < 0) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 245 | return ret; |
| 246 | writew(&drive->regs->irq_status, cbit); |
| 247 | int i; |
| 248 | for (i=0; i<DISK_SECTOR_SIZE/4; i++) { |
| 249 | if (isread) |
| 250 | *(u32*)data = readl(&drive->regs->data); |
| 251 | else |
| 252 | writel(&drive->regs->data, *(u32*)data); |
| 253 | data += 4; |
| 254 | } |
| 255 | } |
| 256 | // Complete command |
Kevin O'Connor | 33e205e | 2015-08-11 13:03:22 -0400 | [diff] [blame] | 257 | ret = sdcard_waitw(&drive->regs->irq_status, SI_TRANS_DONE); |
| 258 | if (ret < 0) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 259 | return ret; |
| 260 | writew(&drive->regs->irq_status, SI_TRANS_DONE); |
| 261 | return 0; |
| 262 | } |
| 263 | |
| 264 | // Read/write a block of data to/from the card. |
| 265 | static int |
| 266 | sdcard_readwrite(struct disk_op_s *op, int iswrite) |
| 267 | { |
| 268 | struct sddrive_s *drive = container_of( |
Kevin O'Connor | e5a0b61 | 2017-07-11 12:24:50 -0400 | [diff] [blame] | 269 | op->drive_fl, struct sddrive_s, drive); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 270 | int cmd = iswrite ? SC_WRITE_SINGLE : SC_READ_SINGLE; |
| 271 | if (op->count > 1) |
| 272 | cmd = iswrite ? SC_WRITE_MULTIPLE : SC_READ_MULTIPLE; |
| 273 | int ret = sdcard_pio_transfer(drive, cmd, op->lba, op->buf_fl, op->count); |
| 274 | if (ret) |
| 275 | return DISK_RET_EBADTRACK; |
| 276 | return DISK_RET_SUCCESS; |
| 277 | } |
| 278 | |
Kevin O'Connor | c7fa789 | 2015-07-07 08:35:51 -0400 | [diff] [blame] | 279 | int |
Kevin O'Connor | 1785645 | 2015-07-07 14:56:20 -0400 | [diff] [blame] | 280 | sdcard_process_op(struct disk_op_s *op) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 281 | { |
| 282 | if (!CONFIG_SDCARD) |
| 283 | return 0; |
| 284 | switch (op->command) { |
| 285 | case CMD_READ: |
| 286 | return sdcard_readwrite(op, 0); |
| 287 | case CMD_WRITE: |
| 288 | return sdcard_readwrite(op, 1); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 289 | default: |
Kevin O'Connor | 85c72c6 | 2015-07-07 09:01:52 -0400 | [diff] [blame] | 290 | return default_process_op(op); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 291 | } |
| 292 | } |
| 293 | |
| 294 | |
| 295 | /**************************************************************** |
| 296 | * Setup |
| 297 | ****************************************************************/ |
| 298 | |
Kevin O'Connor | 91a9f5b | 2015-08-18 11:22:25 -0400 | [diff] [blame] | 299 | static int |
| 300 | sdcard_set_power(struct sdhci_s *regs) |
| 301 | { |
| 302 | u32 cap = readl(®s->cap_lo); |
| 303 | u32 volt, vbits; |
| 304 | if (cap & SD_CAPLO_V33) { |
| 305 | volt = 1<<20; |
| 306 | vbits = SPC_V33; |
| 307 | } else if (cap & SD_CAPLO_V30) { |
| 308 | volt = 1<<18; |
| 309 | vbits = SPC_V30; |
| 310 | } else if (cap & SD_CAPLO_V18) { |
| 311 | volt = 1<<7; |
| 312 | vbits = SPC_V18; |
| 313 | } else { |
| 314 | dprintf(1, "SD controller unsupported volt range (%x)\n", cap); |
| 315 | return -1; |
| 316 | } |
| 317 | writeb(®s->power_control, 0); |
| 318 | msleep(SDHCI_POWER_OFF_TIME); |
| 319 | writeb(®s->power_control, vbits | SPC_POWER_ON); |
| 320 | msleep(SDHCI_POWER_ON_TIME); |
| 321 | return volt; |
| 322 | } |
| 323 | |
| 324 | static int |
| 325 | sdcard_set_frequency(struct sdhci_s *regs, u32 khz) |
| 326 | { |
| 327 | u16 ver = readw(®s->controller_version); |
| 328 | u32 cap = readl(®s->cap_lo); |
| 329 | u32 base_freq = (cap >> SD_CAPLO_BASECLOCK_SHIFT) & SD_CAPLO_BASECLOCK_MASK; |
| 330 | if (!base_freq) { |
| 331 | dprintf(1, "Unknown base frequency for SD controller\n"); |
| 332 | return -1; |
| 333 | } |
| 334 | // Set new frequency |
| 335 | u32 divisor = DIV_ROUND_UP(base_freq * 1000, khz); |
| 336 | u16 creg; |
| 337 | if ((ver & 0xff) <= 0x01) { |
| 338 | divisor = divisor > 1 ? 1 << __fls(divisor-1) : 0; |
| 339 | creg = (divisor & SCC_SDCLK_MASK) << SCC_SDCLK_SHIFT; |
| 340 | } else { |
| 341 | divisor = DIV_ROUND_UP(divisor, 2); |
| 342 | creg = (divisor & SCC_SDCLK_MASK) << SCC_SDCLK_SHIFT; |
| 343 | creg |= (divisor & SCC_SDCLK_HI_MASK) >> SCC_SDCLK_HI_RSHIFT; |
| 344 | } |
| 345 | dprintf(3, "sdcard_set_frequency %d %d %x\n", base_freq, khz, creg); |
| 346 | writew(®s->clock_control, 0); |
| 347 | writew(®s->clock_control, creg | SCC_INTERNAL_ENABLE); |
| 348 | // Wait for frequency to become active |
| 349 | int ret = sdcard_waitw(®s->clock_control, SCC_STABLE); |
| 350 | if (ret < 0) |
| 351 | return ret; |
| 352 | // Enable SD clock |
| 353 | writew(®s->clock_control, creg | SCC_INTERNAL_ENABLE | SCC_CLOCK_ENABLE); |
| 354 | return 0; |
| 355 | } |
| 356 | |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 357 | // Obtain the disk size of an SD card |
| 358 | static int |
| 359 | sdcard_get_capacity(struct sddrive_s *drive, u8 *csd) |
| 360 | { |
| 361 | // Original MMC/SD card capacity formula |
| 362 | u16 C_SIZE = (csd[6] >> 6) | (csd[7] << 2) | ((csd[8] & 0x03) << 10); |
| 363 | u8 C_SIZE_MULT = (csd[4] >> 7) | ((csd[5] & 0x03) << 1); |
| 364 | u8 READ_BL_LEN = csd[9] & 0x0f; |
| 365 | u32 count = (C_SIZE+1) << (C_SIZE_MULT + 2 + READ_BL_LEN - 9); |
| 366 | // Check for newer encoding formats. |
| 367 | u8 CSD_STRUCTURE = csd[14] >> 6; |
| 368 | if ((drive->card_type & SF_MMC) && CSD_STRUCTURE >= 2) { |
| 369 | // Get capacity from EXT_CSD register |
| 370 | u8 ext_csd[512]; |
| 371 | int ret = sdcard_pio_transfer(drive, SC_SEND_EXT_CSD, 0, ext_csd, 1); |
| 372 | if (ret) |
| 373 | return ret; |
| 374 | count = *(u32*)&ext_csd[212]; |
| 375 | } else if (!(drive->card_type & SF_MMC) && CSD_STRUCTURE >= 1) { |
| 376 | // High capacity SD card |
| 377 | u32 C_SIZE2 = csd[5] | (csd[6] << 8) | ((csd[7] & 0x3f) << 16); |
| 378 | count = (C_SIZE2+1) << (19-9); |
| 379 | } |
| 380 | // Fill drive struct and return |
| 381 | drive->drive.blksize = DISK_SECTOR_SIZE; |
| 382 | drive->drive.sectors = count; |
| 383 | return 0; |
| 384 | } |
| 385 | |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 386 | // Initialize an SD card |
| 387 | static int |
Kevin O'Connor | ebe40ba | 2015-08-18 11:44:46 -0400 | [diff] [blame] | 388 | sdcard_card_setup(struct sddrive_s *drive, int volt, int prio) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 389 | { |
Kevin O'Connor | ebe40ba | 2015-08-18 11:44:46 -0400 | [diff] [blame] | 390 | struct sdhci_s *regs = drive->regs; |
Kevin O'Connor | 17b811b | 2015-08-18 11:33:41 -0400 | [diff] [blame] | 391 | // Set controller to initialization clock rate |
| 392 | int ret = sdcard_set_frequency(regs, 400); |
| 393 | if (ret) |
| 394 | return ret; |
| 395 | msleep(SDHCI_CLOCK_ON_TIME); |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 396 | // Reset card |
| 397 | u32 param[4] = { }; |
Kevin O'Connor | 17b811b | 2015-08-18 11:33:41 -0400 | [diff] [blame] | 398 | ret = sdcard_pio(regs, SC_GO_IDLE_STATE, param); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 399 | if (ret) |
| 400 | return ret; |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 401 | // Let card know SDHC/SDXC is supported and confirm voltage |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 402 | u32 hcs = 0, vrange = (volt >= (1<<15) ? 0x100 : 0x200) | 0xaa; |
Kevin O'Connor | 4b99922 | 2015-08-11 11:47:57 -0400 | [diff] [blame] | 403 | param[0] = vrange; |
Kevin O'Connor | 12441a8 | 2015-08-10 19:11:15 -0400 | [diff] [blame] | 404 | ret = sdcard_pio(regs, SC_SEND_IF_COND, param); |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 405 | if (!ret && param[0] == vrange) |
| 406 | hcs = (1<<30); |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 407 | // Verify SD card (instead of MMC or SDIO) |
| 408 | param[0] = 0x00; |
| 409 | ret = sdcard_pio_app(regs, SC_APP_SEND_OP_COND, param); |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 410 | if (ret) { |
| 411 | // Check for MMC card |
| 412 | param[0] = 0x00; |
| 413 | ret = sdcard_pio(regs, SC_SEND_OP_COND, param); |
| 414 | if (ret) |
| 415 | return ret; |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 416 | drive->card_type |= SF_MMC; |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 417 | hcs = (1<<30); |
| 418 | } |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 419 | // Init card |
| 420 | u32 end = timer_calc(SDHCI_POWERUP_TIMEOUT); |
| 421 | for (;;) { |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 422 | param[0] = hcs | volt; // high-capacity support and voltage level |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 423 | if (drive->card_type & SF_MMC) |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 424 | ret = sdcard_pio(regs, SC_SEND_OP_COND, param); |
| 425 | else |
| 426 | ret = sdcard_pio_app(regs, SC_APP_SEND_OP_COND, param); |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 427 | if (ret) |
| 428 | return ret; |
| 429 | if (param[0] & SR_OCR_NOTBUSY) |
| 430 | break; |
| 431 | if (timer_check(end)) { |
| 432 | warn_timeout(); |
| 433 | return -1; |
| 434 | } |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 435 | msleep(5); // Avoid flooding log when debugging |
Kevin O'Connor | 43312af | 2015-07-30 10:56:00 -0400 | [diff] [blame] | 436 | } |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 437 | drive->card_type |= (param[0] & SR_OCR_CCS) ? SF_HIGHCAPACITY : 0; |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 438 | // Select card (get cid, set rca, get csd, select card) |
Kevin O'Connor | d501de1 | 2015-08-11 13:29:55 -0400 | [diff] [blame] | 439 | param[0] = 0x00; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 440 | ret = sdcard_pio(regs, SC_ALL_SEND_CID, param); |
| 441 | if (ret) |
| 442 | return ret; |
Kevin O'Connor | 39a8ea5 | 2015-08-18 12:43:04 -0400 | [diff] [blame] | 443 | u8 cid[16]; |
| 444 | memcpy(cid, param, sizeof(cid)); |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 445 | param[0] = drive->card_type & SF_MMC ? 0x0001 << 16 : 0x00; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 446 | ret = sdcard_pio(regs, SC_SEND_RELATIVE_ADDR, param); |
| 447 | if (ret) |
| 448 | return ret; |
Kevin O'Connor | 065b341 | 2015-08-24 12:36:56 -0400 | [diff] [blame] | 449 | u16 rca = drive->card_type & SF_MMC ? 0x0001 : param[0] >> 16; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 450 | param[0] = rca << 16; |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 451 | ret = sdcard_pio(regs, SC_SEND_CSD, param); |
| 452 | if (ret) |
| 453 | return ret; |
| 454 | u8 csd[16]; |
| 455 | memcpy(csd, param, sizeof(csd)); |
| 456 | param[0] = rca << 16; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 457 | ret = sdcard_pio(regs, SC_SELECT_DESELECT_CARD, param); |
| 458 | if (ret) |
| 459 | return ret; |
Kevin O'Connor | 17b811b | 2015-08-18 11:33:41 -0400 | [diff] [blame] | 460 | // Set controller to data transfer clock rate |
| 461 | ret = sdcard_set_frequency(regs, 25000); |
| 462 | if (ret) |
| 463 | return ret; |
Kevin O'Connor | ebe40ba | 2015-08-18 11:44:46 -0400 | [diff] [blame] | 464 | // Register drive |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 465 | ret = sdcard_get_capacity(drive, csd); |
| 466 | if (ret) |
| 467 | return ret; |
Kevin O'Connor | 39a8ea5 | 2015-08-18 12:43:04 -0400 | [diff] [blame] | 468 | char pnm[7] = {}; |
| 469 | int i; |
| 470 | for (i=0; i < (drive->card_type & SF_MMC ? 6 : 5); i++) |
| 471 | pnm[i] = cid[11-i]; |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 472 | char *desc = znprintf(MAXDESCSIZE, "%s %s %dMiB" |
Kevin O'Connor | 39a8ea5 | 2015-08-18 12:43:04 -0400 | [diff] [blame] | 473 | , drive->card_type & SF_MMC ? "MMC drive" : "SD card" |
Kevin O'Connor | e344da4 | 2015-08-24 13:48:54 -0400 | [diff] [blame] | 474 | , pnm, (u32)(drive->drive.sectors >> 11)); |
Kevin O'Connor | 39a8ea5 | 2015-08-18 12:43:04 -0400 | [diff] [blame] | 475 | dprintf(1, "Found sdcard at %p: %s\n", regs, desc); |
Kevin O'Connor | ebe40ba | 2015-08-18 11:44:46 -0400 | [diff] [blame] | 476 | boot_add_hd(&drive->drive, desc, prio); |
| 477 | return 0; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 478 | } |
| 479 | |
| 480 | // Setup and configure an SD card controller |
| 481 | static void |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 482 | sdcard_controller_setup(struct sdhci_s *regs, int prio) |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 483 | { |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 484 | // Initialize controller |
Kevin O'Connor | 11198db | 2015-07-28 13:06:41 -0400 | [diff] [blame] | 485 | u32 present_state = readl(®s->present_state); |
| 486 | if (!(present_state & SP_CARD_INSERTED)) |
| 487 | // No card present |
| 488 | return; |
Kevin O'Connor | d5b7821 | 2015-08-11 09:34:19 -0400 | [diff] [blame] | 489 | dprintf(3, "sdhci@%p ver=%x cap=%x %x\n", regs |
| 490 | , readw(®s->controller_version) |
| 491 | , readl(®s->cap_lo), readl(®s->cap_hi)); |
Kevin O'Connor | 9b73aa6 | 2015-08-12 12:02:16 -0400 | [diff] [blame] | 492 | sdcard_reset(regs, SRF_ALL); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 493 | writew(®s->irq_signal, 0); |
Kevin O'Connor | bf8f266 | 2015-08-12 12:07:17 -0400 | [diff] [blame] | 494 | writew(®s->irq_enable, 0x01ff); |
| 495 | writew(®s->irq_status, readw(®s->irq_status)); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 496 | writew(®s->error_signal, 0); |
Kevin O'Connor | 460e9aa | 2015-11-17 14:52:23 -0500 | [diff] [blame] | 497 | writew(®s->error_irq_enable, 0x01ff); |
Kevin O'Connor | bf8f266 | 2015-08-12 12:07:17 -0400 | [diff] [blame] | 498 | writew(®s->error_irq_status, readw(®s->error_irq_status)); |
Kevin O'Connor | 9637a67 | 2015-07-28 14:15:37 -0400 | [diff] [blame] | 499 | writeb(®s->timeout_control, 0x0e); // Set to max timeout |
Kevin O'Connor | 4b99922 | 2015-08-11 11:47:57 -0400 | [diff] [blame] | 500 | int volt = sdcard_set_power(regs); |
| 501 | if (volt < 0) |
| 502 | return; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 503 | |
| 504 | // Initialize card |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 505 | struct sddrive_s *drive = malloc_fseg(sizeof(*drive)); |
| 506 | if (!drive) { |
| 507 | warn_noalloc(); |
Kevin O'Connor | 263fb19 | 2015-08-11 11:59:34 -0400 | [diff] [blame] | 508 | goto fail; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 509 | } |
| 510 | memset(drive, 0, sizeof(*drive)); |
| 511 | drive->drive.type = DTYPE_SDCARD; |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 512 | drive->regs = regs; |
Kevin O'Connor | ebe40ba | 2015-08-18 11:44:46 -0400 | [diff] [blame] | 513 | int ret = sdcard_card_setup(drive, volt, prio); |
| 514 | if (ret) { |
| 515 | free(drive); |
| 516 | goto fail; |
| 517 | } |
Kevin O'Connor | 263fb19 | 2015-08-11 11:59:34 -0400 | [diff] [blame] | 518 | return; |
| 519 | fail: |
| 520 | writeb(®s->power_control, 0); |
| 521 | writew(®s->clock_control, 0); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 522 | } |
| 523 | |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 524 | static void |
| 525 | sdcard_pci_setup(void *data) |
| 526 | { |
| 527 | struct pci_device *pci = data; |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 528 | // XXX - bars dependent on slot index register in pci config space |
Kevin O'Connor | 46561b0 | 2016-02-02 22:23:55 -0500 | [diff] [blame] | 529 | struct sdhci_s *regs = pci_enable_membar(pci, PCI_BASE_ADDRESS_0); |
| 530 | if (!regs) |
| 531 | return; |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 532 | int prio = bootprio_find_pci_device(pci); |
Kevin O'Connor | 46561b0 | 2016-02-02 22:23:55 -0500 | [diff] [blame] | 533 | sdcard_controller_setup(regs, prio); |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 534 | } |
| 535 | |
| 536 | static void |
| 537 | sdcard_romfile_setup(void *data) |
| 538 | { |
| 539 | struct romfile_s *file = data; |
| 540 | int prio = bootprio_find_named_rom(file->name, 0); |
| 541 | u32 addr = romfile_loadint(file->name, 0); |
| 542 | dprintf(1, "Starting sdcard controller check at addr %x\n", addr); |
| 543 | sdcard_controller_setup((void*)addr, prio); |
| 544 | } |
| 545 | |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 546 | void |
| 547 | sdcard_setup(void) |
| 548 | { |
| 549 | if (!CONFIG_SDCARD) |
| 550 | return; |
| 551 | |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 552 | struct romfile_s *file = NULL; |
Matt DeVillier | fc08789 | 2016-03-16 20:37:35 -0500 | [diff] [blame] | 553 | int num_romfiles = 0; |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 554 | for (;;) { |
| 555 | file = romfile_findprefix("etc/sdcard", file); |
| 556 | if (!file) |
| 557 | break; |
| 558 | run_thread(sdcard_romfile_setup, file); |
Matt DeVillier | fc08789 | 2016-03-16 20:37:35 -0500 | [diff] [blame] | 559 | num_romfiles++; |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 560 | } |
Matt DeVillier | fc08789 | 2016-03-16 20:37:35 -0500 | [diff] [blame] | 561 | if (num_romfiles) |
| 562 | // only scan for PCI controllers if etc/sdcard not used |
| 563 | return; |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 564 | |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 565 | struct pci_device *pci; |
| 566 | foreachpci(pci) { |
| 567 | if (pci->class != PCI_CLASS_SYSTEM_SDHCI || pci->prog_if >= 2) |
| 568 | // Not an SDHCI controller following SDHCI spec |
| 569 | continue; |
Kevin O'Connor | 9f7b236 | 2015-08-10 12:51:41 -0400 | [diff] [blame] | 570 | run_thread(sdcard_pci_setup, pci); |
Kevin O'Connor | 72691a5 | 2014-12-16 09:55:16 -0500 | [diff] [blame] | 571 | } |
| 572 | } |