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Kevin O'Connor72691a52014-12-16 09:55:16 -05001// PCI SD Host Controller Interface
2//
3// Copyright (C) 2014 Kevin O'Connor <kevin@koconnor.net>
4//
5// This file may be distributed under the terms of the GNU LGPLv3 license.
6
7#include "block.h" // struct drive_s
Kevin O'Connor72691a52014-12-16 09:55:16 -05008#include "malloc.h" // malloc_fseg
9#include "output.h" // znprintf
10#include "pci.h" // pci_config_readl
11#include "pci_ids.h" // PCI_CLASS_SYSTEM_SDHCI
12#include "pci_regs.h" // PCI_BASE_ADDRESS_0
Kevin O'Connor9f7b2362015-08-10 12:51:41 -040013#include "romfile.h" // romfile_findprefix
Kevin O'Connor72691a52014-12-16 09:55:16 -050014#include "stacks.h" // wait_preempt
15#include "std/disk.h" // DISK_RET_SUCCESS
16#include "string.h" // memset
17#include "util.h" // boot_add_hd
18#include "x86.h" // writel
19
20// SDHCI MMIO registers
21struct sdhci_s {
22 u32 sdma_addr;
23 u16 block_size;
24 u16 block_count;
25 u32 arg;
26 u16 transfer_mode;
27 u16 cmd;
28 u32 response[4];
29 u32 data;
30 u32 present_state;
31 u8 host_control;
32 u8 power_control;
33 u8 block_gap_control;
34 u8 wakeup_control;
35 u16 clock_control;
36 u8 timeout_control;
37 u8 software_reset;
38 u16 irq_status;
39 u16 error_irq_status;
40 u16 irq_enable;
41 u16 error_irq_enable;
42 u16 irq_signal;
43 u16 error_signal;
44 u16 auto_cmd12;
Kevin O'Connord5b78212015-08-11 09:34:19 -040045 u16 host_control2;
Kevin O'Connor67bb4552015-07-28 13:40:04 -040046 u32 cap_lo, cap_hi;
Kevin O'Connor72691a52014-12-16 09:55:16 -050047 u64 max_current;
48 u16 force_auto_cmd12;
49 u16 force_error;
50 u8 adma_error;
51 u8 pad_55[3];
52 u64 adma_addr;
53 u8 pad_60[156];
54 u16 slot_irq;
55 u16 controller_version;
56} PACKED;
57
58// SDHCI commands
Kevin O'Connorcfe326b2015-08-10 23:40:50 -040059#define SCB_R0 0x00 // No response
60#define SCB_R48 0x1a // Response R1 (no data), R5, R6, R7
61#define SCB_R48d 0x3a // Response R1 (with data)
62#define SCB_R48b 0x1b // Response R1b, R5b
63#define SCB_R48o 0x02 // Response R3, R4
64#define SCB_R136 0x09 // Response R2
65#define SC_GO_IDLE_STATE ((0<<8) | SCB_R0)
Kevin O'Connord501de12015-08-11 13:29:55 -040066#define SC_SEND_OP_COND ((1<<8) | SCB_R48o)
Kevin O'Connorcfe326b2015-08-10 23:40:50 -040067#define SC_ALL_SEND_CID ((2<<8) | SCB_R136)
68#define SC_SEND_RELATIVE_ADDR ((3<<8) | SCB_R48)
69#define SC_SELECT_DESELECT_CARD ((7<<8) | SCB_R48b)
70#define SC_SEND_IF_COND ((8<<8) | SCB_R48)
Kevin O'Connore344da42015-08-24 13:48:54 -040071#define SC_SEND_EXT_CSD ((8<<8) | SCB_R48d)
72#define SC_SEND_CSD ((9<<8) | SCB_R136)
Kevin O'Connorcfe326b2015-08-10 23:40:50 -040073#define SC_READ_SINGLE ((17<<8) | SCB_R48d)
74#define SC_READ_MULTIPLE ((18<<8) | SCB_R48d)
75#define SC_WRITE_SINGLE ((24<<8) | SCB_R48d)
76#define SC_WRITE_MULTIPLE ((25<<8) | SCB_R48d)
77#define SC_APP_CMD ((55<<8) | SCB_R48)
78#define SC_APP_SEND_OP_COND ((41<<8) | SCB_R48o)
Kevin O'Connor72691a52014-12-16 09:55:16 -050079
80// SDHCI irqs
81#define SI_CMD_COMPLETE (1<<0)
82#define SI_TRANS_DONE (1<<1)
83#define SI_WRITE_READY (1<<4)
84#define SI_READ_READY (1<<5)
Kevin O'Connorbf8f2662015-08-12 12:07:17 -040085#define SI_ERROR (1<<15)
Kevin O'Connor72691a52014-12-16 09:55:16 -050086
87// SDHCI present_state flags
Kevin O'Connor11198db2015-07-28 13:06:41 -040088#define SP_CMD_INHIBIT (1<<0)
89#define SP_DAT_INHIBIT (1<<1)
90#define SP_CARD_INSERTED (1<<16)
Kevin O'Connor72691a52014-12-16 09:55:16 -050091
92// SDHCI transfer_mode flags
93#define ST_BLOCKCOUNT (1<<1)
94#define ST_AUTO_CMD12 (1<<2)
95#define ST_READ (1<<4)
96#define ST_MULTIPLE (1<<5)
97
Kevin O'Connor67bb4552015-07-28 13:40:04 -040098// SDHCI capabilities flags
Kevin O'Connor86efbb62015-08-04 09:48:30 -040099#define SD_CAPLO_V33 (1<<24)
Kevin O'Connorad0c9ea2015-08-11 11:56:51 -0400100#define SD_CAPLO_V30 (1<<25)
101#define SD_CAPLO_V18 (1<<26)
Kevin O'Connor67bb4552015-07-28 13:40:04 -0400102#define SD_CAPLO_BASECLOCK_SHIFT 8
Kevin O'Connord5b78212015-08-11 09:34:19 -0400103#define SD_CAPLO_BASECLOCK_MASK 0xff
Kevin O'Connor67bb4552015-07-28 13:40:04 -0400104
105// SDHCI clock control flags
106#define SCC_INTERNAL_ENABLE (1<<0)
107#define SCC_STABLE (1<<1)
108#define SCC_CLOCK_ENABLE (1<<2)
Kevin O'Connord5b78212015-08-11 09:34:19 -0400109#define SCC_SDCLK_MASK 0xff
Kevin O'Connor67bb4552015-07-28 13:40:04 -0400110#define SCC_SDCLK_SHIFT 8
Kevin O'Connord5b78212015-08-11 09:34:19 -0400111#define SCC_SDCLK_HI_MASK 0x300
112#define SCC_SDCLK_HI_RSHIFT 2
Kevin O'Connor67bb4552015-07-28 13:40:04 -0400113
Kevin O'Connor86efbb62015-08-04 09:48:30 -0400114// SDHCI power control flags
115#define SPC_POWER_ON (1<<0)
Kevin O'Connorad0c9ea2015-08-11 11:56:51 -0400116#define SPC_V18 0x0a
117#define SPC_V30 0x0c
Kevin O'Connor86efbb62015-08-04 09:48:30 -0400118#define SPC_V33 0x0e
119
Kevin O'Connor9b73aa62015-08-12 12:02:16 -0400120// SDHCI software reset flags
121#define SRF_ALL 0x01
122#define SRF_CMD 0x02
123#define SRF_DATA 0x04
124
Kevin O'Connor72691a52014-12-16 09:55:16 -0500125// SDHCI result flags
Kevin O'Connor43312af2015-07-30 10:56:00 -0400126#define SR_OCR_CCS (1<<30)
127#define SR_OCR_NOTBUSY (1<<31)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500128
129// SDHCI timeouts
Kevin O'Connor4c6de9e2015-08-04 10:01:02 -0400130#define SDHCI_POWER_OFF_TIME 1
131#define SDHCI_POWER_ON_TIME 1
132#define SDHCI_CLOCK_ON_TIME 1 // 74 clock cycles
Kevin O'Connor43312af2015-07-30 10:56:00 -0400133#define SDHCI_POWERUP_TIMEOUT 1000
Kevin O'Connor18254b32015-08-12 12:58:23 -0400134#define SDHCI_PIO_TIMEOUT 1000 // XXX - this is just made up
Kevin O'Connor72691a52014-12-16 09:55:16 -0500135
136// Internal 'struct drive_s' storage for a detected card
137struct sddrive_s {
138 struct drive_s drive;
139 struct sdhci_s *regs;
140 int card_type;
141};
142
143// SD card types
Kevin O'Connor065b3412015-08-24 12:36:56 -0400144#define SF_MMC (1<<0)
145#define SF_HIGHCAPACITY (1<<1)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500146
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400147// Repeatedly read a u16 register until any bit in a given mask is set
Kevin O'Connor72691a52014-12-16 09:55:16 -0500148static int
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400149sdcard_waitw(u16 *reg, u16 mask)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500150{
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400151 u32 end = timer_calc(SDHCI_PIO_TIMEOUT);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500152 for (;;) {
153 u16 v = readw(reg);
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400154 if (v & mask)
155 return v;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500156 if (timer_check(end)) {
Kevin O'Connorfc0ac952015-11-17 14:56:04 -0500157 dprintf(1, "scard_waitw: %p %x %x\n", reg, mask, v);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500158 warn_timeout();
159 return -1;
160 }
161 yield();
162 }
163}
164
Kevin O'Connor9b73aa62015-08-12 12:02:16 -0400165// Send an sdhci reset
166static int
167sdcard_reset(struct sdhci_s *regs, int flags)
168{
169 writeb(&regs->software_reset, flags);
170 u32 end = timer_calc(SDHCI_PIO_TIMEOUT);
171 while (readb(&regs->software_reset))
172 if (timer_check(end)) {
173 warn_timeout();
174 return -1;
175 }
176 return 0;
177}
178
Kevin O'Connor72691a52014-12-16 09:55:16 -0500179// Send a command to the card.
180static int
181sdcard_pio(struct sdhci_s *regs, int cmd, u32 *param)
182{
Kevin O'Connor34cc2fd2015-08-11 12:59:53 -0400183 u32 state = readl(&regs->present_state);
184 dprintf(9, "sdcard_pio cmd %x %x %x\n", cmd, *param, state);
185 if ((state & SP_CMD_INHIBIT)
186 || ((cmd & 0x03) == 0x03 && state & SP_DAT_INHIBIT)) {
187 dprintf(1, "sdcard_pio not ready %x\n", state);
188 return -1;
189 }
Kevin O'Connor72691a52014-12-16 09:55:16 -0500190 // Send command
191 writel(&regs->arg, *param);
192 writew(&regs->cmd, cmd);
Kevin O'Connorbf8f2662015-08-12 12:07:17 -0400193 int ret = sdcard_waitw(&regs->irq_status, SI_ERROR|SI_CMD_COMPLETE);
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400194 if (ret < 0)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500195 return ret;
Kevin O'Connorbf8f2662015-08-12 12:07:17 -0400196 if (ret & SI_ERROR) {
197 u16 err = readw(&regs->error_irq_status);
198 dprintf(3, "sdcard_pio command stop (code=%x)\n", err);
199 sdcard_reset(regs, SRF_CMD|SRF_DATA);
200 writew(&regs->error_irq_status, err);
201 return -1;
202 }
Kevin O'Connor72691a52014-12-16 09:55:16 -0500203 writew(&regs->irq_status, SI_CMD_COMPLETE);
204 // Read response
205 memcpy(param, regs->response, sizeof(regs->response));
Kevin O'Connor43312af2015-07-30 10:56:00 -0400206 dprintf(9, "sdcard cmd %x response %x %x %x %x\n"
207 , cmd, param[0], param[1], param[2], param[3]);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500208 return 0;
209}
210
211// Send an "app specific" command to the card.
212static int
213sdcard_pio_app(struct sdhci_s *regs, int cmd, u32 *param)
214{
215 u32 aparam[4] = {};
216 int ret = sdcard_pio(regs, SC_APP_CMD, aparam);
217 if (ret)
218 return ret;
219 return sdcard_pio(regs, cmd, param);
220}
221
222// Send a command to the card which transfers data.
223static int
224sdcard_pio_transfer(struct sddrive_s *drive, int cmd, u32 addr
225 , void *data, int count)
226{
227 // Send command
Kevin O'Connor8f7dc5a2015-11-17 14:54:11 -0500228 writew(&drive->regs->block_size, DISK_SECTOR_SIZE);
Kevin O'Connor18254b32015-08-12 12:58:23 -0400229 writew(&drive->regs->block_count, count);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500230 int isread = cmd != SC_WRITE_SINGLE && cmd != SC_WRITE_MULTIPLE;
231 u16 tmode = ((count > 1 ? ST_MULTIPLE|ST_AUTO_CMD12|ST_BLOCKCOUNT : 0)
232 | (isread ? ST_READ : 0));
233 writew(&drive->regs->transfer_mode, tmode);
Kevin O'Connor065b3412015-08-24 12:36:56 -0400234 if (!(drive->card_type & SF_HIGHCAPACITY))
Kevin O'Connor72691a52014-12-16 09:55:16 -0500235 addr *= DISK_SECTOR_SIZE;
236 u32 param[4] = { addr };
237 int ret = sdcard_pio(drive->regs, cmd, param);
238 if (ret)
239 return ret;
240 // Read/write data
Kevin O'Connor72691a52014-12-16 09:55:16 -0500241 u16 cbit = isread ? SI_READ_READY : SI_WRITE_READY;
242 while (count--) {
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400243 ret = sdcard_waitw(&drive->regs->irq_status, cbit);
244 if (ret < 0)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500245 return ret;
246 writew(&drive->regs->irq_status, cbit);
247 int i;
248 for (i=0; i<DISK_SECTOR_SIZE/4; i++) {
249 if (isread)
250 *(u32*)data = readl(&drive->regs->data);
251 else
252 writel(&drive->regs->data, *(u32*)data);
253 data += 4;
254 }
255 }
256 // Complete command
Kevin O'Connor33e205e2015-08-11 13:03:22 -0400257 ret = sdcard_waitw(&drive->regs->irq_status, SI_TRANS_DONE);
258 if (ret < 0)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500259 return ret;
260 writew(&drive->regs->irq_status, SI_TRANS_DONE);
261 return 0;
262}
263
264// Read/write a block of data to/from the card.
265static int
266sdcard_readwrite(struct disk_op_s *op, int iswrite)
267{
268 struct sddrive_s *drive = container_of(
269 op->drive_gf, struct sddrive_s, drive);
270 int cmd = iswrite ? SC_WRITE_SINGLE : SC_READ_SINGLE;
271 if (op->count > 1)
272 cmd = iswrite ? SC_WRITE_MULTIPLE : SC_READ_MULTIPLE;
273 int ret = sdcard_pio_transfer(drive, cmd, op->lba, op->buf_fl, op->count);
274 if (ret)
275 return DISK_RET_EBADTRACK;
276 return DISK_RET_SUCCESS;
277}
278
Kevin O'Connorc7fa7892015-07-07 08:35:51 -0400279int
Kevin O'Connor17856452015-07-07 14:56:20 -0400280sdcard_process_op(struct disk_op_s *op)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500281{
282 if (!CONFIG_SDCARD)
283 return 0;
284 switch (op->command) {
285 case CMD_READ:
286 return sdcard_readwrite(op, 0);
287 case CMD_WRITE:
288 return sdcard_readwrite(op, 1);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500289 default:
Kevin O'Connor85c72c62015-07-07 09:01:52 -0400290 return default_process_op(op);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500291 }
292}
293
294
295/****************************************************************
296 * Setup
297 ****************************************************************/
298
Kevin O'Connor91a9f5b2015-08-18 11:22:25 -0400299static int
300sdcard_set_power(struct sdhci_s *regs)
301{
302 u32 cap = readl(&regs->cap_lo);
303 u32 volt, vbits;
304 if (cap & SD_CAPLO_V33) {
305 volt = 1<<20;
306 vbits = SPC_V33;
307 } else if (cap & SD_CAPLO_V30) {
308 volt = 1<<18;
309 vbits = SPC_V30;
310 } else if (cap & SD_CAPLO_V18) {
311 volt = 1<<7;
312 vbits = SPC_V18;
313 } else {
314 dprintf(1, "SD controller unsupported volt range (%x)\n", cap);
315 return -1;
316 }
317 writeb(&regs->power_control, 0);
318 msleep(SDHCI_POWER_OFF_TIME);
319 writeb(&regs->power_control, vbits | SPC_POWER_ON);
320 msleep(SDHCI_POWER_ON_TIME);
321 return volt;
322}
323
324static int
325sdcard_set_frequency(struct sdhci_s *regs, u32 khz)
326{
327 u16 ver = readw(&regs->controller_version);
328 u32 cap = readl(&regs->cap_lo);
329 u32 base_freq = (cap >> SD_CAPLO_BASECLOCK_SHIFT) & SD_CAPLO_BASECLOCK_MASK;
330 if (!base_freq) {
331 dprintf(1, "Unknown base frequency for SD controller\n");
332 return -1;
333 }
334 // Set new frequency
335 u32 divisor = DIV_ROUND_UP(base_freq * 1000, khz);
336 u16 creg;
337 if ((ver & 0xff) <= 0x01) {
338 divisor = divisor > 1 ? 1 << __fls(divisor-1) : 0;
339 creg = (divisor & SCC_SDCLK_MASK) << SCC_SDCLK_SHIFT;
340 } else {
341 divisor = DIV_ROUND_UP(divisor, 2);
342 creg = (divisor & SCC_SDCLK_MASK) << SCC_SDCLK_SHIFT;
343 creg |= (divisor & SCC_SDCLK_HI_MASK) >> SCC_SDCLK_HI_RSHIFT;
344 }
345 dprintf(3, "sdcard_set_frequency %d %d %x\n", base_freq, khz, creg);
346 writew(&regs->clock_control, 0);
347 writew(&regs->clock_control, creg | SCC_INTERNAL_ENABLE);
348 // Wait for frequency to become active
349 int ret = sdcard_waitw(&regs->clock_control, SCC_STABLE);
350 if (ret < 0)
351 return ret;
352 // Enable SD clock
353 writew(&regs->clock_control, creg | SCC_INTERNAL_ENABLE | SCC_CLOCK_ENABLE);
354 return 0;
355}
356
Kevin O'Connore344da42015-08-24 13:48:54 -0400357// Obtain the disk size of an SD card
358static int
359sdcard_get_capacity(struct sddrive_s *drive, u8 *csd)
360{
361 // Original MMC/SD card capacity formula
362 u16 C_SIZE = (csd[6] >> 6) | (csd[7] << 2) | ((csd[8] & 0x03) << 10);
363 u8 C_SIZE_MULT = (csd[4] >> 7) | ((csd[5] & 0x03) << 1);
364 u8 READ_BL_LEN = csd[9] & 0x0f;
365 u32 count = (C_SIZE+1) << (C_SIZE_MULT + 2 + READ_BL_LEN - 9);
366 // Check for newer encoding formats.
367 u8 CSD_STRUCTURE = csd[14] >> 6;
368 if ((drive->card_type & SF_MMC) && CSD_STRUCTURE >= 2) {
369 // Get capacity from EXT_CSD register
370 u8 ext_csd[512];
371 int ret = sdcard_pio_transfer(drive, SC_SEND_EXT_CSD, 0, ext_csd, 1);
372 if (ret)
373 return ret;
374 count = *(u32*)&ext_csd[212];
375 } else if (!(drive->card_type & SF_MMC) && CSD_STRUCTURE >= 1) {
376 // High capacity SD card
377 u32 C_SIZE2 = csd[5] | (csd[6] << 8) | ((csd[7] & 0x3f) << 16);
378 count = (C_SIZE2+1) << (19-9);
379 }
380 // Fill drive struct and return
381 drive->drive.blksize = DISK_SECTOR_SIZE;
382 drive->drive.sectors = count;
383 return 0;
384}
385
Kevin O'Connor72691a52014-12-16 09:55:16 -0500386// Initialize an SD card
387static int
Kevin O'Connorebe40ba2015-08-18 11:44:46 -0400388sdcard_card_setup(struct sddrive_s *drive, int volt, int prio)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500389{
Kevin O'Connorebe40ba2015-08-18 11:44:46 -0400390 struct sdhci_s *regs = drive->regs;
Kevin O'Connor17b811b2015-08-18 11:33:41 -0400391 // Set controller to initialization clock rate
392 int ret = sdcard_set_frequency(regs, 400);
393 if (ret)
394 return ret;
395 msleep(SDHCI_CLOCK_ON_TIME);
Kevin O'Connor43312af2015-07-30 10:56:00 -0400396 // Reset card
397 u32 param[4] = { };
Kevin O'Connor17b811b2015-08-18 11:33:41 -0400398 ret = sdcard_pio(regs, SC_GO_IDLE_STATE, param);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500399 if (ret)
400 return ret;
Kevin O'Connor43312af2015-07-30 10:56:00 -0400401 // Let card know SDHC/SDXC is supported and confirm voltage
Kevin O'Connor065b3412015-08-24 12:36:56 -0400402 u32 hcs = 0, vrange = (volt >= (1<<15) ? 0x100 : 0x200) | 0xaa;
Kevin O'Connor4b999222015-08-11 11:47:57 -0400403 param[0] = vrange;
Kevin O'Connor12441a82015-08-10 19:11:15 -0400404 ret = sdcard_pio(regs, SC_SEND_IF_COND, param);
Kevin O'Connord501de12015-08-11 13:29:55 -0400405 if (!ret && param[0] == vrange)
406 hcs = (1<<30);
Kevin O'Connor43312af2015-07-30 10:56:00 -0400407 // Verify SD card (instead of MMC or SDIO)
408 param[0] = 0x00;
409 ret = sdcard_pio_app(regs, SC_APP_SEND_OP_COND, param);
Kevin O'Connord501de12015-08-11 13:29:55 -0400410 if (ret) {
411 // Check for MMC card
412 param[0] = 0x00;
413 ret = sdcard_pio(regs, SC_SEND_OP_COND, param);
414 if (ret)
415 return ret;
Kevin O'Connor065b3412015-08-24 12:36:56 -0400416 drive->card_type |= SF_MMC;
Kevin O'Connord501de12015-08-11 13:29:55 -0400417 hcs = (1<<30);
418 }
Kevin O'Connor43312af2015-07-30 10:56:00 -0400419 // Init card
420 u32 end = timer_calc(SDHCI_POWERUP_TIMEOUT);
421 for (;;) {
Kevin O'Connord501de12015-08-11 13:29:55 -0400422 param[0] = hcs | volt; // high-capacity support and voltage level
Kevin O'Connor065b3412015-08-24 12:36:56 -0400423 if (drive->card_type & SF_MMC)
Kevin O'Connord501de12015-08-11 13:29:55 -0400424 ret = sdcard_pio(regs, SC_SEND_OP_COND, param);
425 else
426 ret = sdcard_pio_app(regs, SC_APP_SEND_OP_COND, param);
Kevin O'Connor43312af2015-07-30 10:56:00 -0400427 if (ret)
428 return ret;
429 if (param[0] & SR_OCR_NOTBUSY)
430 break;
431 if (timer_check(end)) {
432 warn_timeout();
433 return -1;
434 }
Kevin O'Connord501de12015-08-11 13:29:55 -0400435 msleep(5); // Avoid flooding log when debugging
Kevin O'Connor43312af2015-07-30 10:56:00 -0400436 }
Kevin O'Connor065b3412015-08-24 12:36:56 -0400437 drive->card_type |= (param[0] & SR_OCR_CCS) ? SF_HIGHCAPACITY : 0;
Kevin O'Connore344da42015-08-24 13:48:54 -0400438 // Select card (get cid, set rca, get csd, select card)
Kevin O'Connord501de12015-08-11 13:29:55 -0400439 param[0] = 0x00;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500440 ret = sdcard_pio(regs, SC_ALL_SEND_CID, param);
441 if (ret)
442 return ret;
Kevin O'Connor39a8ea52015-08-18 12:43:04 -0400443 u8 cid[16];
444 memcpy(cid, param, sizeof(cid));
Kevin O'Connor065b3412015-08-24 12:36:56 -0400445 param[0] = drive->card_type & SF_MMC ? 0x0001 << 16 : 0x00;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500446 ret = sdcard_pio(regs, SC_SEND_RELATIVE_ADDR, param);
447 if (ret)
448 return ret;
Kevin O'Connor065b3412015-08-24 12:36:56 -0400449 u16 rca = drive->card_type & SF_MMC ? 0x0001 : param[0] >> 16;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500450 param[0] = rca << 16;
Kevin O'Connore344da42015-08-24 13:48:54 -0400451 ret = sdcard_pio(regs, SC_SEND_CSD, param);
452 if (ret)
453 return ret;
454 u8 csd[16];
455 memcpy(csd, param, sizeof(csd));
456 param[0] = rca << 16;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500457 ret = sdcard_pio(regs, SC_SELECT_DESELECT_CARD, param);
458 if (ret)
459 return ret;
Kevin O'Connor17b811b2015-08-18 11:33:41 -0400460 // Set controller to data transfer clock rate
461 ret = sdcard_set_frequency(regs, 25000);
462 if (ret)
463 return ret;
Kevin O'Connorebe40ba2015-08-18 11:44:46 -0400464 // Register drive
Kevin O'Connore344da42015-08-24 13:48:54 -0400465 ret = sdcard_get_capacity(drive, csd);
466 if (ret)
467 return ret;
Kevin O'Connor39a8ea52015-08-18 12:43:04 -0400468 char pnm[7] = {};
469 int i;
470 for (i=0; i < (drive->card_type & SF_MMC ? 6 : 5); i++)
471 pnm[i] = cid[11-i];
Kevin O'Connore344da42015-08-24 13:48:54 -0400472 char *desc = znprintf(MAXDESCSIZE, "%s %s %dMiB"
Kevin O'Connor39a8ea52015-08-18 12:43:04 -0400473 , drive->card_type & SF_MMC ? "MMC drive" : "SD card"
Kevin O'Connore344da42015-08-24 13:48:54 -0400474 , pnm, (u32)(drive->drive.sectors >> 11));
Kevin O'Connor39a8ea52015-08-18 12:43:04 -0400475 dprintf(1, "Found sdcard at %p: %s\n", regs, desc);
Kevin O'Connorebe40ba2015-08-18 11:44:46 -0400476 boot_add_hd(&drive->drive, desc, prio);
477 return 0;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500478}
479
480// Setup and configure an SD card controller
481static void
Kevin O'Connor9f7b2362015-08-10 12:51:41 -0400482sdcard_controller_setup(struct sdhci_s *regs, int prio)
Kevin O'Connor72691a52014-12-16 09:55:16 -0500483{
Kevin O'Connor72691a52014-12-16 09:55:16 -0500484 // Initialize controller
Kevin O'Connor11198db2015-07-28 13:06:41 -0400485 u32 present_state = readl(&regs->present_state);
486 if (!(present_state & SP_CARD_INSERTED))
487 // No card present
488 return;
Kevin O'Connord5b78212015-08-11 09:34:19 -0400489 dprintf(3, "sdhci@%p ver=%x cap=%x %x\n", regs
490 , readw(&regs->controller_version)
491 , readl(&regs->cap_lo), readl(&regs->cap_hi));
Kevin O'Connor9b73aa62015-08-12 12:02:16 -0400492 sdcard_reset(regs, SRF_ALL);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500493 writew(&regs->irq_signal, 0);
Kevin O'Connorbf8f2662015-08-12 12:07:17 -0400494 writew(&regs->irq_enable, 0x01ff);
495 writew(&regs->irq_status, readw(&regs->irq_status));
Kevin O'Connor72691a52014-12-16 09:55:16 -0500496 writew(&regs->error_signal, 0);
Kevin O'Connor460e9aa2015-11-17 14:52:23 -0500497 writew(&regs->error_irq_enable, 0x01ff);
Kevin O'Connorbf8f2662015-08-12 12:07:17 -0400498 writew(&regs->error_irq_status, readw(&regs->error_irq_status));
Kevin O'Connor9637a672015-07-28 14:15:37 -0400499 writeb(&regs->timeout_control, 0x0e); // Set to max timeout
Kevin O'Connor4b999222015-08-11 11:47:57 -0400500 int volt = sdcard_set_power(regs);
501 if (volt < 0)
502 return;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500503
504 // Initialize card
Kevin O'Connor72691a52014-12-16 09:55:16 -0500505 struct sddrive_s *drive = malloc_fseg(sizeof(*drive));
506 if (!drive) {
507 warn_noalloc();
Kevin O'Connor263fb192015-08-11 11:59:34 -0400508 goto fail;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500509 }
510 memset(drive, 0, sizeof(*drive));
511 drive->drive.type = DTYPE_SDCARD;
Kevin O'Connor72691a52014-12-16 09:55:16 -0500512 drive->regs = regs;
Kevin O'Connorebe40ba2015-08-18 11:44:46 -0400513 int ret = sdcard_card_setup(drive, volt, prio);
514 if (ret) {
515 free(drive);
516 goto fail;
517 }
Kevin O'Connor263fb192015-08-11 11:59:34 -0400518 return;
519fail:
520 writeb(&regs->power_control, 0);
521 writew(&regs->clock_control, 0);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500522}
523
Kevin O'Connor9f7b2362015-08-10 12:51:41 -0400524static void
525sdcard_pci_setup(void *data)
526{
527 struct pci_device *pci = data;
528 wait_preempt(); // Avoid pci_config_readl when preempting
529 // XXX - bars dependent on slot index register in pci config space
530 u32 regs = pci_config_readl(pci->bdf, PCI_BASE_ADDRESS_0);
Kyösti Mälkkicfc17bd2015-11-04 07:40:12 +0200531 regs &= PCI_BASE_ADDRESS_MEM_MASK;
Kevin O'Connor9f7b2362015-08-10 12:51:41 -0400532 pci_config_maskw(pci->bdf, PCI_COMMAND, 0,
533 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
534 int prio = bootprio_find_pci_device(pci);
535 sdcard_controller_setup((void*)regs, prio);
536}
537
538static void
539sdcard_romfile_setup(void *data)
540{
541 struct romfile_s *file = data;
542 int prio = bootprio_find_named_rom(file->name, 0);
543 u32 addr = romfile_loadint(file->name, 0);
544 dprintf(1, "Starting sdcard controller check at addr %x\n", addr);
545 sdcard_controller_setup((void*)addr, prio);
546}
547
Kevin O'Connor72691a52014-12-16 09:55:16 -0500548void
549sdcard_setup(void)
550{
551 if (!CONFIG_SDCARD)
552 return;
553
Kevin O'Connor9f7b2362015-08-10 12:51:41 -0400554 struct romfile_s *file = NULL;
555 for (;;) {
556 file = romfile_findprefix("etc/sdcard", file);
557 if (!file)
558 break;
559 run_thread(sdcard_romfile_setup, file);
560 }
561
Kevin O'Connor72691a52014-12-16 09:55:16 -0500562 struct pci_device *pci;
563 foreachpci(pci) {
564 if (pci->class != PCI_CLASS_SYSTEM_SDHCI || pci->prog_if >= 2)
565 // Not an SDHCI controller following SDHCI spec
566 continue;
Kevin O'Connor9f7b2362015-08-10 12:51:41 -0400567 run_thread(sdcard_pci_setup, pci);
Kevin O'Connor72691a52014-12-16 09:55:16 -0500568 }
569}