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review.coreboot.org / coreboot / refs/heads/main / src / northbridge
  1. 9f1fbb9 northbridge/intel/sandybridge: Fix random raminit failures by Patrick Rudolph · 9 years ago
  2. 0dc6a1e northbridge/intel/fsp_sandybridge: remove blank line by Martin Roth · 9 years ago
  3. 29016ea northbridge/amd/mct_ddr3: Add registered and x4 DIMM support to Fam15h by Timothy Pearson · 9 years ago
  4. f682d00 amd/amdmct/mct_ddr3: Partially fix up registered DIMMs on Fam10h by Timothy Pearson · 9 years ago
  5. dc4cb05 nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slots by Timothy Pearson · 9 years ago
  6. 9597790 northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs by Timothy Pearson · 9 years ago
  7. a44daac northbridge/amd/amdmct/mct_ddr3: Fix Family 10h boot failure by Timothy Pearson · 9 years ago
  8. 4ef4fc6 northbridge/amd/amdmct/mct_ddr3: Properly indicate clobbered registers by Timothy Pearson · 9 years ago
  9. dee6b1f northbridge/amd/amdmct/mct_ddr3: Set SkewMemClk when both DCTs are in use by Timothy Pearson · 9 years ago
  10. f3aa375 northbridge/amd/amdmct/mct_ddr3: Add missing Family 15h RDIMM Rtt values by Timothy Pearson · 9 years ago
  11. b7a8b8c northbridge/amd/amdmct/mct_ddr3: Fix null pointer access and related hangs by Timothy Pearson · 9 years ago
  12. 11739a4 northbridge/amd/amdmct/mct_ddr3: Work around strange phy training issue by Timothy Pearson · 9 years ago
  13. 9426e4f northbridge/amd/amdmct/mct_ddr3: Attempt to recover from phy training errors by Timothy Pearson · 9 years ago
  14. 5288ced amd/amdmct/mct_ddr3: Add Family 15h RDIMM timing and ODT values by Timothy Pearson · 9 years ago
  15. 38508a0 cpu/amd: Fix AMD Family 15h ECC initialization reliability issues by Timothy Pearson · 9 years ago
  16. eb2f6ff northbridge/amd/amdmct/mct_ddr3: Fix lockups and wasted time during ECC init by Timothy Pearson · 9 years ago
  17. 0d0375b northbridge/amd/amdmct/mct_ddr3: Add additional debug trace statements by Timothy Pearson · 9 years ago
  18. 0e545c6 northbridge/amd/amdfam10: Properly indicate node and channel in SMBIOS tables by Timothy Pearson · 9 years ago
  19. 31ec0f3 northbridge/amd/amdmct/mct_ddr3: Update prefetcher configuration by Timothy Pearson · 9 years ago
  20. 7fd3ef5 northbridge/amd/amdmct: Clear memory before enabling ECC by Timothy Pearson · 9 years ago
  21. f3b9fd3 src/northbridge/amd/amdmct: Add option to override bad SPD checksum by Timothy Pearson · 9 years ago
  22. f70946f northbridge/amd/amdmct: Verify MCT NVRAM options before skipping training by Timothy Pearson · 9 years ago
  23. 9b5480d northbridge/amd/amdmct: Fix crash on startup due to NULL pointer access by Timothy Pearson · 9 years ago
  24. e36fb743 northbridge/amd/amdmct: Fix hang on boot due to invalid array access by Timothy Pearson · 9 years ago
  25. 010d623 northbridge/amd/amdfam10: Add ability to set maximum P-state limit by Timothy Pearson · 9 years ago
  26. 45de61d northbridge/amd/amdmct: Skip DCT config write to Flash if unchanged by Timothy Pearson · 9 years ago
  27. 83abd81 cpu/amd: Add CC6 support by Timothy Pearson · 9 years ago
  28. dd4390b via/cx700: Fix hidden compile error and make sure it won't hide again by Patrick Georgi · 9 years ago
  29. 74e03a4 mainboard/asus/kgpe-d16: Enable CC6 by Timothy Pearson · 9 years ago
  30. cfb93e7 northbridge/amd/amdfam10: Enable CC6 DRAM save area setup by Timothy Pearson · 9 years ago
  31. df1fb9c amd/amdmct/mct_ddr3: Use training values from previous boot if possible by Timothy Pearson · 9 years ago
  32. 45ded7d amd/amdmct/mct_ddr3: Improve SPD DIMM detect reliability by Timothy Pearson · 9 years ago
  33. 69ded8f northbridge/amd/amdmct/mct_ddr3: Clean up curly brace style violations by Timothy Pearson · 9 years ago
  34. 453b543 northbridge/amd/amdmct: Read SPD data into cache to decrease bootup time by Timothy Pearson · 9 years ago
  35. 31f4d00 northbridge/intel: Add i89xx header file by Marc Jones · 9 years ago
  36. 3ff36b0 AMD binaryPI: Allow fine-tuning platform memory configuration by Kyösti Mälkki · 9 years ago
  37. 6ee6bde amdmct/mct_ddr3: Disable Fam10h-specific MTRR setup on Fam15h by Timothy Pearson · 9 years ago
  38. a62191b amd/00730F01: Add missing headerfile by Kyösti Mälkki · 9 years ago
  39. a58c0b0 AMD binaryPI BiosCallouts: Remove cast by Kyösti Mälkki · 9 years ago
  40. 82860f8 AGESA BiosCallouts: Remove cast by Kyösti Mälkki · 9 years ago
  41. 625b944 amd/00660F01: Fix MMCONF resource by Kyösti Mälkki · 9 years ago
  42. 5d49038 amd/00730F01: Fix MMCONF resource by Kyösti Mälkki · 9 years ago
  43. eb90aaf AMD bettong: Fix the interrupt routing. by zbao · 9 years ago
  44. 593e7de nb/intel/sandybridge: Limit GFX workaround to Sandy Bridge by Nico Huber · 9 years ago
  45. 5a1f337 src/amd: Increase maximum blootblock execution count by Timothy Pearson · 9 years ago
  46. 9d9ce0d nb/intel/sandybridge: Add ACPI DMAR table by Nico Huber · 9 years ago
  47. bb9469c nb/intel/sandybridge: Enable basic IOMMU support by Nico Huber · 9 years ago
  48. e561f35 ACPI: Make DMAR flags settable by Nico Huber · 9 years ago
  49. 6e99c59 via/cx700: remove unused #define by Patrick Georgi · 9 years ago
  50. 730a043 cpu/amd: Add initial AMD Family 15h support by Timothy Pearson · 9 years ago
  51. b30d7ed cpu/amd: Move model_10xxx to family_10h-family_15h by Timothy Pearson · 9 years ago
  52. 69b11f9 northbridge/amd/amdmct/mct_ddr3: Fix S3 suspend overrunning the stack size limit by Timothy Pearson · 9 years ago
  53. 2a83935 northbridge/amd/amdfam10: Set DIMM voltage based on SPD data by Timothy Pearson · 9 years ago
  54. b2a1a59 northbridge/amd/amdfam10: Correct S3_DATA_POS type from int to hex by Timothy Pearson · 9 years ago
  55. 160ad6a northbridge/amd/amdfam10: Update RAM speed table with DDR3 values by Timothy Pearson · 9 years ago
  56. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  57. 31ff120 Drop northbridge/i440lx by Stefan Reinauer · 9 years ago
  58. dd132a5 AMD mainboards: Fix 64bit BiosCallOuts.c by Stefan Reinauer · 9 years ago
  59. 5fa4cb6 cpu/amd: Fix cbtypes.h to match UINTN convention by Stefan Reinauer · 9 years ago
  60. 6a2df9a RD890: 64bit fixes by Stefan Reinauer · 9 years ago
  61. 59d0e04 northbridge/amd/amdmct/mct_ddr3: Add initial Suspend to RAM (S3) support by Timothy Pearson · 9 years ago
  62. 4ea0cc0 northbridge/amd/amdfam10: Add Suspend to RAM (S3) Flash data storage area by Timothy Pearson · 9 years ago
  63. 77a1d1a Port AGESA based northbridge code to 64bit by Stefan Reinauer · 9 years ago
  64. e11f6c3 nb/intel/sandybridge/gma: add disable function by Patrick Rudolph · 9 years ago
  65. 1d94106 northbridge/amd/amdk8: Improve DIMM detection debugging by Timothy Pearson · 9 years ago
  66. 99e1a67 northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendations by Timothy Pearson · 9 years ago
  67. b8a355d northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalization by Timothy Pearson · 9 years ago
  68. 3acece2 AMD Family 0Fh: ensure CONFIG_CBB and CONFIG_CDB have sane values by Jonathan A. Kollasch · 9 years ago
  69. 2a16ace northbridge/amd/amdfam10: Enable advanced PCIe setup options by Timothy Pearson · 9 years ago
  70. 1c4508e cpu/amd: Add initial support for AMD Socket G34 processors by Timothy Pearson · 9 years ago
  71. fc70643 Intel: Move MCRS ResourceTemplate outside of _CRS method by Martin Roth · 9 years ago
  72. a8d73a3 northbridge/amd/amdmct: Fix Family 15h detection by Timothy Pearson · 9 years ago
  73. 76d4636 northbridge/amd/amdmct/mct_ddr3: Fix curly brace style violations by Timothy Pearson · 9 years ago
  74. 33fb4cf northbridge/amd/amdfam10: Fix typo in comment by Timothy Pearson · 9 years ago
  75. bf6b83a Revert "Remove sandybridge and ivybridge FSP code path" by Martin Roth · 9 years ago
  76. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  77. 5856240 Revert "Remove FSP Rangeley SOC and mohonpeak board support" by Martin Roth · 9 years ago
  78. 62047d1 gma: Consolidate Intel IGD ACPI code some more by Nico Huber · 9 years ago
  79. c48f5ef Kill lvds_num_lanes by Vladimir Serbinenko · 9 years ago
  80. 551cff0 Derive lvds_dual_channel from EDID timings. by Vladimir Serbinenko · 9 years ago
  81. 9733e28 nb/intel/sandybridge/raminit: Add edge write discovery check by Patrick Rudolph · 9 years ago
  82. 2a510a7 northbridge/intel/sandybridge: Do not disable PEG by default by Patrick Rudolph · 9 years ago
  83. 3660c0f northbridge/intel/sandybridge: Enable PEG clock-gating on demand by Patrick Rudolph · 9 years ago
  84. 72bb66e x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection by Alexandru Gagniuc · 9 years ago
  85. b142b84 northbridge/intel/nehalem: Fix native VGA init by Nicolas Reinecke · 9 years ago
  86. 959478a Remove FSP Rangeley SOC and mohonpeak board support by Alexandru Gagniuc · 9 years ago
  87. fb50124 Remove sandybridge and ivybridge FSP code path by Alexandru Gagniuc · 9 years ago
  88. ecf2eb4 sandybridge ivybridge: Treat native init as first class citizen by Alexandru Gagniuc · 9 years ago
  89. bd0dab2 northbridge/intel/gm45: Fix native VGA init by Audrey Pearson · 9 years ago
  90. 6a4d682 amd/family14: Add k10temp thermal zone. by Tobias Diedrich · 9 years ago
  91. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  92. 98e0ac0 AGESA S3 support: Fix excessive stack usage by Kyösti Mälkki · 9 years ago
  93. 3953e39 x86: bootblock: remove linking and program flow from build system by Aaron Durbin · 9 years ago
  94. 9647094 intel/sandybridge: Do not guard native VGA init by #ifdefs by Alexandru Gagniuc · 9 years ago
  95. 8ac4929 northbridge/amd/amdfam10: Use adequate size for HT speed limit field by Timothy Pearson · 9 years ago
  96. 2e4f83b intel i945: Fix native VGA initialization by Mono · 9 years ago
  97. c241855 north/intel/sandybridge: Fix native VGA initialization by Alexandru Gagniuc · 9 years ago
  98. 2c482a9 intel: Do not hardcode the position of mrc.cache by Alexandru Gagniuc · 9 years ago
  99. 4d3de7e bootstate: remove need for #ifdef ENV_RAMSTAGE by Aaron Durbin · 9 years ago
  100. 439356f x86: remove cpu_incs as romstage Make variable by Aaron Durbin · 9 years ago