1. 8b1aa38 northbridge: Rename Makefiles from .inc to .mk by Martin Roth · 6 months ago[Renamed from src/northbridge/intel/sandybridge/Makefile.inc]
  2. b14b96d northbridge/intel/sandybridge/raminit: Prepare MRC path for x86_64 by Patrick Rudolph · 6 months ago
  3. 43a9ffb nb/sandybridge: Remove redundant include of "ddr3.c" by Elyes Haouas · 12 months ago
  4. 1c505f8 nb/intel/sandybridge: Move IOSAV functions to separate file by Angel Pons · 3 years, 8 months ago
  5. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  6. a38fee3 nb/intel/sandybridge: Rename raminit_ivy.c by Angel Pons · 4 years, 3 months ago
  7. 0760902 nb/intel/sandybridge: Drop dead code by Angel Pons · 4 years, 3 months ago
  8. 6e5aabd nb/intel/sandybridge: Use SPDX headers by Angel Pons · 4 years, 3 months ago
  9. 7f6586f nb/intel/sandybridge: Do not define tables in a header by Angel Pons · 4 years, 4 months ago
  10. 064c799 nb/intel/sandybridge: Deduplicate report_memory_config by Angel Pons · 4 years, 4 months ago
  11. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  12. 360d947 nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK by Arthur Heymans · 4 years, 8 months ago
  13. fe481eb northbridge/intel: Rename ram_calc.c to memmap.c by Kyösti Mälkki · 5 years ago
  14. 9265f89 arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class by Kyösti Mälkki · 5 years ago
  15. 2cdb65d nb/intel/sandybridge: Drop iommu.c and rename functions by Patrick Rudolph · 5 years ago
  16. 6aca7e6 nb/intel/sandybridge: Move DMI init code by Patrick Rudolph · 5 years ago
  17. 772a154 nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE by Nico Huber · 5 years ago
  18. a6be58f nb/intel/sandybridge: Remove the C native graphic init by Arthur Heymans · 6 years ago
  19. ef8c559 nb/intel/sandybridge/report_platform: Move remaining code to sb folder by Patrick Rudolph · 6 years ago
  20. 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
  21. 6fcd7b8 cpu/intel/model_206ax: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  22. 0b643d2 nb/intel/sandybridge/peg: Add PEG driver stub by Patrick Rudolph · 7 years ago
  23. 7539b8c nb/intel/sandybridge: Use common mrc cache functions by Arthur Heymans · 7 years ago
  24. b9959e2 cpu/intel/model_206ax: Use tsc monotonic timer by Patrick Rudolph · 7 years ago
  25. 305035c nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge by Patrick Rudolph · 8 years ago
  26. fd5fa2a nb/intel/sandybridge/raminit: Split raminit.c by Patrick Rudolph · 8 years ago
  27. 92fc072 northbridge/intel: move mrccache.c of sandybridge + haswell to common by Alexander Couzens · 8 years ago
  28. 8e7928a sandybridge/gma_lvds: support both Sandy&Ivy on one board by Iru Cai · 9 years ago
  29. bd82d18 sandybridge: Always include MRC if not using native RAM init. by Vladimir Serbinenko · 8 years ago
  30. 144eea0 Make MRC vs native a config rather than making a separate chipset for it. by Vladimir Serbinenko · 8 years ago
  31. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 8 years ago
  32. bb9469c nb/intel/sandybridge: Enable basic IOMMU support by Nico Huber · 9 years ago
  33. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  34. ecf2eb4 sandybridge ivybridge: Treat native init as first class citizen by Alexandru Gagniuc · 9 years ago
  35. 2c482a9 intel: Do not hardcode the position of mrc.cache by Alexandru Gagniuc · 9 years ago
  36. 6cb3a59 x86: flatten hierarchy by Stefan Reinauer · 9 years ago 4.1 4.1
  37. 5a2bd0b Revert "sandy/ivybridge: use LAPIC timer in SMM" by Patrick Georgi · 9 years ago
  38. a3aa8da sandy/ivybridge: use LAPIC timer in SMM by Stefan Reinauer · 9 years ago
  39. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  40. e1133b7 kbuild: automatically include northbridges by Stefan Reinauer · 9 years ago
  41. 72a8e5e Update hex values to CBFS binary name types in Makefiles by Martin Roth · 9 years ago
  42. c36af7b Replace includes of build.h with version.h by Kyösti Mälkki · 10 years ago
  43. 7d6b0af sandybridge: Kill CONFIG_HAVE_MRC_CACHE by Vladimir Serbinenko · 10 years ago
  44. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago
  45. 822bc65 ACPI: Remove CONFIG_GENERATE_ACPI_TABLES by Vladimir Serbinenko · 11 years ago
  46. 309fc4c sandybridge: Add native sandybridge by Vladimir Serbinenko · 10 years ago
  47. 9ba922f sandybridge: Native gfx init. by Vladimir Serbinenko · 10 years ago
  48. 1783a3c ivybridge: LVDS gfx init. by Vladimir Serbinenko · 10 years ago
  49. 7686a56 sandy/ivybridge: Native raminit. by Vladimir Serbinenko · 10 years ago
  50. 591031f sandy/ivy: Fix mrc.cache file in CBFS by Kyösti Mälkki · 10 years ago
  51. b92f5e8 nb/sandybridge: Move MRC cache above mrc.bin by Alexandru Gagniuc · 10 years ago
  52. cb08e16 CBMEM intel: Define get_top_of_ram() once per chipset by Kyösti Mälkki · 11 years ago
  53. 5e73be2 sandybridge: Allow skipping mrc.cache by Vladimir Serbinenko · 10 years ago
  54. 1cc3416 Add support to enable/disable builtin GbE (again) by Stefan Reinauer · 11 years ago
  55. 483ff82 sandybridge: Store MRC cache in CBFS by Patrick Georgi · 11 years ago
  56. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  57. e135ac5 Remove AMD special case for LAPIC based udelay() by Patrick Georgi · 12 years ago
  58. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  59. e5a0a5d Initial IGD OpRegion implementation by Stefan Reinauer · 12 years ago
  60. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  61. cafedcf Strip quotes from Sandybridge MRC blob by Stefan Reinauer · 12 years ago
  62. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  63. 16401b8 SMM: Add udelay on Sandybridge systems by Stefan Reinauer · 12 years ago
  64. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago