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review.coreboot.org / coreboot / deaaab25365b093229836d4294b1868093df7c47 / src / soc / imgtec
  1. fdce680 pistachio: implement clock setup for I2C0 by Ionela Voinescu · 10 years ago
  2. a702390 pistachio: Fix ROM clock base address by Ionela Voinescu · 10 years ago
  3. 8b1f23e urara: add clock setup for MIPS CPU, ROM and Ethernet by Ionela Voinescu · 10 years ago
  4. 41d1ca8 pistachio: fix clocks setup code by Ionela Voinescu · 10 years ago
  5. b9d59bb pistachio: Use 1.8433179 MHz for UART refclk by David Hendricks · 10 years ago
  6. 30fc667 pistachio: increase size of bootblock to 18 KB by Ionela Voinescu · 10 years ago
  7. 55b8dc0 pistachio: change memory layout as to allow bigger CBFS cache by Ionela Voinescu · 10 years ago
  8. 1c0d0c0 pistachio: spi: use same clock edge for RX and TX by Ionela Voinescu · 10 years ago
  9. b3f666b urara: Configure clocks and MFIOs by Ionela Voinescu · 10 years ago
  10. efcee76 CBFS: Automate ROM image layout and remove hardcoded offsets by Julius Werner · 10 years ago
  11. f9ff353 spi: support controllers with limited transfer size capabilities by Vadim Bendebury · 10 years ago
  12. b9d9615 urara: add support for DMA coherent memory area by Ionela Voinescu · 10 years ago
  13. fb3ea74 pistachio: increase the size of romstage to 36K by Ionela Voinescu · 10 years ago
  14. 420b0f6 pistachio: add timer frequency for SOC; correct platform ID by Ionela Voinescu · 10 years ago
  15. f3bc026 pistachio: add SOC descriptor by Vadim Bendebury · 10 years ago
  16. fe51cc4 pistachio: modify memory layout by Vadim Bendebury · 10 years ago
  17. 40ff8a5 pistachio: set correct CBMEM top address by Vadim Bendebury · 10 years ago
  18. cbc44f7 pistachio: allow more room for bootblock by Vadim Bendebury · 10 years ago
  19. 52a8879 pistachio: implement timer support by Vadim Bendebury · 10 years ago
  20. 0812568 pistachio: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  21. a48ca84 kconfig: drop intermittend forwarder files by Stefan Reinauer · 9 years ago
  22. ec5e5e0 New mechanism to define SRAM/memory map with automatic bounds checking by Julius Werner · 10 years ago
  23. 1d84ef5 pistachio: add gpio type definition by Vadim Bendebury · 10 years ago
  24. 5c9f534 urara: Fix CBFS header definitions by Vadim Bendebury · 10 years ago
  25. 146d05d imgtec/pistachio: Bring uart driver to modern standards by Patrick Georgi · 9 years ago
  26. 8880df1 pistachio: don't open code ramstage loading by Aaron Durbin · 9 years ago
  27. 49aad6b soc/imgtec/pistachio: Add IMGTEC SPI controller driver by Ionela Voinescu · 10 years ago
  28. 2d510d0 urara: use proper SOC name by Vadim Bendebury · 10 years ago
  29. 197b801 mips: fix bootblock stack definitions by Vadim Bendebury · 10 years ago
  30. f16b082 danube: Use the generic timer interface by Vadim Bendebury · 10 years ago
  31. c7b3f72 danube: use SOC specific rom stage code by Vadim Bendebury · 10 years ago
  32. b2e465d danube: prepare SOC directory for urara by Vadim Bendebury · 10 years ago
  33. c1081a4 imgtec/danube: Add support for ImgTec Danube SoC by Paul Burton · 10 years ago